JPH02260592A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JPH02260592A JPH02260592A JP1081148A JP8114889A JPH02260592A JP H02260592 A JPH02260592 A JP H02260592A JP 1081148 A JP1081148 A JP 1081148A JP 8114889 A JP8114889 A JP 8114889A JP H02260592 A JPH02260592 A JP H02260592A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- board
- circuit board
- wiring patterns
- resistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000463 material Substances 0.000 claims abstract description 13
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 6
- 239000003575 carbonaceous material Substances 0.000 claims description 6
- 229910052707 ruthenium Inorganic materials 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 10
- 229910052737 gold Inorganic materials 0.000 abstract description 7
- 239000010931 gold Substances 0.000 abstract description 7
- 238000007747 plating Methods 0.000 abstract description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052802 copper Inorganic materials 0.000 abstract description 5
- 239000010949 copper Substances 0.000 abstract description 5
- 229920005989 resin Polymers 0.000 abstract description 5
- 239000011347 resin Substances 0.000 abstract description 5
- 239000003990 capacitor Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract description 3
- 239000011248 coating agent Substances 0.000 abstract description 2
- 238000000576 coating method Methods 0.000 abstract description 2
- 229910000679 solder Inorganic materials 0.000 abstract description 2
- 238000004382 potting Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 description 15
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 6
- 229910052799 carbon Inorganic materials 0.000 description 6
- 238000001035 drying Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 3
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 229920001342 Bakelite® Polymers 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 239000004637 bakelite Substances 0.000 description 1
- 229910002090 carbon oxide Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- SWELZOZIOHGSPA-UHFFFAOYSA-N palladium silver Chemical compound [Pd].[Ag] SWELZOZIOHGSPA-UHFFFAOYSA-N 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
この発明は回路基板に関するものであり、特にスルーホ
ール内に抵抗体を設けて、電子部品を高密度実装した回
路基板に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a circuit board, and more particularly to a circuit board in which a resistor is provided in a through hole and electronic components are mounted at high density.
［従来の技術］
従来の此種高密度実装の回路基板を別紙第２図に従って
説明する。基板（り上の所定位置へペースト状の金及び
銀パラジウムを印刷した後に乾燥焼成して、金電極（祖
２）・・・並びにコンタクト電極（３）（３）・・・を
設ける。該コンタクト電極（３）（３）間へ、酸化ルテ
ニウム系のペーストを印刷した後に乾燥焼成して抵抗体
（４Ｘ４）・・・を形成する。然る後に、印刷或はメツ
キ処理によって銅の配線パターン（５）（５）・・・を
形成し、ベアチップＩＣ（６）を金ワイヤ−（７）（η
・・・にてワイヤーボンディングし、樹脂コート（８）
をボッティングして被膜を形成する。又、チップコンデ
ンサ（Ｑ）、チップコイル（ＩＩ、モールド＊ＣＱ＋）
等のチップ部品をハンダ付しである。基板（１）に開穿
されたスルーホール（ロ）内にも銅の導ｍ層が形成され
、基板（１）両面の配線パターン（５Ｘ５）−・・を接
続している。[Prior Art] A conventional high-density mounting circuit board of this type will be described with reference to FIG. 2 of the appendix. Paste-like gold and silver palladium are printed on predetermined positions on the substrate and then dried and fired to provide gold electrodes (2) and contact electrodes (3) (3). A ruthenium oxide paste is printed between the electrodes (3) and then dried and fired to form a resistor (4x4).After that, a copper wiring pattern (4x4) is formed by printing or plating. 5) (5)... is formed, and the bare chip IC (6) is connected to the gold wire (7) (η
Wire bonded and resin coated (8)
Botting to form a film. Also, chip capacitor (Q), chip coil (II, mold *CQ+)
Chip parts such as these are soldered. A copper conductive layer is also formed in the through hole (b) drilled in the substrate (1), and connects the wiring patterns (5×5) on both sides of the substrate (1).
［発明が解決しようとする課題］
従来の回路基板は基板の面上に抵抗体を形成しであるた
め、回路基板上の抵抗体の占める面積が大である。従っ
て、回路基板の高密度化に限界があり、薄型化にも支障
を来たしていた。[Problems to be Solved by the Invention] Since a conventional circuit board has a resistor formed on the surface of the board, the area occupied by the resistor on the circuit board is large. Therefore, there is a limit to how high the density of the circuit board can be made, and it has also been difficult to make the circuit board thinner.
そこで、基板に於ける抵抗体の占める面積を小として、
高密度実装の回路基板を得るために解決せられるべき技
術的課題が生じてくるのであり、本発明はこの課題を解
決することを目的とする。Therefore, by reducing the area occupied by the resistor on the board,
A technical problem arises that must be solved in order to obtain a circuit board with high density packaging, and the present invention aims to solve this problem.
［課題を解決するための手段］
この発明は上記目的を達成するために提案せられたもの
であり、基板に開穿されたスルーホール内に抵抗体を設
け、該基板の両面に前記抵抗体の端子を設けたことを特
徴とする回路基板、及び抵抗体にカーボン系材料を使用
した回路基板、及び抵抗体にルテニウム系材料を使用し
た回路基板を提供せんとするものである。[Means for Solving the Problems] The present invention has been proposed to achieve the above object, and includes providing a resistor in a through hole drilled in a substrate, and disposing the resistor on both sides of the substrate. It is an object of the present invention to provide a circuit board characterized in that a terminal is provided, a circuit board using a carbon-based material for a resistor, and a circuit board using a ruthenium-based material for a resistor.
［作用］
この発明は基板に開穿されたスルーホール内に、カーボ
ン系材料又はルテニウム系材料を使用して抵抗体を形成
している。該抵抗体は、基板の両面に設けた端子によっ
て配線パターンに接続され、回路内で所定の抵抗値を有
した抵抗素子としての機能を発揮する。従って、基板の
面上に形成する通常の抵抗素子と比較して小面積となり
、且つ、基板の面上に抵抗素子が突出することがない。[Operation] According to the present invention, a resistor is formed in a through hole drilled in a substrate using a carbon-based material or a ruthenium-based material. The resistor is connected to the wiring pattern through terminals provided on both sides of the substrate, and functions as a resistor element having a predetermined resistance value within the circuit. Therefore, the area is smaller than that of a normal resistance element formed on the surface of the substrate, and the resistance element does not protrude above the surface of the substrate.
このため、回路基板上の抵抗体の占める面積が小となり
、回路基板の高密度化に極めて有効である。Therefore, the area occupied by the resistor on the circuit board is reduced, which is extremely effective in increasing the density of the circuit board.
［実施例］
以下、この発明の一実施例を別紙添付図面の第１図に従
って詳述する。尚、説明の都合上、従来公知に属する技
術事項も同時に説明し、従来型に対応する部分は同一符
号を使用する。第１図に於て符号（ｆ）は基板であり、
セラミック、ガラスエポキシ、ベークライト等の材料に
て形成されている。[Embodiment] Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 1 of the attached drawings. For convenience of explanation, technical matters that are conventionally known will also be explained at the same time, and the same reference numerals will be used for parts corresponding to the conventional type. In FIG. 1, the symbol (f) is a substrate;
It is made of materials such as ceramic, glass epoxy, and Bakelite.
該基板（１）の所定位置には、予めスルーホール（ｌ■
（ゆ・・・が開、穿されており、ガラスエポキシ材では
最小！００ｕ前後の孔径であるが、セラミック材の場合
には最小５０μ−程度の孔径まで加工できる。A through hole (l■
(The holes are opened and perforated, and in the case of glass epoxy materials, the minimum hole diameter is around 100μ, but in the case of ceramic materials, it can be processed up to a minimum hole diameter of about 50μ.
該スルーホール（ロ）内には抵抗体（４）が設けられて
おり、この抵抗体（４）の材料としてはカーボンと樹脂
とで形成したカーボン系材料、或は酸化ルテニウムとガ
ラスとで形成したルテニウム系材料の何しカを使用する
。該抵抗体（４）は、カーボン系又ハルテニウム系のペ
ースト状材料を基板（１）両面の所定部位に印刷し、ス
ルーホール（＋２１内までペースト状材料を埋込み、乾
燥して定着することによって形成される。カーボン系ペ
ーストの場合には約２５Ｏ℃程度で定着でき、ルテニウ
ム系ペーストの場合には約８５０℃程度で焼成する。こ
の抵抗体（４）の形成方法は特に限定せられるべきでは
なく、他の方法でもよく、例えば固型化した材料をスル
ーホール（Ｑ内へ挿入して抵抗体（４）を形成しても、
よい。尚、該抵抗体（４）の上端部及び下端部は、基板
（１）の表面に露出して端子（４ｓ）（４ｇ）が形成さ
れている。又、抵抗体（４）の抵抗値はカーボンや酸化
ルテニウムの含有量を適宜調整して任意に設定でき、ス
ルーホール（２）の孔径の大小によっても抵抗値を変更
できる。A resistor (4) is provided in the through hole (B), and the resistor (4) is made of a carbon-based material made of carbon and resin, or made of ruthenium oxide and glass. Use any type of ruthenium-based material. The resistor (4) is made by printing carbon-based or halthenium-based paste material on predetermined areas on both sides of the substrate (1), filling the paste material up to the through hole (+21), and drying and fixing it. In the case of carbon-based paste, it can be fixed at about 250°C, and in the case of ruthenium-based paste, it can be fired at about 850°C.The method for forming this resistor (4) should not be particularly limited. For example, even if a solidified material is inserted into a through hole (Q) to form a resistor (4),
good. Note that the upper and lower ends of the resistor (4) are exposed on the surface of the substrate (1) to form terminals (4s) (4g). Further, the resistance value of the resistor (4) can be arbitrarily set by appropriately adjusting the content of carbon or ruthenium oxide, and the resistance value can also be changed by changing the diameter of the through hole (2).
一方、前記基板（１）の両面には、印刷或はメツキ処理
によって銅の配線パターン（５）（５）・・・が形成さ
れ、部品取付部位以外の配線パターン（５）（５）・・
・の表面にはハンダレジスト材０１（＋１・・・を被覆
しである。而して、配線パターン（５）（５）・・・の
所定位置に金メツキを施して金電極（２）（２）−・・
を設け、ペアチップＩＣ（６）を金ワイヤ−（η（η・
・・にてワイヤーボンディングし、樹脂コート（８）を
ポツティングしである。又、前記配線パターン（５）（
５）・・・にチップコンデンサ（９）、チップコイルＯ
Ｉ等のチップ部品をハンダ付しである。On the other hand, copper wiring patterns (5) (5)... are formed on both sides of the board (1) by printing or plating, and the wiring patterns (5) (5)...
The surface of ・ is coated with solder resist material 01 (+1...). Then, gold plating is applied to the predetermined positions of the wiring patterns (5) (5)... to form gold electrodes (2) ( 2) ---
The paired chip IC (6) is connected to a gold wire (η(η・
Wire bonding was performed at ..., and resin coating (8) was potted. Moreover, the wiring pattern (5) (
5) Chip capacitor (9), chip coil O
Chip parts such as I are soldered.
斯くの如くして形成された回路基板は、基板（１）のス
ルーホール（Ｑ内に抵抗体（４）を設けたことによって
、基板（１）の面上から抵抗素子をなくすことができる
。依って、抵抗体の占める面積が小となり、回路基板を
高密度化することができる。又、カーボン系材料を使用
する場合は、乾燥温度が比較的低（、且つ、耐酸性及び
耐アルカリ性に富んでいるので、銅メツキ工程に於てカ
ーボン抵抗が侵される事なく、抵抗体（４）の抵抗値の
変動もない。The circuit board thus formed can eliminate resistive elements from the surface of the board (1) by providing the resistor (4) in the through hole (Q) of the board (1). Therefore, the area occupied by the resistor becomes small, and the density of the circuit board can be increased.Also, when carbon-based materials are used, the drying temperature is relatively low (and they have good acid and alkali resistance). Since it is rich in carbon, the carbon resistor is not attacked during the copper plating process, and there is no change in the resistance value of the resistor (4).
尚、この発明は、この発明の精神を逸脱しない限り種々
の改変を為す事ができ、そして、この発明が該改変せら
れたものに及ぶことは当然である。Note that this invention can be modified in various ways without departing from the spirit of the invention, and it goes without saying that this invention extends to such modifications.
［発明の効果］
この発明は上記一実施例に詳述したように、基板に開穿
されたスルーホール内に抵抗体を設け、基板の両面に設
けた端子によって配線パターンに接続しである。依って
、基板の面上に抵抗素子をなくすことができ、抵抗体の
占める面積が小となって、回路基板を薄型かつ高密度化
することができる。[Effects of the Invention] As described in detail in the above-mentioned embodiment, the present invention provides a resistor in a through hole drilled in a substrate, and connects it to the wiring pattern through terminals provided on both sides of the substrate. Therefore, it is possible to eliminate the resistive element on the surface of the substrate, and the area occupied by the resistive element is reduced, making it possible to make the circuit board thinner and more dense.
該抵抗体にカーボン系材料を使用した場合は、乾燥温度
が低いことと樹脂性ペーストであることから作業性が極
めて良好であり、材料も安価であるのでコストダウンに
寄与できる。又、抵抗体にルテニウム系材料を使用した
場合は、高抵抗値の範囲まで抵抗値を設定でき、高精度
の抵抗体を形成できる。When a carbon-based material is used for the resistor, workability is extremely good because the drying temperature is low and it is a resin paste, and the material is inexpensive, so it can contribute to cost reduction. Further, when a ruthenium-based material is used for the resistor, the resistance value can be set within a high resistance value range, and a highly accurate resistor can be formed.
第１図は本発明の一実施例を示した回路基板の要部縦断
面図であり、第２図は従来型の回路基板の要部縦断面図
である。FIG. 1 is a vertical cross-sectional view of a main part of a circuit board showing an embodiment of the present invention, and FIG. 2 is a vertical cross-sectional view of a main part of a conventional circuit board.
Claims (3)
、該基板の両面に前記抵抗体の端子を設けたことを特徴
とする回路基板。(1) A circuit board characterized in that a resistor is provided in a through hole drilled in the board, and terminals of the resistor are provided on both sides of the board.
記載の回路基板。(2) Claim (1) in which a carbon-based material is used for the resistor
The circuit board described.
）記載の回路基板。(3) Claim (1) in which a ruthenium-based material is used for the resistor
) listed circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1081148A JPH02260592A (en) | 1989-03-31 | 1989-03-31 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1081148A JPH02260592A (en) | 1989-03-31 | 1989-03-31 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02260592A true JPH02260592A (en) | 1990-10-23 |
Family
ID=13738345
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1081148A Pending JPH02260592A (en) | 1989-03-31 | 1989-03-31 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02260592A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5906700A (en) * | 1996-01-30 | 1999-05-25 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing circuit module |
| JP2005236070A (en) * | 2004-02-20 | 2005-09-02 | Jfe Steel Kk | Flat surface magnetic element |
| JP2005251871A (en) * | 2004-03-02 | 2005-09-15 | Ibiden Co Ltd | Printed wiring board |
| CN101425511A (en) * | 2007-11-01 | 2009-05-06 | 松下电器产业株式会社 | Mounted structure |
-
1989
- 1989-03-31 JP JP1081148A patent/JPH02260592A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5906700A (en) * | 1996-01-30 | 1999-05-25 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing circuit module |
| JP2005236070A (en) * | 2004-02-20 | 2005-09-02 | Jfe Steel Kk | Flat surface magnetic element |
| JP2005251871A (en) * | 2004-03-02 | 2005-09-15 | Ibiden Co Ltd | Printed wiring board |
| JP4540365B2 (en) * | 2004-03-02 | 2010-09-08 | イビデン株式会社 | Printed wiring board |
| CN101425511A (en) * | 2007-11-01 | 2009-05-06 | 松下电器产业株式会社 | Mounted structure |
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