JPH0223886B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interface control circuit for a logic device, and in particular to a power supply confirmation circuit used to guarantee the normality of interface signals when power is turned on or off. Related to signal generation circuits.

[Conventional technology and its problems]

In a system where independent logic devices each function independently and are connected to each other by an interface circuit, an unexpected signal may be sent to the interface line when one logic device is powered on or off. Sometimes. In order to prevent such an unexpected signal from malfunctioning the logic device on the other side and adversely affecting the entire system, some types of systems use a power confirmation signal. In other words, the logic device on the side that sends the interface signal sends a power confirmation signal indicating that the power supply is normal at the same time as the interface signal, and the logic device on the other side
Processing is performed by determining whether or not the interface signal is normal based on this power confirmation signal. Therefore, the power confirmation signal must become "1" after the device is powered on, and must become "0" before the power is turned off. The power confirmation signal must also be clear even when the device is not powered. Conventionally, the following method has been used to send out such a power confirmation signal.

The first method is to provide a power supply confirmation switch, and after the power is turned on, the maintenance person turns on the power supply confirmation switch to send out a signal "1", and before turning off the power, turns off the above switch to set the signal to "0". This method is to turn off the power after the This method is complicated to operate and may lead to operational errors. Moreover, it is completely useless if the power supply itself becomes a failure.

The second method is to automatically send a power confirmation signal in conjunction with a power switch, for example, when the power is turned on or off. In this case, although it is possible to prevent maintenance personnel from making operational mistakes, it does not solve problems with the power supply itself.

The third method is to monitor the power supply voltage of the device itself and generate a power confirmation signal when the power supply voltage is above a certain level. In this case, it is possible to deal with power failures, but since the power supply cannot be used as the operating power supply for the power supply confirmation signal generation circuit, it is necessary to provide a separate dedicated power supply, which is not economical. The disadvantage is that it is expensive.

An object of the present invention is to generate a power supply confirmation signal that can reliably control interface signals even in the event of a power failure, without requiring special operations by a maintenance person when power is turned on or off, and without using a special power supply. The purpose is to provide circuits.

[Means to solve the problem]

The power supply confirmation signal generation circuit of the present invention includes a capacitor that is charged through a reverse current blocking circuit connected to a power supply input of a logic device, a comparator that compares the power supply input with a reference voltage, and a power supply confirmation signal that outputs the output of the comparator. The circuit that sends out the power confirmation signal is the make contact of the relay, and this relay is energized by the power input of the logic device, and the operating power of the comparator is derived from the charging voltage of the capacitor. It is characterized by being supplied.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing one embodiment of the present invention.

i.e., the input voltage to the logic device not shown.
A capacitor 23 is charged with V _i from an input voltage line 10 through a diode 22 , and a charging voltage V _c of the capacitor 23 is supplied to a comparator 24 through a line 11 to serve as a power source for the operation of the comparator 24 . On the other hand, a voltage V _H obtained by dividing the input voltage V _i of the input voltage line 10 by a series connection circuit of resistors 20 and 21 is inputted to the comparator 24 through the voltage divided input line 12 . The comparator 24 compares the voltage V _H with a built-in (not shown) reference voltage V _r , _and
When <V _r , the output line 13 is set to high impedance (off), and when V _H ≧V _r , the output line 13 is set to low impedance (on). Comparators with such functions are generally widely available commercially and can be easily used. Comparison of the above divided voltage V _H and reference voltage V _r is as follows:
This is equivalent to comparing the input voltage V _r with the detection voltage V _D , and by appropriately selecting the voltage division ratio, the detection voltage
It is possible to set V _D arbitrarily.

In this embodiment, the input voltage is further applied to the power supply input line 10.
A relay 30 operated by V _i is provided, a make contact 31 is provided between the comparator 24 and the other device, and the output signal line 13 of the comparator 24 is connected to the other device via the make contact 31. This configuration using the relay 30 is intended to reliably generate a power supply confirmation signal even if the comparator has characteristics such that its output is unstable or undefined when the operating voltage of the comparator 24 is low.

The operation of this embodiment will be explained.

As the power is turned on and off, the input voltage V _i changes as shown in FIG. 2a. Further, as shown in the figure, the voltage V _c across the capacitor 23 rises almost in the same way as the input voltage V _i when it is turned on, and gradually decreases depending on the capacitance of the capacitor 23 when it is turned off. Voltage V _i
The steady-state values of Vc and _Vc differ by the voltage drop caused by the diode 22, and _Vc is slightly lower than _Vi .
When the power is turned on, the input voltage V _i rises and the detection voltage V _D
When reaching , the output signal line 13 of the comparator 24
changes from high impedance (off) to low impedance (on) (see Figure 2b). When the power is turned off, the output signal line 13 of the comparator 24 changes to high impedance (off) when the input voltage V _i drops to the detection voltage V _D . That is, the output signal line 13 of the comparator 24 has low impedance (on) only during the period when the input voltage V _i is equal to or higher than the detection voltage V _D . This output signal line 13 is connected to a power supply V via a resistor 25 (shown in FIG. 1), for example, on the partner device side.
When the impedance is low, the potential is low, and when the impedance is high, the potential is high. By prohibiting the other device from reading signals from the interface wire (not shown) due to the high potential,
Can handle interface signals correctly.

In reality, even after the input voltage V _i becomes lower than the detection voltage V _D , it is expected that the voltage will still be within the guaranteed operation range of the logic element for a while (several milliseconds to tens of milliseconds). During this time, it is possible to take evacuation measures by cutting off the power at this device or the other device. For this purpose, the detection voltage V _D should be set sufficiently higher than the minimum guaranteed operation voltage of the logic element. That is, if the detection voltage V _D is set high, disconnection will be detected faster and the guaranteed operation time after detection will be longer. However, since it becomes susceptible to power supply fluctuations and noise, the detection voltage V _D
The settings are made according to the system conditions. The detection voltage V _D is set using resistors 20,
It can be arbitrarily set by changing the partial pressure ratio of 21.

Furthermore, in this embodiment, as described above, when the input voltage V _i rises to V _D at power-on, if the voltage V _c of the capacitor 23 is equal to or higher than the operable voltage V _s of the comparator 24, As shown, the signal line 13 becomes low impedance (on). However, since the operation of the relay 30 requires some operation delay time, the contacts 31 are still open and are closed by the operation of the relay 30 after the operation delay time (see FIG. 2c). Therefore, the power confirmation signal 14 sent to the partner device turns on (low impedance) after the relay 30 operates. That is, the capacitor voltage
Comparator 2 during low or no V _c
Regardless of the undefined output of signal 4, signal 14 becomes a clear signal due to relay operation.

Next, as shown in Figure 2a, when the input voltage V _i drops to the detection voltage V _D when the power is turned off, the capacitor voltage V _c is still sufficiently higher than the operable voltage V _s , as shown in Figure 2 b. So, comparator 24
The output becomes high impedance (off). This state is maintained until the capacitor voltage V _c drops to V _s , and then the state becomes unstable (see b in the same figure).
However, during this time, as shown in FIG. 2c, the relay contact 31 is turned off, so the output signal 1
As shown in FIG. 2b, the circuit 4 continues to be in the off state from the time when the output 13 of the comparator 24 is turned off. In other words, the power supply confirmation signal 14 becomes a clear signal regardless of the undefined output of the comparator 24 due to a decrease in the capacitor voltage _Vc . For this purpose, of course, it is necessary to keep the capacitor voltage V _c equal to or higher than V _s until the relay 30 is restored, so the capacitance of the capacitor V _c needs to be set sufficiently large.

In the above embodiment, the input voltage V _i is a single positive voltage, but even when the input voltage is a negative voltage, a similar circuit (however, the polarity of the diode 22 is reversed) performs the same operation. can be set. Furthermore, when there are a plurality of input voltages, the desired purpose can be achieved by monitoring each input voltage using a similar circuit and appropriately combining the output logics thereof.

In this way, even if a comparator whose output is unstable or undefined when the operating voltage is lower than _Vs is used, the power confirmation signal can be reliably transmitted to the partner device.

Note that the diode 22 is a reverse current blocking circuit, and is used to prevent the voltage V _c charged in the capacitor 23 from flowing to a load other than the comparator 24, such as a main body logic device (not shown), and quickly decreasing when the power is turned off. Therefore, a resistor may be inserted in series and used, and it is also possible to replace it with a high resistor. In these cases, it is possible to prevent an excessive rush current from flowing into the capacitor 23 when the power is turned on.

〔Effect of the invention〕

As described above, according to the present invention, errors in interface signals can be prevented when power is turned on and off or when a power failure occurs. In particular, it is possible to operate reliably even when the voltage of the capacitor supplied to the comparator that compares the power supply input voltage is low.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram including a partial block diagram showing one embodiment of the present invention. FIG. 2 is a time chart showing the state of each part shown in FIG. 10... Input voltage line, 11... Line, 12... Divided voltage input line, 13... Comparator output signal line,
14...Power confirmation signal line, 20, 21...Resistor,
22...Diode, 23...Capacitor, 24
... Comparator, 30 ... Relay, 31 ... Relay make contact.

Claims (1)

[Scope of Claims] 1. A capacitor charged through a reverse current blocking circuit connected to a power input of a logic device, a comparator for comparing the power input with a reference voltage, and sending the output of the comparator as a power confirmation signal. The circuit that sends out the power confirmation signal is a make contact of a relay, and this relay is energized by the power input of the logic device, and the operating power of the comparator is supplied from the charging voltage of the capacitor. A power supply confirmation signal generation circuit for a logic device, characterized in that: