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JPH02192719A - Formation of single crystal semiconductor thin film - Google Patents

Formation of single crystal semiconductor thin film

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Publication number
JPH02192719A
JPH02192719A JP1283389A JP1283389A JPH02192719A JP H02192719 A JPH02192719 A JP H02192719A JP 1283389 A JP1283389 A JP 1283389A JP 1283389 A JP1283389 A JP 1283389A JP H02192719 A JPH02192719 A JP H02192719A
Authority
JP
Japan
Prior art keywords
film
thin film
groove
single crystal
semiconductor thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1283389A
Other languages
Japanese (ja)
Other versions
JP2694615B2 (en
Inventor
Kazuhiko Kawai
和彦 河合
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1283389A priority Critical patent/JP2694615B2/en
Publication of JPH02192719A publication Critical patent/JPH02192719A/en
Application granted granted Critical
Publication of JP2694615B2 publication Critical patent/JP2694615B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To enlarge a solid phase growth distance as well as to expand an effective area for forming a device by a method wherein a second amorphous Si film is single-crystallized using as a seed a highly doped single crystal Si film remained on a groove and a stripelike part parallel to the groove. CONSTITUTION:A groove 3 to reach an Si substrate 1 is provided in an SiO2 film 2 on the substrate 1 and a first amorphous Si film is formed on the whole surface of the film 2. Then, after an impurity is doped to the amorphous film in a high concentration, the amorphous film is single-crystallized to form a single crystal Si film 5. Then, the film 5 is removed by etching leaving the upper part of the groove 3 and a stripelike part parallel to the groove 3 and a non-doped second amorphous Si film is formed on the film 2 and the remained film 5. Moreover, after this Si film is single-crystallized to form a single crystal Si film 6, a flattening is performed and the films 5 and 6 are formed on the film 2 to form a SOI film 7.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、絶縁11Q上に単結晶半導体薄膜を形成する
単結晶半導体薄膜の形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for forming a single crystal semiconductor thin film on an insulator 11Q.

〔従来の技術〕[Conventional technology]

一般に、単結晶半導体基板上に絶縁膜を形成し、この絶
縁膜に基板が露出した溝を形成し、絶縁膜上及び溝上に
非晶質半導体薄膜を形成し、溝に露出しだ基板を種とし
て、熱処理によりこの薄膜を固相にて溝から順次単結晶
化する方法があり、こレバ再結晶化法と呼ばれ、S O
I (5ilicon  0nlns萌altOr )
技術において有用な手法であり、注目されでいる。
Generally, an insulating film is formed on a single-crystal semiconductor substrate, a groove in which the substrate is exposed is formed in the insulating film, an amorphous semiconductor thin film is formed on the insulating film and the groove, and the substrate exposed in the groove is seeded. There is a method in which this thin film is successively single-crystalized from the groove in a solid phase by heat treatment, which is called the lever recrystallization method.
I (5ilicon 0nlnsmoe altOr)
It is a useful technique in technology and is attracting attention.

ところで、このような固相成長による単結晶半導体薄膜
の形成の場合、8iを例にとると、非晶質S1薄膜は溝
内の基板との接触部から単結晶に相転位し、まず基板上
面に垂直方向(縦方向)に単結晶化が進み、次に基板上
面に平行方向(横方向)に単結晶化が進み、非晶質S1
薄膜が全域にわたって単結晶化する。
By the way, in the case of forming a single crystal semiconductor thin film by such solid phase growth, taking 8i as an example, the amorphous S1 thin film undergoes a phase transition to a single crystal from the contact part with the substrate in the groove, and first the upper surface of the substrate Single crystallization progresses in a direction perpendicular to (vertical) direction, and then single crystallization progresses in a direction parallel to the top surface of the substrate (lateral direction), resulting in amorphous S1.
The thin film becomes single crystal over the entire area.

しかし、非晶質S l薄膜が不純物を含む場合と含まな
い場合とで、固相成長距離が大きく異なり、不純物を含
まないノンドープの場合、固相成長距離は小さいため、
不純物の高濃度領域を設け、この領域を種として固相成
長距離の拡大を図ることが従来性なわれており、その1
例として特開昭63−60517号公報(HOIL 2
1/20)に記載の方法がある。
However, the solid phase growth distance differs greatly depending on whether the amorphous S1 thin film contains impurities or not, and the solid phase growth distance is small in the case of non-doped, which does not contain impurities.
Conventional practice has been to provide a region with high impurity concentration and use this region as a seed to expand the solid phase growth distance.
For example, Japanese Patent Application Laid-Open No. 63-60517 (HOIL 2
There is a method described in 1/20).

これは、絶縁膜上及び溝上に形成したノンドープの非晶
質半導体薄膜に、溝に直交する方向に不純物の高濃度領
域を複数平行に設け、溝内の基板とこの高濃度領域を種
としてノンドープの非晶質半導体薄膜を単結晶化するも
のである。
This is a non-doped amorphous semiconductor thin film formed on an insulating film and a trench, with multiple high-concentration regions of impurities arranged in parallel in a direction perpendicular to the trench, and non-doped using the substrate in the trench and these high-concentration regions as seeds. This method converts an amorphous semiconductor thin film into a single crystal.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前記公報に記載の方法では、2条の高濃度領域と溝とで
囲まれたノンドープ領域において、7字状に単結晶化が
進行するため、最終的に菱形状の複雑なパターンの結晶
亜粒界が形成され、デバイスの特性上この結晶亜粒界を
避けてデバイスのチャネルを形成する必要があることか
ら、有効にデバイスを形成し得る面積が限られてしまう
という問題点がある。
In the method described in the above publication, single crystallization progresses in a figure-7 shape in the non-doped region surrounded by the two high concentration regions and the groove, so that the final crystal subgrains form in a complex diamond-shaped pattern. Boundaries are formed, and it is necessary to form a device channel while avoiding these subgrain boundaries due to the characteristics of the device, which poses a problem in that the area in which a device can be effectively formed is limited.

本発明は、前記の点に留意してなされ、ノンドープの非
晶質半導体領域の固相成長距離を拡大し、デバイスを形
成し得る有効面積の拡張を図れるようにすることを目的
とする。
The present invention has been made with the above points in mind, and an object of the present invention is to extend the solid phase growth distance of a non-doped amorphous semiconductor region, thereby increasing the effective area in which a device can be formed.

〔課題を解決するだめの手段〕[Failure to solve the problem]

前記目的を達成するために、本発明の単結晶半導体薄膜
の形成方法では、単結晶半導体基板上に絶縁膜を形成し
、前記絶縁膜に前記基板が露出したiMを形成し、前記
絶縁膜上及び前記溝上に第1の非晶質半導体薄膜を形成
し、前記第1の非晶質半導体薄膜に不純物を高濃度にド
ープしたのち、前記第1の非晶質半導体薄膜を単結晶化
して単結晶半導体4膜を形成し、エツチングにより前記
溝上及びnIS記溝に平行な帯状部を残してmI記単結
晶半導体薄1模を除去し、前記絶縁膜上及び残存したi
f記単結晶半導体薄膜」二にノンドープの第2の非晶質
半導体薄膜を形成し、前記第2の非晶質半導体薄膜を単
結晶化することを特徴としている。
In order to achieve the above object, in the method for forming a single crystal semiconductor thin film of the present invention, an insulating film is formed on a single crystal semiconductor substrate, an iM in which the substrate is exposed is formed on the insulating film, and an iM is formed on the insulating film. and forming a first amorphous semiconductor thin film on the groove, doping the first amorphous semiconductor thin film with impurities at a high concentration, and then monocrystallizing the first amorphous semiconductor thin film to form a single crystal. 4 crystalline semiconductor films were formed, and the mI single crystal semiconductor thin film 1 was removed by etching leaving a strip parallel to the trench and the nIS trench, and the remaining i
The method is characterized in that a non-doped second amorphous semiconductor thin film is formed on the "single crystal semiconductor thin film" (f), and the second amorphous semiconductor thin film is made into a single crystal.

〔作用〕[Effect]

以上のように構成されているため、平坦化した第2の非
晶質半導体薄膜を単結晶化する場合に、溝上及び帯状部
の単結晶化した不純物の高濃度領域を種にして単結晶化
が進み、固相成長距離の拡大が図れ、しかも溝と帯状部
のほぼ中間位置に。
With the above structure, when the flattened second amorphous semiconductor thin film is single-crystalized, the single-crystal high-concentration region of the single-crystalized impurity on the groove and in the band is used as a seed for single-crystalization. As the growth progresses, the solid phase growth distance is expanded, and moreover, it is located approximately midway between the groove and the band.

溝に平行に結晶亜粒界が形成され、結晶亜粒界が従来の
ように複雑なパターンにならず、デバイス形成の為の有
効面積の拡張が図れる。
Crystal subgrain boundaries are formed parallel to the grooves, and the crystal subgrain boundaries do not form a complicated pattern as in the conventional method, thereby expanding the effective area for device formation.

〔実施例〕〔Example〕

実施例について図面を参照して説明する。 Examples will be described with reference to the drawings.

まず、単結晶Si薄膜の形成工程について第1図及び第
2図を用いて説明する。なお、第1図は最終的に単結晶
Si薄膜を形成した状態の斜視図、第2図(a) 、 
(t))はそれぞれ形成途中における斜視図である。
First, the process of forming a single crystal Si thin film will be explained with reference to FIGS. 1 and 2. In addition, FIG. 1 is a perspective view of the state in which the single crystal Si thin film is finally formed, FIG. 2(a),
(t)) is a perspective view in the middle of formation.

いま、第2図(a)に示すように、単結晶St基板(1
)上に絶縁11ssとしてS i02膜(2)を形成し
、5102膜(21に基板(1)が露出した溝(3)を
形成し、8i021摸(2)上及び溝(3)上に第1の
非晶質Si薄膜(以下第1のab+膜という)(4)を
形成する。
Now, as shown in FIG. 2(a), a single crystal St substrate (1
), a Si02 film (2) is formed as an insulator 11ss, a groove (3) in which the substrate (1) is exposed is formed in the 5102 film (21), and a groove (3) is formed on the 8i021 pattern (2) and the groove (3). A first amorphous Si thin film (hereinafter referred to as a first ab+ film) (4) is formed.

そして、イオン注入法により、第1のa−8i膜(4)
にリン〔P〕を3〜5XIO(cm  )の高濃度にド
ープしたのち、窒素雰囲気中において、600°C21
6時間の熱処理を施し、第1のa−8i膜(4)を単結
晶化し、て第1の単結晶S+薄膜C51を形成する。
Then, by ion implantation, the first a-8i film (4)
After doping with phosphorus [P] to a high concentration of 3 to 5XIO (cm2), it was heated at 600°C21 in a nitrogen atmosphere.
Heat treatment is performed for 6 hours to single-crystallize the first a-8i film (4), thereby forming a first single-crystal S+ thin film C51.

ここで、第1のa−8i膜(4)が高濃度にドープされ
ているため、固相成長距離は熱処理時間に応じて第3図
中の実線に示すように変化し、第3図から、成長距離が
最も長くなる熱処理時間として16時間を設定し、この
ときの固相成長距離は約39)tmである。なお、第3
因の飽和領域は多結晶化する領域である。
Here, since the first a-8i film (4) is highly doped, the solid phase growth distance changes as shown by the solid line in FIG. 3 depending on the heat treatment time, and from FIG. , the heat treatment time at which the growth distance is the longest is set at 16 hours, and the solid phase growth distance at this time is approximately 39) tm. In addition, the third
The saturated region is a polycrystalline region.

つぎに、第2(3)(1))に示すように、エツチング
により溝+31上及び溝(3)に平行な帯状部のSi薄
膜(5)を残してSi薄膜(5)を除去し、その後第1
図に示すように、Si Q21t:’さ(2)上及び残
存した81薄膜(5)上にノンドープの第2の非晶質S
i薄膜(以下第2のa−8i膜という)を形成し2、こ
の第2のa−8i膜に対して窒素雰囲気中において60
0℃、8時間の熱処理を施し、第2のa−8i膜を単結
晶化して第2の単結晶Si薄膜(6)を形成し、その後
このSi薄膜〔6)を平坦化し、第1.第2の単結晶S
i薄@f51 、 f6)をS io2膜(2)上に形
成してS01膜(7)を形成する。
Next, as shown in Section 2(3)(1)), the Si thin film (5) is removed by etching, leaving the Si thin film (5) on the groove +31 and in the band-shaped portion parallel to the groove (3). then the first
As shown in the figure, a non-doped second amorphous S
i thin film (hereinafter referred to as the second a-8i film) 2, and the second a-8i film was heated for 60 minutes in a nitrogen atmosphere.
Heat treatment was performed at 0° C. for 8 hours to single-crystallize the second a-8i film to form a second single-crystal Si thin film (6), and then planarize this Si thin film [6]. second single crystal S
i-thin @f51, f6) is formed on the Sio2 film (2) to form the S01 film (7).

ところで、ノンドープの第2のa−8i膜を単結晶化す
る場合、溝(3)上及び帯状部のハイトープの単結晶S
i薄1f9%(5膜全種にして単結晶化が進むため、固
相成長距離は熱処理時間に応じて第3肉中の1点鎖線に
示すように変化し、最大成長距離は600℃、8時間の
熱処理で約8μmとなり、従来の4〜5)rrnに比べ
てほぼ2倍に拡大する。
By the way, when the non-doped second a-8i film is made into a single crystal, the high-tope single crystal S on the groove (3) and the band-like portion is
i thin 1f9% (because single crystallization progresses for all 5 films, the solid phase growth distance changes as shown by the dashed line in the third layer depending on the heat treatment time, the maximum growth distance is 600 ° C, After 8 hours of heat treatment, it becomes about 8 μm, which is almost twice as large as the conventional 4-5) rrn.

このとき、溝(3)上のSi薄膜C5)と帯状部の8i
薄膜(5)とに平行に、両側から第2のa−8i膜の単
結晶化が進むため、第1図中の破線に示すように、溝(
3)と帯状部とのほぼ中間位置に、溝(3)に平行な直
線状に結晶亜粒界C8)が形成され、亜粒界(8)が従
来のように複雑なパターンにならない。
At this time, the Si thin film C5) on the groove (3) and the 8i
As the single crystallization of the second a-8i film progresses from both sides parallel to the thin film (5), the groove (
A crystal sub-grain boundary C8) is formed in a straight line parallel to the groove (3) at a position approximately midway between the groove (3) and the belt-shaped portion, and the sub-grain boundary (8) does not form a complicated pattern as in the conventional case.

そして、得られた80I膜(7)上にMOS)ランジス
タを形成する場合のゲート(G) 、ドレイン(DJ。
Then, a gate (G) and a drain (DJ) are formed when a MOS transistor is formed on the obtained 80I film (7).

ソース(8)の配置は、例えば第4図に示すようになり
、ローMO8)ランジヌタ(9)を、帯状部の第1の単
結晶S1薄膜(5)の近辺に、帯状部に直角方向を長尺
方向として形成し、p−MOS)ランジスタ00を、溝
(3)上の第1の単結晶S1薄嘆r5)の近辺に、溝に
平行に形成し2、溝(、(+と帯状部の中間の結晶亜粒
界【8)を避けてチャネルを形成すればよく、このよう
な/jc! IN KよってSOIg(nのデバイス形
成領域の有効利用が図れる。
The arrangement of the source (8) is, for example, as shown in FIG. A p-MOS transistor 00 is formed parallel to the groove in the vicinity of the first single crystal S1 thinning r5) on the groove (3). It is sufficient to form a channel by avoiding the crystal subgrain boundary [8] in the middle of the region, and by such /jc!INK, the device forming region of SOIg(n) can be effectively utilized.

このトキ、n −MOS )ランジスタ(9)のソース
コンタクト領域(Cs )を帯状部のハイトープの第1
の単結晶Si薄膜(5)上に形成し、ソースコンタクト
抵抗の低減を図っている。
In this case, the source contact region (Cs) of the n-MOS transistor (9) is
is formed on a single-crystal Si thin film (5) to reduce source contact resistance.

従って、前記実施例によると、ノンドープの第2のa−
8i膜を単結晶化する場合に、溝(3)上及び帯状部の
ハイトープの第1の単結晶Si薄膜(5)を種にしたた
め、第2のa−8i膜の固相成長距離を従来よりも大幅
に拡大することができ、結晶亜粒界が従来のように複雑
なパターンにならず、デバイス形成の為の有効面積の拡
張を図ることができる。
Therefore, according to the embodiment, the non-doped second a-
When monocrystalizing the 8i film, the high-tope first single-crystal Si thin film (5) on the groove (3) and in the band was used as a seed, so the solid phase growth distance of the second a-8i film was changed from the conventional method. The crystal subgrain boundaries do not form a complicated pattern as in the conventional case, and the effective area for device formation can be expanded.

なお、mJ記実施例では、単結晶S1薄膜を形成する場
合について説明したが、これに限るものではない。
In addition, although the case of forming a single-crystal S1 thin film was explained in the embodiment described in mJ, the present invention is not limited to this.

〔発明の効果〕〔Effect of the invention〕

本発明は、以上説明したように構成されているので、以
下に記載する効果を奏する。
Since the present invention is configured as described above, it produces the effects described below.

溝上及び帯状部に残存したハイトープの単結晶半導体薄
膜を種にして第2の非晶質半導体薄膜を単結晶化するた
め、ノンドープの第2の非晶質半導体薄膜の固相成長距
離を従来よりも大幅に拡大することができ、しかも結晶
亜粒界が溝と帯状部とのほぼ中間位置に溝に平行な直線
状に形成されることになυ、結晶亜粒界が従来のように
複雑なパターンにならず、デバイス形成の為の有効面積
の拡張を図ることができ、デバイス用有効面蹟の大きな
S 01膜を得る上で非常に有利である。
In order to single-crystallize the second amorphous semiconductor thin film using the high-tope single-crystal semiconductor thin film remaining on the grooves and in the strips, the solid-phase growth distance of the non-doped second amorphous semiconductor thin film is made longer than before. Moreover, the crystal subgrain boundaries are formed in a straight line parallel to the grooves at approximately the midpoint between the grooves and the strips, and the crystal subgrain boundaries are not as complex as in the past. This is very advantageous in obtaining an S 01 film with a large effective surface area for devices, since the effective area for device formation can be expanded without forming a pattern.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は、本発明の単結晶半導体薄膜の形成方法の1実施
例を示し、第1図は単結晶半導体薄膜を形成した状態の
斜視図、第2図(a) 、 (b)はそれぞれ形成途中
における斜視図、第3図は熱処理時間と固相成長距離と
の関係図、第4図はデバイスの配置パターンを示す平面
図である。 (1)・・・単結晶81基板、(2)・・・S i02
膜、(3)・・・溝、(5)。 (6)・・第1.第2の単結晶Si薄膜。
The drawings show an embodiment of the method for forming a single crystal semiconductor thin film according to the present invention, and FIG. 1 is a perspective view of a formed single crystal semiconductor thin film, and FIGS. FIG. 3 is a diagram showing the relationship between heat treatment time and solid phase growth distance, and FIG. 4 is a plan view showing the device arrangement pattern. (1)...Single crystal 81 substrate, (2)...S i02
Membrane, (3)...Groove, (5). (6)... 1st. Second single crystal Si thin film.

Claims (1)

【特許請求の範囲】[Claims] (1)単結晶半導体基板上に絶縁膜を形成し、前記絶縁
膜に前記基板が露出した溝を形成し、前記絶縁膜上及び
前記溝上に第1の非晶質半導体薄膜を形成し、前記第1
の非晶質半導体薄膜に不純物を高濃度にドープしたのち
、前記第1の非晶質半導体薄膜を単結晶化して単結晶半
導体薄膜を形成し、エッチングにより前記溝上及び前記
溝に平行な帯状部を残して前記単結晶半導体薄膜を除去
し、前記絶縁膜上及び残存した前記単結晶半導体薄膜上
にノンドープの第2の非晶質半導体薄膜を形成し、前記
第2の非晶質半導体薄膜を単結晶化することを特徴とす
る単結晶半導体薄膜の形成方法。
(1) forming an insulating film on a single crystal semiconductor substrate; forming a groove in the insulating film in which the substrate is exposed; forming a first amorphous semiconductor thin film on the insulating film and on the groove; 1st
After doping the first amorphous semiconductor thin film with impurities at a high concentration, the first amorphous semiconductor thin film is single-crystallized to form a single-crystal semiconductor thin film, and by etching, strips are formed on the groove and parallel to the groove. The single crystal semiconductor thin film is removed leaving behind the single crystal semiconductor thin film, a non-doped second amorphous semiconductor thin film is formed on the insulating film and the remaining single crystal semiconductor thin film, and the second amorphous semiconductor thin film is removed. A method for forming a single-crystal semiconductor thin film characterized by forming a single crystal.
JP1283389A 1989-01-20 1989-01-20 Method for forming single crystal semiconductor thin film Expired - Fee Related JP2694615B2 (en)

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JPH02192719A true JPH02192719A (en) 1990-07-30
JP2694615B2 JP2694615B2 (en) 1997-12-24

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