JPH02174170A - Thin-film transistor and two-layer polysilicon thin-film structure for thin-film resistor - Google Patents

Abstract

PURPOSE: To obtain a resistor with a large resistance value and a thin-film transistor with a high threshold voltage bay providing a diffusion stop area and stopping a dopant from being diffused from a high-concentration doped area to an undoped layer essential area along a crystal grain boundary. CONSTITUTION: Once the high-concentration doped layer (area) 1 as a 1st layer is formed, the layer is processed with, for example, oxygen to diffuse the oxygen 7 to the surface and crystal grain boundary 6 of the layer 1, and then the dopant is stopper from being diffused from the high-concentration dope layer 1 to the undoped layer (area) 2 as a 2nd layer which is formed thereafter. Consequently, even a resistor which has relatively short mask length can be made relatively large in resistance value and even a field-effect transistor having short mask length can be made relatively low in threshold value, so the resistor with the large resistance value and the field effect transistor with the high the high threshold voltage can easily be formed with high concentration.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a two-layer polysilicon thin film structure that is a two-layer polycrystalline thin film, and in particular to a two-layer polysilicon thin film structure that is miniaturized using oxygen diffusion technology. The present invention relates to a thin film field effect transistor and a thin film resistor.

[Prior Art] Highly resistive polysilicon is used for static random access memory (Static Random Access memory).
High storage density and low power consumption (Memory)
However, since the highly concentrated dopant in the grain boundaries has a high diffusion coefficient, it is difficult to make the resistor smaller when using a polysilicon thin film as a resistor. There wasn't. As a conventional technical document, R, 5akLo, etc.
IEEE International Electr
on Devices Meeting Procedure
dings (1986), “A, Novel 5c
aled Down Oxyg+n Implant
d Polysilicon Re5istor for
r future static RAMs.The idea is to miniaturize thin film resistors by injecting oxygen.Then, T, 0hz
One is IEEE Transacton on E
lectron Devices, Yol ED-32
, September (1985), p, +749-17
55, “Ion-Implanted Th1n P
olyc-rystal-line 5ilicon
High-Value Re5ists for ■
igh Dnsity Po1y-Load 5ta
dopants (e.g. arsenic) at the grain boundaries after high heat treatment by implanting oxygen into the polysilicon layer.
oT-Ohxone also stated that the rate of spread of is sharply reduced. IEEE Journal of 5olids
slate circuit, Vol, 5C-15, O
ct, (1980), p. 1151-461, “An
8Kx8Bif 5toic MOS RAM Fa
bricated byn-MO510-yell C
"MO5Technology", he stated that miniaturization of poly-containing thin film transistors and making them have as low a threshold voltage as possible are necessary conditions for realizing three-dimensional integrated circuits with high storage density and high operation speed. It states the necessity of downsizing and lowering the threshold.

[Problem to be Solved by the Invention 1] However, when oxygen is implanted using the method proposed by T,0bxone, it is possible to achieve the effect of downsizing polysilicon thin film resistors, but in the case of polysilicon thin film transistors, this is not possible. The problem was that it was not easy to manufacture. That is, according to method I of T, Qh2on, the threshold voltage of the manufactured polysilicon thin film transistor is increased, so in order to eliminate this and keep the threshold voltage low, when manufacturing the polysilicon thin film transistor, a resistor is added. At the time of implanting oxygen into the region, it was necessary to shield the polysilicon thin film transistor.

Therefore, in order to suppress the thread/cold voltage to a predetermined level, many monolithic graphic processes are required, making it difficult to manufacture polysilicon thin film transistors.

A first objective of the present invention is to try to prevent dopants from diffusing along grain boundaries from heavily doped regions into undoped layer-substantive regions.

A second objective is to seek to increase the miniaturization of polysilicon thin film resistors and polysilicon thin film transistors.

A third object is to provide a polysilicon thin film transistor with a low threshold voltage.

A fourth objective is to provide a process capable of manufacturing polysilicon thin film resistors and thin film transistors in the same layer without the need for extra monolithic graphic processes.

[Means for Solving the Problems 1] These objects of the present invention are such that when the first highly doped layer (region) is formed, oxygen treatment is applied to the core layer to improve the surface and crystal structure of the core layer. This is achieved by diffusing oxygen to the grain boundaries and preventing dopant from diffusing from the heavily doped layer into the undoped layer (region) of the second layer that is subsequently formed.

The present invention uses a two-layer polycrystalline (polysilicon) configuration, where the heavily doped layer is used as an electrode region (contact region) and the undoped layer is used as a resistive layer or channel layer of a MOS transistor. When formed as a resistor, a high resistance value can be obtained, and when formed as a thin film transistor, a relatively low threshold voltage can be obtained.

[Example] The above objects and features of the present invention will become clear from the following description and drawings.

FIG. 1 shows a longitudinal cross-sectional view of a two-layer poly-recon thin film resistor according to an embodiment of the present invention. Arsenic (As),
A heavily doped polysilicon layer (1) doped with phosphorus or boron (B) is used as the electrode of the thin film resistor, and a second N polysilicon layer (2) is of the intrinsic type (ib
It belongs to the lrinsic type) and is used as a high resistivity (resistance value per unit length) resistor. substrate(
3) is made of any insulator; the heavily doped polysilicon layer (1) is formed before the undoped intrinsic polysilicon layer (2) is formed.

FIG. 2 shows a longitudinal cross-sectional view of a two-layer polysilicon thin film transistor according to an embodiment of the present invention.

The heavily doped polysilicon layer (11) is used as an electrode, similar to the heavily doped layer (1) shown in FIG. 1, and in this case is used as the source and drain electrodes of a transistor. The channel region is formed in an intrinsic poly/recon layer (12) similar to the second polysilicon layer (2) of the resistor shown in FIG. Furthermore, a gate insulator layer (14) is laminated,
A gate electrode 15 is attached to the insulator layer to form a field effect transistor.

FIG. 3 shows a method of manufacturing the thin film resistor of FIG. As shown in FIG. 3(a), first, heavily doped polysilicon l (1) is formed on a substrate (3). This can be done, for example, by low-pressure chemical vapor deposition (t, pcvD).
) is formed at about 610 degrees Celsius. Next, Figure 3(b)
At a temperature of about 400-500 degrees C as shown in
Oxygen treatment is performed for 10 minutes to diffuse oxygen to the surface of the highly doped poly 7937 layer (1) and to the grain boundaries.

Oxygen molecules are shown as dots in the figure and diffuse into grain boundaries and the surface of layer (1), which are schematically represented by a lattice. Thereafter, an undoped intrinsic polysilicon layer (2) is formed on top as shown in FIG. 3(C). In this case also L
It is formed using the PCVD method at a temperature of about 560 degrees Celsius.

In the thin film resistor thus formed, the dopant doped in the heavily doped silicon layer (1) is not diffused into the essentially boron silicon layer (2) due to the presence of oxygen molecules. Furthermore, after the essential polysilicon layer (2) is formed, the oxygen molecules remain at the positions schematically shown in FIG. 3(c).

FIG. 4 shows the relationship between the resistivity (that is, the resistance value per unit length) of the thin film resistor subjected to the above oxygen treatment and the mask length, using the oxygen treatment time as a running parameter. From this figure, it can be seen that in a resistor with a short mask length, the resistivity decreases more rapidly as the oxygen treatment time becomes shorter. Therefore, it can be seen that oxygen treatment for a predetermined time or more is effective in obtaining high resistivity of a resistor with a short mask length.

After the steps shown in FIGS. 3(a) to 3(c) for forming a thin film resistor, the field effect transistor having the structure shown in FIG.
It is formed by forming an insulating layer (14) and a gate electrode (15).

In thin-film field effect transistors, if no oxygen treatment is performed, dopane I- can invade from the transistor's drain and source regions (i.e., the heavily doped polysilicon layer) into the channel region (i.e., the intrinsic polysilicon layer). However, in the field effect transistor according to the present invention, the highly doped poly-recon layer is treated with oxygen, so the threshold voltage of a thin film MOS transistor with a short channel length increases. can be prevented.

FIG. 5 shows a drain current (ID) vs. gate voltage (V CS) characteristic diagram of a thin film MO3I transistor according to the present invention. The transistor in this example has a radius of 50 fim, a length of 2 μm, and a channel layer thickness of 0.8
It is μm. The gate insulator layer is formed in two layers,
The bottom layer is 350 silicon dioxide (S10□) and the top layer is 300 silicon nitride (SwN+). During the above period, it can be seen that when the gate voltage reaches about 4V, the drain voltage rapidly decreases, but it can be seen that this voltage value is a threshold voltage and is at a relatively low level.

In the above explanation, it is assumed that the diffusion prevention region is formed by oxygen treatment or by using another gas, for example,
A similar effect can be obtained by using nitrogen instead of oxygen. Therefore, the present invention is not limited to oxygen treatment.

[Effects of the Invention] Since the present invention is configured as described above, even if the resistor has a relatively short mask length, its resistance value can be made relatively large. The threshold voltage can be made relatively low even with a short mask length, and therefore, resistors with a large resistance value and field effect transistors with a high threshold voltage can be easily formed in high density.

[Brief explanation of the drawing]

FIG. 1 is a vertical cross-sectional view of a two-layer polysilicon thin film resistor according to an embodiment of the present invention, FIG. 2 is a vertical cross-sectional view of a two-layer polysilicon thin film transistor according to an embodiment of the present invention, and FIG.
Fig. 4 is an explanatory diagram for explaining the main part of the manufacturing process of the two-layer poly-recon thin film resistor shown in the figure. The characteristic diagram shown in FIG. 5 is a characteristic diagram showing the drain current versus gate voltage characteristic of the thin film transistor according to the present invention. 1.11... Highly doped polysilicon layer (first layer) 2.12... Undoped essential polysilicon layer (second layer) 3... Substrate 14... Gate insulator layer 15.・・Gate electrode (4 other people) schematic diagram

Claims (1)

[Claims] 1. The first layer, which is a heavily doped layer, the second layer, which is an undoped layer, and which is formed in the heavily doped layer and is interposed between the heavily doped layer and the undoped layer. and a diffusion prevention region formed to prevent dopant doped in the heavily doped layer from diffusing from the heavily doped layer to the undoped layer. Layered polycrystalline semiconductor thin film structure. 2. The two-layer polycrystalline semiconductor thin film structure according to claim 1, wherein the diffusion blocking region is formed on the surface of the heavily doped layer by gas treatment. 3. The two-layer polycrystalline semiconductor thin film structure according to claim 2, wherein the gas treatment uses oxygen. 4. The two-layer polycrystalline semiconductor thin film structure according to claim 2, wherein the gas treatment uses nitrogen. 5. The two-layer polycrystalline semiconductor thin film structure of claim 1, wherein the structure constitutes a resistor, the undoped layer forming a high resistivity resistor, and the heavily doped layer forming a resistor. A two-layer polycrystalline semiconductor structure, characterized in that it forms a contact region. 6. The two-layer polycrystalline semiconductor thin film structure according to claim 1, wherein the semiconductor is silicon. 7. The two-layer polycrystalline semiconductor thin film structure according to claim 6, wherein the doped dopant is arsenic, phosphorus, or boron. 8. The two-layer polycrystalline semiconductor thin film structure according to claim 3, wherein the oxygen treatment is performed after the highly doped layer is doped. 9. The above oxygen treatment is carried out at 400℃ using diluted oxygen.
4. A two-layer polycrystalline semiconductor thin film structure according to claim 3, characterized in that it is carried out at a temperature range of -500<0>C. 10. A two-layer polycrystalline semiconductor thin film structure, characterized in that said undoped layer is used as a channel of a thin film field effect transistor, said channel comprising an insulated gate as a control electrode.