JPH02170243A - Self-diagnostic system for microprocessor - Google Patents

Abstract

PURPOSE:To detect the abnormal actions by preparing a step number setting mechanism, a set value register, a step number counter and an interruption production means and always monitoring the executing state of a microprocessor with all macroinstructions. CONSTITUTION:The number of steps are set based on the type of a macroinstruction when a step number setting mechanism 13 decomposes the macroinstruction into a microinstruction and executes this microinstruction. A set value register 7 holds the number of steps set by the mechanism 13, and the step number count value is counted up every time a step number counter 10 decomposes a macroinstruction into a microinstruction and executes it. Then an interruption production means 21 compares the step number count value counted up by the counter 10 with the set number of steps held by the register 7 when the execution of the macroinstruction is through. When both values do not coincide an interruption is produced based on the result of this comparison. Thus an abnormal action is detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a self-diagnosis method for a microprocessor, and particularly to a microprocessor that decomposes the macro instruction into micro instructions and executes the macro instruction, and monitors the execution status of the macro instruction. Regarding self-diagnosis method.

[Conventional technology]

Conventionally, self-diagnosis methods for this type of microprocessor, especially methods for monitoring the execution time of a microprocessor, have been used to detect problems caused by interruptions in the execution of specific important macro instructions (read instructions, write instructions, etc.) for some reason. A timeout system has been used in which an interrupt is issued to indicate when a predetermined limit time has been exceeded.

[Problem to be solved by the invention]

In the conventional microprocessor self-diagnosis method (timeout detection method) described above, an interrupt is issued only when execution of a specific macro instruction is interrupted for some reason and exceeds a predetermined time limit. Although it is possible to detect a situation where the execution of a specific macro instruction is interrupted for some reason and becomes impossible to execute, it is possible to detect a situation where the execution of a specific macro instruction is interrupted for some reason, but it is possible to detect a situation where the execution of a specific macro instruction is being performed without interruption, but compared to normal operation. It is possible to detect abnormal behavior in which the execution speed becomes faster or slower (such abnormal behavior is caused by error factors such as incorrect sequence of the microprogram (a collection of microinstructions) or incorrect operation of the microprogram). The drawback is that it cannot be done.

In view of the above-mentioned points, an object of the present invention is to provide a self-diagnosis method for a microprocessor that can detect abnormal operation when its execution speed is faster or slower than normal operation. be.

[Means to solve the problem]

The microprocessor self-diagnosis method of the present invention is a microprocessor that is controlled by a microprogram and that decomposes macro instructions into micro instructions and executes them. A step number setting mechanism that sets a setting value based on the instruction type of the macro instruction, a setting value register that holds the step number setting value set by this step number setting mechanism, and a setting value register that disassembles the macro instruction into micro instructions. A step number counter that increments a step number count value each time a microinstruction is executed while the macroinstruction is being executed, and the step number counter counts the count value when the execution of the macroinstruction is completed. an interrupt issuing means that compares the updated step number count value with the step number set value held in the set value register and issues an interrupt based on the magnitude relationship between the two if the two do not match; have

[Effect]

In the microprocessor self-diagnosis method of the present invention, the step number setting mechanism sets the step number setting value when a macro instruction is broken down into micro instructions and executed based on the instruction type of the macro instruction, and the setting value register is set. Holds the step number setting value set by the step number setting mechanism,
The step number counter counts and amplifies the step number count value every time a microinstruction is executed while the macroinstruction is broken down into microinstructions and executed, and the interrupt issuing means interrupts the step count value when the execution of the macroinstruction is completed. Compare the step number count value counted up by the step number counter with the step number setting value held in the setting value register, and if the two do not match, based on the magnitude relationship between the two. Issue an interrupt.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a microprocessor (microprocessor l) in which an embodiment of the microprocessor self-diagnosis method of the present invention is implemented. This microprocessor l includes an instruction decoding section 2, a control section 3,
It is configured to include an instruction execution section 4, a bus control section 5, and a diagnosis section 6.

The instruction decoder 2 includes an abnormal operation response mechanism 12 and a step number setting mechanism 13.

The control unit 3 includes a step number counter lO and an abnormality detection mechanism 11.

The diagnostic section 6 includes a set value register 7, a comparison mechanism 8, and a count value register 9.

The comparison mechanism 8 in the diagnosis section 6 and the abnormality detection mechanism 11 in the control section 3 realize an interrupt issuing means.

Next, the operation of the microprocessor self-diagnosis system of this embodiment configured as described above will be explained.

The microprocessor 1 communicates with external memory (not shown) and input/output devices (not shown) via the bus control unit 5.
i! (Control signal 14. Address 24 and data 25)
are being exchanged.

The instruction decoding unit 2 decodes the macro instruction 15 read from an external memory via the Hass control unit 5 (the instruction type of the macro instruction 15 is checked, and the macro instruction 15 is decomposed into micro instructions 17). .

Based on this decoding, the step number setting mechanism 13 in the instruction decoding unit 2 in the microprocessor l sets the macro instruction 15.
sends the disassembled microinstruction 17 to the control unit 3, and the set value of the number of microprogram steps (the number of microinstructions 17 in which the macroinstruction 15 is disassembled) is determined by the instruction type of the macroinstruction 15. Step number setting 4
a16 is sent to the setting value register 7 in the diagnostic section 6.

The control unit 3 that has received the microinstruction 17 executes the instruction execution unit 4
A control signal 18 based on the microinstruction 17 is sent to the microinstruction 17 .

At the same time, the step number counter 10 in the control unit 3 indicates the number of executed microinstructions 17 (step number count value 22).
) is counted up.

The instruction execution unit 4 that receives the control signal 18 executes each microinstruction.

In this case, if it is necessary to exchange data with an external memory, etc., address 19, which becomes address 24, is sent to bus control unit 5, and data 20 is input/output based on data 25. At this time, When the microinstruction 17 is placed in a wait state due to a memory access or the like, the microinstruction 17 enters a wait state, so the step number counter IO stops the count amplifier in synchronization with the wait state.

When the execution of the macro instruction 15 (the execution performed by decomposing the macro instruction 15 into micro instructions 17) is completed, the step number counter 10 in the control unit 3 uses the step number count value 22 at that time as the count in the diagnostic unit 6. Send to value register 9.

A comparison mechanism 8 in the diagnosis section 6 compares the step number setting value 16 held in the setting value register 7 and the count value register 9.
The abnormality detection mechanism 11 in the control unit 3 compares the step number count value 22 held in the control unit 3 with the diagnostic result 23 indicating whether the two are equal or not, and if not equal, which one is larger or smaller (size relationship). Send to.

Upon receiving the diagnosis result 23, the abnormality detection mechanism 11 detects the diagnosis result 2.
Insufficient number of execution steps based on 3 (setting value register 7
The step number setting (116 is larger than the step number count value 22 in the count value register 9) or the execution step number exceeds (the step number setting value 16 in the setting value register 7 is the step number in the count value register 9) When an abnormal operation such as a state smaller than the count value 22 is detected, an abnormal operation interrupt signal 21 is issued to the abnormal operation handling mechanism 12 in the instruction decoder 2.

Based on the abnormal operation interrupt signal 21, the abnormal operation response mechanism 12 takes countermeasures against abnormal operations such as a shortage in the number of executed steps or an excess of the number of executed steps.

〔Effect of the invention〕

As explained above, the present invention provides a step number setting mechanism, a set value register, a step number counter, and an interrupt issuing means to constantly monitor the execution state of a microprocessor for all macro instructions, thereby preventing irregularities in the sequence of microprograms. It is possible to detect an abnormal operation in which the execution speed of a macro instruction becomes faster or slower due to an incorrect operation of a microprogram, etc., and to issue an interrupt (abnormal operation interrupt signal). This has the effect of preventing military and police forces from causing serious troubles such as memory and file destruction due to runaway or malfunction (for example, by malfunctioning a read command as a write command).

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a microprocessor in which an embodiment of the present invention is implemented. In the figure, 1... Microprocessor, 2... Instruction decoding section, 3... Control section, 4... Instruction execution section, 5... Bus control section, 6... Diagnosis section, 7. ...Set value register, 8.Comparison mechanism, 9.Count value register, lO..Step number counter, 11. . 12. .13. .. 14, 18 15.. 16. .・ ・ ・ 19.24・ 20.25・ 21 ・ ・ ・ 22・ ・ 23・ ・ ・ Abnormality detection mechanism, abnormal operation response mechanism, step number setting mechanism, control signal, macro instruction, step number setting value, micro instruction , address, data, abnormal operation interrupt signal, step count value, and diagnostic results.

Claims (1)

[Scope of Claims] In a microprocessor that is controlled by a microprogram and executes a macro instruction by breaking it down into micro instructions, the number of steps set when the macro instruction is broken down into micro instructions and executed is defined as the macro instruction. A step number setting mechanism that sets the number of steps based on the instruction type of the instruction, a setting value register that holds the step number setting value set by this step number setting mechanism, and a macro instruction that is broken down into micro instructions and executed. a step number counter that increments a step number count value each time a microinstruction is executed; and a step number count value that is incremented by the step number counter when execution of the macro instruction is completed, and the set value. A self-diagnosis method for a microprocessor, comprising an interrupt issuing means that compares a step number setting value held in a register and, if the two do not match, issues an interrupt based on the magnitude relationship between the two. .