JPH02163834A - Multi-task processing system - Google Patents

Abstract

PURPOSE:To increase the task switching speed by preparing plural pairs of various register groups which are needed for execution of tasks of a CPU and selecting and using an optional group via a group pointer register which secures the correspondence to the tasks to be executed. CONSTITUTION:At switch of tasks to be executed, an operating system 9 designates a group pointer to select and use various register groups 12 corresponding to the tasks to be executed and sets the group pointer to a group pointer register 11. A CPU 10 selects the groups 12 based on the pointer set to the register 11 and executes the tasks in accordance with the contents of the groups 12. As a result, the task switching speed is increased.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a central processing unit that performs calculations and controls necessary for data processing, and particularly relates to a multi-task processing method for a central processing unit that performs multi-task processing. It is.

C. Prior Art) Figure 3 is a block diagram for explaining a conventional multi-task processing method, in particular the saving and restoring of the contents of various registers in a CPU (central processing unit) by task switching in a computer system. This is a simple illustration of how it is done. In the figure, 1 is the CPU that performs calculations and controls necessary for data processing, 2 is the program status word register (PSW REG) that sets the program status word, and 3 is used for program mapping. The base register (BASEREG) group 4 is an index register (i
ndex Register) group, 5 is a general-purpose register (G RRE G) used during program execution processing
It is a group. 6 is a memory bus (M
-BUS) a Ta5ko, Ta5k+, =-,
Ta5kt indicates the memory arrangement of tasks logically developed on the main storage device 7.

Next, the operation will be explained. Here, we will explain the most primitive operations when switching tasks in a multi-task environment, that is, task switching. First, for the task Ta5ka currently being executed by the CPUI, the operating
The system attempts to start task Ta5J that is entered in another queue. The operating system first suspends processing of the currently running task and
Next, the contents of the status word register 2, base register group 3, index register group 4, and general register group 5 of the current work, which are required to restart and reprocess task Ta5ko, are stored in memory. bus 6
is saved to the save area of task Ta5ko (the shaded area in the figure) in the main memory 7 via The processing of task Ta5kt is restarted by reloading (reload, door) the contents of the corresponding registers into register group 5, base register group 3, and index register group 4, and then restoring the contents of status word register 2. executed. In this way, each time the operating system switches from the currently executing task to the next one,
The contents of various registers in the central processing unit 1 are stored in the main memory 7.
or load it from the main storage device 7.

[Problem to be solved by the invention]

Conventional multi-task processing methods operate as described above, so each time a task switch occurs, the operating system saves and stores the contents of various registers in the central processing unit to and from the main memory. Furthermore, there is a problem in that it is difficult to reduce hardware overhead due to the intervention of operations on the main memory.

This invention was made in order to solve the above-mentioned problems, and it minimizes the need for the operating system to save and load the contents of various registers inside the central processing unit to and from the main memory, thereby improving hardware efficiency. To provide a multi-task processing method that can significantly reduce hardware overhead and speed up task switching by making it possible to change the contents of various registers inside a central processing unit without going through the main memory. The purpose is to

(Means for Solving the Problems) A multi-task processing method according to the present invention provides a central processing unit with a plurality of register groups 12 required for executing a task, and prepares a plurality of register groups 12 for each task. A group pointer register 11 is provided for setting a group pointer for selecting and using an arbitrary group corresponding to a task to be executed by the central processing unit 10 from among the groups. is specified, a group of various register groups 12 in the central processing unit 10 required for the task to be executed is selected, and the task is executed using the various register groups 12 of the selected group. It is something to do.

[Effect]

In this multi-task processing method, when switching the task to be executed, the operating system 9 specifies a group pointer for selecting and using the group of the various register groups 12 corresponding to the task to be executed, and It is set in the pointer register 11, and the central processing unit 10 selects a group of the various register groups 12 according to the set group pointer, and executes a task using the contents of the various register groups 12 of the group.

C Embodiment of the Invention] FIG. 1 is a block diagram showing the main part configuration of a central processing unit that employs a multi-task processing method according to an embodiment of the invention. In the figure, 11 is a group pointer register for setting a group pointer for selecting and using a group of arbitrary various register groups corresponding to the task executed by the central processing unit 10, and 12 is a group pointer register for executing the task. This is a group of various registers required for

One group of various registers 12 includes a program status word that sets a program status word.
word shadow register (PSWS) and base
register (BASE REG), index register (INDEX REG), general register (GRREG), floating register (FLRREG), and control register (CO
NTROLREG). 13.14
is an internal bus within the central processing unit 10; 15 is a group of logical blocks within the central processing unit IO other than the group pointer register 11, various register groups 12, and internal buses 13 and 14; 16 is a program within the central processing unit IO - Status word register (PSW REG).

FIG. 2 is a detailed configuration diagram of a plurality of various register groups 12 shown in FIG. 1. In Figure 2, 21
is a program status word register (PSWS) prepared in multiple sets in the central processing unit ■0.
22 is a penis register (BASE REG) for addressing programs or data on the main memory. In this embodiment, the base register 22 has four sets of BASE REGO~3. There is. Similar to the base register 22, 23 is an index register (INDEX RE) for indirect addressing of programs or data on the main memory.
G), and in this example INDEX REGO~
I have 3 and 4 pairs.

24 is a general-purpose register used for arithmetic or logical operations and time storage, and a floating register (FLR) for performing floating point operations, and 25 is a control register and status register for controlling the hardware. This is a control status register (CNST REG) which is a general term for registers. 26
is a group pointer register for associating tasks to be executed by the operating system with a plurality of groups of registers 21-25, and corresponds to group pointer register 11 in FIG. A program status word register 27 indicates the execution state of the central processing unit 10, and corresponds to the program status word register 16 in FIG.

Next, in the central processing unit 10 of this embodiment, the task
Operations related to switching will be explained with reference to FIGS. 1 and 2. First, in order for the operating system 9 to operate, groups (Group) O~ in FIG.
Any one group among the i+1 various register groups 12 of i is allocated, and the remaining one group of various register groups 12 are dynamically allocated by the operating system 9 for independent task processing, and the task execution used when When executing a new task on the central processing unit 10, the operating system 9 associates various register groups 12 of unused groups with the task, and registers the registers 12 required for the execution of the task. A predetermined value is loaded into each register from the corresponding task area of the main memory, and then the group value of the various register groups 12 associated with the previous task is set in the group pointer register 11, and the central processing unit 10 to S V C (Superν1ser Ca1
l) Execute instructions. The central processing unit 10 uses SVC internally.
generates an interrupt, uses this as a trigger to select various registers of the group specified by the group pointer register 11 (registers to which a predetermined register value has already been written by the operating system 9); The contents of the program status word shadow register (PSWS) in the register group 12 shown in FIG. 1 in this register group are loaded into the program status word register 16, and from this point on execution begins. central processing unit IO
are the base register (BASEREG), index register (INDEXREG), and general register shown in FIG. 2 of the group specified by the group pointer register 11 for the execution of the task.
Register (GRREG) floating register (
FLRREG), and control register (CO
NTROLREG) to execute the task processing.

In this manner, at the start of execution of a new task, loading of register values from the main memory to the various register groups 12 of an arbitrary group occurs.

Next, the operation of task switching between a plurality of tasks entered in a queue for resuming task execution will be described. The factors that generate task switching are determined by the priority of each task entered in the queue and the unit execution time assigned to any task. The operating system 9 receives a timer interrupt from the processing device 10, and executes task switching processing. This task switching process is performed in the central processing unit 10 in this embodiment as follows.

First, when a timer interrupt is received, the contents of the program status word register 16 in the register group of the group currently being used among the various register groups 12 of the plurality of groups shown in FIG. 1 are saved, and then The register group used by the operating system 9 is selected, and the contents of the program status word shadow register in the various register groups 12 are moved to the program status word register 16, and the operating system 9 works. Next, the operating system 9 examines the queue and determines the task to start or restart execution next. If the task is to restart execution, the operating system 9 changes the group values of the various register groups 12, which are already associated, to the group pointer. The command is set in the register 11 and an SVC command is issued to the central processing unit 10. The central processing unit 10 that received this SVC command executes the SVC command as before.
Generates a VC interrupt and uses this as a trigger for group
Select the register group 12 of the group indicated by the pointer register 11, move the contents of the program status word shadow register of the register group 12 to the program status word register 16, and from this point on, the task Resumes execution.

As described above, task switching processing for starting and resuming execution of tasks in a multi-task environment is performed.

In this way, according to the above embodiment, when switching tasks to be executed, simply changing the group designation of multiple sets of register groups can save the contents of the register group of the currently executing task and execute the next task. 7. Since such processing can be performed within the central processing unit, hardware overhead can be significantly reduced by eliminating the need to access the main memory. can.

In addition, in the above embodiment, the various register groups of the central processing unit required for the execution of tasks are referred to as multiple groups of register groups, and are shown as being composed of hardware registers. (Random access memory) can be used to achieve similar effects.

〔Effect of the invention〕

As described above, according to the present invention, there are multiple sets of various register groups required for the execution of tasks by the central processing unit, and any group can be selected and used with the group pointer register to be associated with the execution task. I did it like this,
At the start stage of task execution, it is necessary to load registers from the main memory, but when switching tasks to resume execution, it is necessary to save and load the contents of various registers from or to the main memory. This makes it possible to change the contents of various registers without going through the main memory, reducing the overhead associated with the operating system's save and load operations to the main memory. In this case, task switching can be performed only by group switching of register groups, and therefore, the effect of speeding up task switching can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the main part configuration of a central processing unit employing a multi-task processing method according to an embodiment of the present invention, and FIG. 2 is a detailed block diagram of the various register groups 12 shown in FIG. 1. , FIG. 3 is a block diagram showing the configuration of a conventional multi-task processing system. 9... Operating system, 10... Central processing unit, 11... Group voting register,
12...Various register groups. Masterful

Claims (1)

[Claims] Multiple sets of various register groups required to execute a task are prepared in the central processing unit for each task, and any group corresponding to the task to be executed by the central processing unit is selected from among these multiple groups. - Provide a group pointer register to set the group pointer for use by the operating system to specify the group pointer and specify the group of various registers in the central processing unit needed for the task to be performed. A multi-task processing method characterized by selecting and executing a task using various register groups of the selected group.