JPH02144928A - Mounting of semiconductor pellet - Google Patents
Mounting of semiconductor pelletInfo
- Publication number
- JPH02144928A JPH02144928A JP29848488A JP29848488A JPH02144928A JP H02144928 A JPH02144928 A JP H02144928A JP 29848488 A JP29848488 A JP 29848488A JP 29848488 A JP29848488 A JP 29848488A JP H02144928 A JPH02144928 A JP H02144928A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor pellet
- solder
- semiconductor
- pellet
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 239000008188 pellet Substances 0.000 title claims abstract description 68
- 229910000679 solder Inorganic materials 0.000 claims abstract description 39
- 239000002184 metal Substances 0.000 claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 abstract description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052799 carbon Inorganic materials 0.000 abstract description 3
- 239000012141 concentrate Substances 0.000 abstract 1
- 230000017525 heat dissipation Effects 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 241000607598 Vibrio Species 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
Landscapes
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、リフロー半田付けにより半導体ペレットを金
属ポスト上に固定する方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for fixing semiconductor pellets onto metal posts by reflow soldering.
電子部品の構成要素である半導体ペレ7)の内、発熱量
の多い電力用半導体ペレット、例えばパワートランジス
タ用の半導体ペレットは、一般に、放熱板に半田付けさ
れ、その動作時に発生する熱を半田を介して放熱板に伝
え、半導体ペレットの温度上昇を抑え安定動作するよう
にしている。Among the semiconductor pellets 7) that are the constituent elements of electronic components, power semiconductor pellets that generate a large amount of heat, such as semiconductor pellets for power transistors, are generally soldered to a heat sink to dissipate the heat generated during operation. The heat is transmitted to the heat dissipation plate through the semiconductor pellet, suppressing the temperature rise of the semiconductor pellet and ensuring stable operation.
ところで、電力用の半導体ペレットを有するハイブリッ
トICでは、熱伝導率の悪いセラミック製の絶縁基板を
用いる場合に、以下のような方法がとられている。即ち
、第4図に示す如く、絶縁基板(1)上の半導体ペレッ
トマウント個所に、予め放熱部材となる金属ポスト(2
)を固設しておき、この金属ボスト(2)上面のマウン
トランド(3)上に、シート状にした半田(4)を介し
て半導体ペレット(5)を載置し、更に、金属ボスト(
2)及び半導体ペレット(5)の外周に、半導体ペレッ
ト(5)のマウントランド(3)に対する位置ズレ防止
用のカーボン治具(6)を被嵌させておく。そして、こ
の状態で絶縁基板(1)をコンベア等によりリフロー炉
内に搬入し、高温雰囲気中に置いて、上記半田(4)を
溶融させ、半導体ペレット(5)を金属ポスト(2)の
マウントランド(3)上に半田付けしている。又、これ
と同時に、絶縁基板(1)上の他の個所にクリーム半田
等を用いて位置決め配置されたチップ状電子部品(7)
等の半田付けも一括して行なっている。By the way, in a hybrid IC having a semiconductor pellet for power use, the following method is used when an insulating substrate made of ceramic with poor thermal conductivity is used. That is, as shown in FIG. 4, a metal post (2) serving as a heat dissipation member is placed in advance at the semiconductor pellet mounting location on the insulating substrate (1).
) is fixedly installed, a semiconductor pellet (5) is placed on the mounting land (3) on the top surface of the metal post (2) via a sheet of solder (4), and then the metal post (
2) and a carbon jig (6) for preventing displacement of the semiconductor pellet (5) with respect to the mounting land (3) is fitted around the outer periphery of the semiconductor pellet (5). In this state, the insulating substrate (1) is carried into a reflow oven using a conveyor or the like, placed in a high temperature atmosphere, the solder (4) is melted, and the semiconductor pellet (5) is mounted on the metal post (2). It is soldered onto the land (3). At the same time, chip-shaped electronic components (7) are positioned and placed on other locations on the insulating substrate (1) using cream solder or the like.
We also do all the soldering.
このようにして電力用半導体ペレット(5)を半田付け
すると、次のような問題が生じる。When the power semiconductor pellets (5) are soldered in this manner, the following problems occur.
即ち、マウントランド(3)と半導体ペレット(5)と
の間に位置する半田(4)がリフロー炉内で溶融し、マ
ウントランド(3)の表面及び半導体ペレット(5)の
裏面に溶着する時、半田(4)は表面張力の作用を受け
る。このため、半田(4)はマウントランド(3)の表
面及び半導体ペレット(5)の裏面に均一には溶着せず
、この部分にスポット状の空間が多数形成され、ボイド
を生ずる。このボイド部分は非常に熱伝導率が低いため
、半導体ペレット(5)からの熱が金属ポスト(2)に
十分伝わらなくなる。従って、金属ポスト(2)による
放熱が不十分となり、半導体ペレット(5)が加熱によ
って破損しやすくなるため、上記半導体ペレット(5)
を組込んだ電子部品の信頼性が低下するといった問題が
あった。That is, when the solder (4) located between the mount land (3) and the semiconductor pellet (5) is melted in the reflow oven and welded to the surface of the mount land (3) and the back surface of the semiconductor pellet (5). , the solder (4) is subjected to surface tension. Therefore, the solder (4) is not uniformly welded to the surface of the mount land (3) and the back surface of the semiconductor pellet (5), and many spot-like spaces are formed in these areas, resulting in voids. Since this void portion has extremely low thermal conductivity, heat from the semiconductor pellet (5) is not sufficiently transferred to the metal post (2). Therefore, the heat dissipation by the metal post (2) becomes insufficient, and the semiconductor pellet (5) becomes easily damaged by heating.
There has been a problem in that the reliability of electronic components incorporating it is reduced.
半導体ペレットを金属ポスト上のマウントランドに半田
を介してリフロー半田付けするマウント方法に於いて、
上記半田を、半導体ペレットの発熱量の少ない部分と対
応する部分に供給することを特徴とする半導体ペレット
のマウント方法を提供する。In a mounting method in which semiconductor pellets are reflow soldered to mounting lands on metal posts,
A method for mounting a semiconductor pellet is provided, characterized in that the solder is supplied to a portion of the semiconductor pellet that corresponds to a portion of the semiconductor pellet that generates less heat.
上記構成によりボイドの発生個所を、半導体ペレットの
発熱量の少ない部分に築申させることができる。With the above configuration, voids can be generated in the portions of the semiconductor pellet that generate less heat.
第1図乃至第3図は、本発明に係るマウント方法により
、金属ポスト上に電力用の半導体ペレットをリフロー半
田付けする時の例を示すものである。同図に於いて、(
10)はバイブリソ)IC用のセラミック製絶縁基板、
(1))は絶縁基板(10)上の半導体ペレットマウン
ト個所に固設した金属ポスト、(13)は金属ポスト(
1))上面のマウントランド(12)上に半田付けされ
る電力用の半導体ペレットである。 (14)は絶縁
基板(10)のりフロー炉への搬入以前に、金属ポスト
(1))のマウントランド(12)と半導体ペレット(
13)との間に供給される半田である。この半田(14
)の両者間への供給は、半田(14)をブロック状にし
、このブロック状をした半田(14)をペレット表面側
に形成された、発熱量の少ないベース領域(13a)と
対向する位置にのみ供給し、発熱量の多いコレクタ領域
(13b )と対向する位置には半田(14)を供給し
ないようにする。即ち、半導体ペレット(13) @金
属ポスト(1))上へのマウント時には、先ず、金属ポ
スト(1))上面のマウントランド(12)上の、上記
半導体ペレソ) (13)のベース領域(13a)と対
向する部分(12a)上にのみ、半田(14)をブロッ
ク状に供給し、この後、この上から半導体ペレフl−(
13)を載置する。すると、半田(14)は、半導体ベ
レー/ )裏面(13C)の内、半導体ペレット表面側
に形成されたベース領域(13a)と対向する部分との
み接触し、この時点では、第2図に示す如く、半導体ペ
レット(13)は、マウントランド(12)上に若干傾
斜した状態で載置される。そして、この後、金属ポスト
(1))及び半導体ペレット(13)の周囲に、従来と
同様、カーボン治具(15)を被嵌させ、半導体ペレッ
ト(13)の位置ズレを防止した後、この絶縁基板(1
0)をリフロー炉内に搬入し、高温雰囲気中で半田(1
4)を溶融させ、半導体ベレッ) (13)をマウント
ランド(12)上に半田付けする。このリフロー炉内で
の半田(14)の溶融時、半田(14)は溶融するに従
ってマウントランド(12)と半導体ベレッ) (13
)との間に形成された隙間(16)内に毛管現像によっ
て進入して行き、最終的には、第3図に示す如く、マウ
ントランド(12) と半導体ペレット(12)との間
に半田(14)の層が均一に形成された状態で半田付け
される。このように、溶融した半田(14)が、マウン
トランド(12)と半導体ベレット(13)との間に形
成された隙間(16)内に広がるようにしておけば、こ
の半田拡散時には、半田(I4)は、マウントランド(
12)の表面及び半導体ベレン) (13)の裏面(1
3c)に確実に密着した状態で広がって行くため、この
間でボイドが発生することはなく、ボイドは半田(14
)の熔融以前にマウントランド(12)及び半導体ベレ
ッ) (13)と接触していた個所のみに発生する。1 to 3 show examples of reflow soldering of power semiconductor pellets onto metal posts using the mounting method according to the present invention. In the same figure, (
10) is a ceramic insulating substrate for Vibrio IC,
(1)) is a metal post fixed to the semiconductor pellet mounting location on the insulating substrate (10), (13) is a metal post (
1)) A power semiconductor pellet soldered onto the top mounting land (12). (14) is the insulating substrate (10) and the mounting land (12) of the metal post (1)) and the semiconductor pellet (
13) is the solder supplied between the This solder (14
) is supplied between the two by forming the solder (14) into a block, and placing the block-shaped solder (14) at a position facing the base region (13a) with low heat generation, which is formed on the surface side of the pellet. Solder (14) is not supplied to the position facing the collector region (13b) which generates a large amount of heat. That is, when mounting the semiconductor pellet (13) on the metal post (1), first, the base region (13a) of the semiconductor pellet (13) is placed on the mounting land (12) on the top surface of the metal post (1). ) The solder (14) is supplied in a block shape only on the portion (12a) facing the semiconductor pereph l-(
13). Then, the solder (14) contacts only the portion of the back surface (13C) of the semiconductor pellet that faces the base region (13a) formed on the front surface side of the semiconductor pellet, and at this point, the solder (14) contacts only the portion of the back surface (13C) of the semiconductor pellet that faces the base region (13a) formed on the front surface side of the semiconductor pellet. Thus, the semiconductor pellet (13) is placed on the mounting land (12) in a slightly inclined state. After that, a carbon jig (15) is fitted around the metal post (1)) and the semiconductor pellet (13) to prevent the semiconductor pellet (13) from shifting, as in the conventional case. Insulated substrate (1
0) into a reflow oven and solder (1) in a high temperature atmosphere.
4) and solder the semiconductor bellet (13) onto the mount land (12). When the solder (14) is melted in this reflow oven, the solder (14) becomes attached to the mount land (12) and the semiconductor bellet (13) as it melts.
) The solder penetrates into the gap (16) formed between the solder and the semiconductor pellet (12) by capillary development, and finally, as shown in FIG. The layer (14) is soldered in a uniformly formed state. In this way, if the molten solder (14) is allowed to spread within the gap (16) formed between the mount land (12) and the semiconductor pellet (13), the solder ( I4) is Mountland (
(12) surface and semiconductor belene) (13) back surface (1
3c), so no voids will be generated during this time, and the voids will remain in contact with the solder (14).
) occurs only in areas that were in contact with mount land (12) and semiconductor beret (13) before melting.
即ち、ボイドの発生個所は、半導体ペレット(13)の
表面側に形成した発熱量の少ないベース領域(13a)
と対向する部分のみとなり、発熱量の多いエミッタ領域
(13b )と対向する部分に位置する半田(14)に
はボイドは発生しない。従って、上記半導体ベレッ)
(13)の動作時、発熱量の多いエミッタ領域(13b
)から発生した熱は、この個所と対向位置にある、ボ
イドの形成されていない半田(14)を介して金庫ポス
ト(1))に伝えられ、外部に放熱されるため、十分な
放熱が行われる。In other words, the location where the void occurs is the base region (13a), which generates less heat and is formed on the surface side of the semiconductor pellet (13).
There are no voids in the solder (14) located in the part facing the emitter region (13b) which generates a large amount of heat. Therefore, the above semiconductor bellet)
(13) When operating, the emitter region (13b
) is conducted to the safe post (1)) through the void-free solder (14) located opposite this point, and is radiated to the outside, so sufficient heat radiation is achieved. be exposed.
尚、上記実施例は、本発明により、電力用の半導体ベレ
ット(13)をセラミック製絶縁基板(10)に固着し
た金属ポスト(1))にリフロー半田付けした時の例に
ついて説明したが、本発明は、上記以外の発熱量の多い
半導体ペレット、例えばサイリスタ等を放熱板、金属ポ
スト等の放熱部材のマウンi・ランドにリフロー半田付
けする場合にも通用できるのことは勿論である。Note that the above embodiment describes an example in which a power semiconductor pellet (13) is reflow soldered to a metal post (1) fixed to a ceramic insulating substrate (10) according to the present invention. It goes without saying that the invention is also applicable to cases where semiconductor pellets other than those described above, such as thyristors, etc., which generate a large amount of heat, are reflow soldered to the mounts and lands of heat radiating members such as heat sinks and metal posts.
上記した如く、本発明は、リフロー以前に行なう、マウ
ントランドと半導体ペレットとの間への半田供給を、半
導体ペレットの発熱量の少ない部分と対向する個所に対
してのみ行ない、半田のりフロー炉内での熔融時、半田
を半導体ペレットの発熱量の多い部分と対向する個所に
拡散させることにより、ボイドの発生個所を、半導体ペ
レットの発熱量の少ない部分と対向する個所のみに抑止
したものである。従って、本発明を用いれば、半導体ペ
レットの発熱量の多い個所と対向する部分に位置する半
田にボイドが発生するのを防止できるため、半導体ペレ
ットの発熱量の多い個所にて発生した熱は、ボイドの無
い半田を介して放熱部材に効率よく伝えられ、外部に放
熱されるため、従来の如く、半田に生じたボイドによっ
て放熱が阻害され、半導体ベレットが加熱して破損する
といったトラブルを防止できるようになる。As described above, in the present invention, the solder is supplied between the mount land and the semiconductor pellet before reflow only to the part of the semiconductor pellet that faces the part of the semiconductor pellet that generates less heat. During melting, the solder is diffused to the part of the semiconductor pellet that faces the part that generates a lot of heat, thereby suppressing the occurrence of voids only to the part that faces the part of the semiconductor pellet that generates little heat. . Therefore, by using the present invention, it is possible to prevent the generation of voids in the solder located in the portion of the semiconductor pellet that is opposite to the portion of the semiconductor pellet that generates a large amount of heat, so that the heat generated in the portion of the semiconductor pellet that generates a large amount of heat is Heat is efficiently transmitted to the heat dissipation member and radiated to the outside through void-free solder, which prevents problems such as conventional problems such as heat dissipation being inhibited by voids created in the solder and semiconductor pellets being heated and damaged. It becomes like this.
第1図は本発明に係るマウント方法により、半導体ペレ
ットをマウントランド上に載置する時の状態を示す斜視
図、第2図は半導体ペレットが半田を介してマウントラ
ンド上に載置された時の状態を示す側面図、第3図は半
導体ペレットがマウントランド上に半田付けされた時の
状態を示す側面図、第4図は従来の方法により半導体ペ
レットをマウントランド上にリフロー半田付けする時の
状態を示す側面図である。
(1))−m−金属ポスト、(12)−マウントランド
、(13)−m−半導体ベレット、
(13a)−一一ベース領域、
(14) −半田。FIG. 1 is a perspective view showing a state in which a semiconductor pellet is placed on a mounting land by the mounting method according to the present invention, and FIG. 2 is a perspective view showing a state in which a semiconductor pellet is placed on a mounting land via solder. 3 is a side view showing the state when the semiconductor pellet is soldered onto the mount land, and FIG. 4 is a side view showing the state when the semiconductor pellet is soldered onto the mount land by the conventional method. FIG. (1))-m-metal post, (12)-m-mount land, (13)-m-semiconductor bullet, (13a)-11 base region, (14)-solder.
Claims (1)
に半田を介してリフロー半田付けするマウント方法に於
いて、上記半田を、半導体ペレットの発熱量の少ない部
分と対応する部分に供給することを特徴とする半導体ペ
レットのマウント方法。(1) A mounting method in which a semiconductor pellet is reflow soldered to a mounting land on a metal post using solder, characterized in that the solder is supplied to a portion of the semiconductor pellet that corresponds to a portion of the semiconductor pellet that generates less heat. How to mount semiconductor pellets.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29848488A JPH02144928A (en) | 1988-11-26 | 1988-11-26 | Mounting of semiconductor pellet |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29848488A JPH02144928A (en) | 1988-11-26 | 1988-11-26 | Mounting of semiconductor pellet |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02144928A true JPH02144928A (en) | 1990-06-04 |
Family
ID=17860300
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29848488A Pending JPH02144928A (en) | 1988-11-26 | 1988-11-26 | Mounting of semiconductor pellet |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02144928A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7345369B2 (en) | 2004-10-21 | 2008-03-18 | Denso Corporation | Semiconductor device having semiconductor chip on base through solder layer and method for manufacturing the same |
US7601625B2 (en) | 2004-04-20 | 2009-10-13 | Denso Corporation | Method for manufacturing semiconductor device having solder layer |
-
1988
- 1988-11-26 JP JP29848488A patent/JPH02144928A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7601625B2 (en) | 2004-04-20 | 2009-10-13 | Denso Corporation | Method for manufacturing semiconductor device having solder layer |
US7345369B2 (en) | 2004-10-21 | 2008-03-18 | Denso Corporation | Semiconductor device having semiconductor chip on base through solder layer and method for manufacturing the same |
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