JPH02137421A - Pulse stretcher circuit - Google Patents

Abstract

PURPOSE:To obtain a precise output pulse width proportional to a control pulse which turns on and off a constant current source, to minimize a dead band, to eliminate the error of the output pulse width and to attain precise D/A conversion by adding a discharge circuit with respect to an integrating capacitor. CONSTITUTION:The discharge circuit F with respect to the integrating capacitor C is added. The discharge circuit F consists of fourth and fifth transistors Q4 and Q5 of an NPN type and a resistance R2. In Q4, a collector is connected to a first connection point X, and a base to the collector of Q5, whereby an emitter is grounded. In Q5, the base is connected to the output terminal OUT of a voltage comparator COM, and the emitter is grounded and a resistance R2 is connected between the bases of a second input terminal IN2 and Q4. As soon as the control pulse P is inputted to the terminal IN2 and a second constant current source IB is turned on, Q4 of the discharge circuit is conducted and the charged charge of the capacitor C in a first connection point X is suddenly discharged through Q4. Thus, the potential of the capacitor C is promptly shifted to the comparison voltage Vref of a second connection point Y.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a pulse stretcher circuit used in a D/A converter or the like.

<Prior Art> In a D/A converter or the like, a pulse stretcher circuit is used to integrate the pulse count number and convert it into an analog quantity. A conventional bell stretcher circuit of this type is shown in FIG. This pulse stretcher circuit consists of a current switch circuit D1 a voltage comparator C
It is equipped with an OM and an integrating capacitor C. The current switch circuit consists of first and second NPN transistors Q1 and Q2 arranged in a differential type, and a first input terminal INt to which a pulse signal P1 is input is connected to the base of the first transistor Ql. A reference voltage source E is connected to the base of the second transistor Q2, and a collector of the second transistor Q2 is connected to the power supply VCC. on the other hand,
A first connection point X connecting between the integrating capacitor C and the collector of the first transistor Q1 is connected to one inverting input terminal (-) of the voltage comparator COM, and the other non-inverting input terminal of the voltage comparator COM (+) is the second connection point Y that connects the emitters of the first and second transistors Ql and Q2.
is connected, and this second connection point Y is grounded via a resistor R1. Furthermore, the above first connection point X and the power supply Vce
There is a first constant current source IA between them, and a second constant current source between the first connection point X and ground! A second input terminal IN2 is provided for the second constant current source IB, and a second input terminal IN2 is provided to which a control pulse P2 for controlling on/off of the second constant current source IB is input.

Further, the emitter of a PNP type third transistor Q3 is connected to the first input terminal INI.
The base of the transistor Q3 is connected to the first connection point X,
Collector is grounded.

Next, the operation of the pulse stretcher circuit with the above configuration is as follows.
This will be explained with reference to the time chart shown in FIG.

Figure 4 shows the input waveform of the pulse signal P1 input from the first input terminal INI, the input waveform of the control pulse P2 input manually from the second input terminal IN2, and the voltage waveform at the first connection point X due to the integrating capacitor C. Vc, and the pulse waveform P3 output from the output terminal OUT of the voltage comparator COM.
are shown respectively. Note that the control pulse P2 applied to the second input terminal IN2 is the same as the pulse signal P1 and a predetermined pulse width T that is preset externally. This signal is obtained from the difference from a reference pulse (not shown).

(1) Period time t from to to tl. When a high-level pulse signal PI is input to the first input terminal INI, the first transistor Ql of the current switch circuit becomes conductive, and the accumulated charge in the integrating capacitor C and the current from the first constant current source IAI are flows through the first transistor Q1, and the potential Vc at the first connection point X gradually decreases. Then, at time t1 immediately before the control pulse P2 is input, the third transistor Q3 becomes conductive, so the first transistor Q3 becomes conductive.
Transistor Ql becomes non-conductive. Therefore, the potential Vc of the capacitor C at this time [l is the sum of the comparison potential V ref at the second connection point Y and the emitter-collector voltage Vs of the first transistor Ql (■ c = v
rer+vs, where Vref=reference voltage source E
The voltage V reg is the base-emitter voltage of the second transistor Q. In this case, since Vc>Vref', the output of the voltage comparison icOM remains at low level.

(2) When the high-level control pulse P2 is input to the second input terminal IN2 at time t1 during the period t□ to tl, the second constant current source! B is turned on and operation begins. As a result, the first constant current source!
Since the drawing current of the second constant current source IB increases more than that of A, the potential Vc of the first connection point X further decreases. In this case, at time t, the potential Vc of the first connection point As a result, the output pulse of the voltage comparator COM becomes high level.

(3) During the period from tt to time t, the input signals of the eleventh second input terminals lNl5 and IN2 both become low level, so the first transistor Ql of the current switch circuit is non-conductive, and the second Constant current source IB stops operating. Therefore, charging of the capacitor C is started, and the potential Vc of the first connection point X gradually increases. In this case, until time t, the potential Vc of the first connection point X is lower than the comparison voltage V ref, so that time t
Up to 3, the output of the voltage comparison 98 COM remains at high level.

<Problems to be Solved by the Invention> As described above, in the conventional pulse stretcher circuit shown in FIG. 3, the control pulse P is input to the second input terminal IN2.
2 is added to create a second constant current source! At the time when B starts operating, the potential Vc at the first connection point
Delayed by er time. Therefore, the second input terminal IN2
An output proportional to the control pulse P2 applied to the control pulse P2 cannot be obtained, and this causes an error in the output pulse width. This causes problems such as not being able to perform accurate D/A conversion.

Furthermore, when the pulse width of the control pulse P2 is equal to or less than the time Ter, the potential Vc of the first connection point X is equal to the comparison voltage V re
Since the voltage does not fall below f, there is a problem in that the voltage comparator C0M does not output any output pulses (the dead band is large).

This invention was made to solve the above-mentioned problems, and it is possible to obtain an output pulse proportional to the control pulse that turns on and off the constant current source, and to generate a pulse that can minimize the dead band. The purpose is to obtain a stretcher circuit.

Means to solve problems〉 In order to achieve the above object, the present invention adopts the following configuration.

That is, the pulse stretcher circuit according to the present invention is
A discharging circuit is added to the integrating capacitor, and this discharging circuit is composed of NPN type fourth and fifth transistors and a resistor, and the fourth transistor is
The collector is connected to the first connection point, the base is connected to the collector of the fifth transistor, and the emitter is grounded, and the fifth transistor has a base connected to the output terminal of the voltage comparator, an emitter grounded, and Resistance is the second
The configuration is such that it is connected between the input terminal and the base of the fourth transistor.

<Operation> According to the above configuration, when the control pulse is input to the second input terminal and the second constant current source is turned on, the fourth transistor of the discharging circuit becomes conductive and the charge charged in the capacitor at the first connection point is discharged. is rapidly discharged through this fourth transistor. Therefore, the potential V c (-V
ref+V s) immediately becomes the comparison voltage V at the second connection point Y.
Since the voltage is shifted to ref, the output of the voltage comparator immediately becomes high level.

<Embodiment> FIG. 1 is a circuit diagram of a pulse stretcher circuit according to an embodiment of the present invention, and parts corresponding to the conventional example shown in FIG. 3 are given the same reference numerals.

In FIG. 1, D is a current switch circuit D1COM is a voltage comparator, C is an integrating capacitor, and Ql.

Q2 is the 11th and 2nd transistor of the NPN type arranged in a differential type that constitutes the current switch circuit, ■ A is the first constant current source, IB is the second constant current source, [N1 is the pulse signal PI input The first input terminal, ! N2 is a second input terminal into which a control pulse P2 for controlling on/off the second constant current source IB is input, E is a reference voltage source connected to the base of the second transistor Q2, Vcc is a power supply, and X is for integration. Capacitor C
and the collector of the first transistor Ql, Y is the second connection point connecting both the emitters of the eleventh and second transistors Q1 and Q2, R1 is the resistor, and Q3 is P
This is an NP type third transistor, and the configuration thereof is the same as that of the conventional example, so a description thereof will be omitted.

A feature of this embodiment is that a discharging circuit F for the integrating capacitor C is added.

In other words, this discharge circuit F includes the fourth and fifth NPN type circuits.
It consists of transistors Q4 and Q5 and a resistor R2. Fourth
The transistor Q4 has a collector connected to the first connection point X, a base connected to the collector of the fifth transistor Q5, and an emitter connected to the ground. Further, the base of the fifth transistor Q5 is the output terminal O of the voltage comparator COM.
connected to UT, emitter grounded, and resistor R2
is connected between the second input terminal IN2 and the base of the fourth transistor Q4.

Next, the operation of the pulse stretcher circuit having the above configuration will be explained with reference to the time chart shown in FIG.

(1) Periods from to to t1 and periods from t to ta The operations during these periods are the same as in the conventional example, and therefore their explanation will be omitted.

(2) In a straight curve in which a period control pulse P of t+-tt is input, the potential Vc of the capacitor C is equal to the comparison potential Vre at the second connection point Y.
The value is the sum of f and the emitter-collector voltage Vs of the first transistor Ql (Vc=Vref+Vs). In this case, since Vc>Vre4, the output of the voltage comparator COM is at a low level.

At time t1, when a high-level control pulse P2 is input to the second input terminal IN2, the second constant current RIB is turned on and operation is started, and at the same time, the fourth
Transistor Q4 becomes conductive.

Then, the charge in the capacitor C at the first connection point X is quickly discharged via this fourth transistor Q4.

Therefore, the potential Vc of the capacitor C immediately shifts to the comparison voltage Vref at the second connection point Y. Then, when the potential Vc of the capacitor C reaches the comparison voltage V rer, the output P3 of the voltage comparator COM immediately becomes high level. Then, the fifth transistor Q5 becomes conductive, so the base current of the fourth transistor Q4 is cut and the fourth transistor Q5 becomes conductive.
Transistor Q4 becomes non-conductive.

On the other hand, while the control pulse P2 is at a high level, the second constant current source II3 is on, so the current drawn by the second constant current source IB increases more than that of the first constant current source IA. The potential Vc at the first connection point X further decreases according to the following equation.

Vc=Vref-(Ib-1a)-T/C.

However, Ib is the current value flowing through the second constant current source BI, Ia
is the current value flowing through the first constant current source IA, T is the control pulse P
2 becomes high level, Co is the capacitance of the integrating capacitor C.

<Effects of the Invention> According to the present invention, since a discharging circuit is added, it is possible to obtain a highly accurate output pulse width proportional to the control pulse that turns on and off the constant current source, and to minimize the dead band. can. Therefore, there is no error in the output pulse width, and excellent effects such as accurate D/A conversion can be achieved.

[Brief explanation of the drawing]

1 and 2 show an embodiment of the present invention, FIG. 1 is a circuit diagram of a pulse stretcher circuit, and FIG. 2 is a time chart of the same circuit. 3 and 4 show a conventional example, in which FIG. 3 is a circuit diagram of a pulse stretcher circuit, and FIG. 4 is a time chart of the same circuit. D... Current switch circuit, COM... Voltage comparator,
C...integrating capacitor, QI...first transistor, Q2...second transistor, IA...first constant current source,! B...Second constant current source, INI...First input terminal, IN2...Second input terminal, OUT...Output terminal, X...First connection point, Y...Second Connection point, F...
Discharge circuit, Q4... fourth transistor, Q5...
5th transistor, Rl, R2... Figure 2 1 mouth

Claims (1)

[Claims] (1) Equipped with a current switch circuit consisting of first and second transistors arranged differentially, a voltage comparator, and an integrating capacitor, and a pulse signal input terminal is connected to the base of the first transistor. A reference voltage source is connected to the base of the second transistor, and a first connection point connecting the integrating capacitor and the collector of the first transistor is connected to one input terminal of the voltage comparator. A second connection point connecting the emitters of the first and second transistors is connected to the other input terminal of the comparator, and this second connection point is grounded via a resistor, while the first connection point is connected to the other input terminal of the comparator. A first constant current source is provided between the point and the power source, and a second constant current source is provided between the first connection point and the ground, and the second constant current source is turned on and off. In a pulse stretcher circuit provided with an input terminal for a control signal to be controlled, a discharging circuit for the integrating capacitor is added,
This discharge circuit consists of NPN type fourth and fifth transistors and a resistor, and the fourth transistor has a collector connected to the first connection point, a base connected to the collector of the fifth transistor, and an emitter connected to the collector of the fifth transistor. grounded,
The fifth transistor is characterized in that its base is connected to the output terminal of the voltage comparator, its emitter is grounded, and the resistors are respectively connected between the second input terminal and the base of the fourth transistor. stretcher circuit.