JPH02137316A - Manufacture of semiconductor quantum fine wire - Google Patents

Abstract

PURPOSE:To completely escape from working damage, contamination and to control the abruptness of a lateral boundary in a single atomic order by forming a quantum fine wire only in a growing step. CONSTITUTION:An insulating film is deposited on a compound semiconductor substrate face 1 (001), a stripelike opening is formed in a direction [110], and a semiconductor 10 is further grown with methyl organic metal at 700 to 850 degrees of higher of growing temperature in such a manner that group V/III elements ratio ranges from 60 to 400 by an organic metal vapor growing method on the substrate 1. At least two or more types of slightly doped semiconductors 7, 3, 2, 3, 2, 3 are sequentially grown at 750-500 of growing temperature in such a manner that group V/III elements ratio ranges from 15 to 150 on the semiconductor layer 10 to form trapezoidal stripes. A highly doped semiconductor 5 is grown on the side face of the stripelike trapezoidal shape formed in the trapezoidal shape with ethyl organic metal. Thus, a working damage, a contamination are eliminated to control the abruptness of a lateral boundary in a single atomic order.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing semiconductor quantum m-rays, and is particularly applicable to ultrahigh-speed one-dimensional electronic transistors or high conversion efficiency nonlinear elements using quantum interference. The present invention relates to a method for manufacturing the one-dimensional quantum wire used.

[Conventional technology]

FIG. 7 shows the structure of a conventionally proposed one-dimensional quantum wire using JGaAa/GaAs as an example.

This is to realize a one-dimensional electronic state by modulating the doge on the side surface of a multilayer film of %AJGaAs/GaAs.

The part of the multilayer film/AJGaAs interface surrounded by the dotted line in the figure becomes a one-dimensional electronic state. 1 is a semi-insulating GaAa substrate,
2 is a non-doped AJGaAs growth layer, 3 is a non-doped G layer
4 is an aA3 growth layer, 4 is a non-doped AJGaAs spacer layer, and 5 is a Si-doped AJGaAs growth layer.

A method for manufacturing this structure is shown in FIGS. 8a to 8C.

First, undoped AlGaAs (2) and undoped GaA1 (3) were deposited on a semi-insulating GaAs substrate layer by molecular beam epitaxial growth or metal organic vapor phase epitaxy.
m is sequentially grown to produce a multilayer structure. Next, an etching mask 6 is placed on the multilayer film wafer in the [110] direction (FIG. 8a), and steps are formed by chemical etching or plasma etching (FIG. 8b).

Non-doped AA'GaAa of No. 4 was grown to a thickness of 10 nm on the etched side surface again by molecular beam epitaxial growth or metal-organic vapor phase epitaxy, and then Sl-doped (No. 5) was grown on the etched side surface to a thickness of 10 nm.
~10"cm-") AlGaAs is grown to a thickness of 1100 nm to achieve one-dimensional electronic states on the sides (Figure 8C).

[Problem to be solved by the invention]

The conventional method for producing quantum wires described above has the following problems.

The side surface formed by chemical etching (the shaded area in Figure 7) is contaminated with carbon, oxygen, silicon, etc., and these contaminants act as electron scattering factors and recombination centers. There is a phenomenon in which the carrier concentration decreases because it acts as a trap. Furthermore, in chemical etching, the etching speed varies depending on the type of material, so the sides of the etching become uneven, which causes stains to scatter. on the other hand,
When processing by plasma etching, a damaged layer or altered layer is formed on the processed surface (the shaded area in FIG. 7). These layers also act as electron scattering factors and recombination centers, which significantly deteriorates the performance of devices using quantum wires. Since the quantum wire with the structure shown in Figure 7 uses the processed side, contamination of the interface and processing damage will be fatal defects.

The present invention solves the conventional problems and provides a method for manufacturing semiconductor quantum wires that not only completely avoids processing damage and contamination but also allows the steepness of the lateral interface to be controlled on the monatomic order. purpose.

[Means to solve the problem]

In order to achieve the above object, the present invention includes a first step of depositing an insulating film on the surface of a (001) compound semiconductor substrate and forming a striped gate in the [110] direction; A second step of further growing the semiconductor on the substrate by metal organic vapor phase epitaxy using a methyl organic metal at a /m ratio of 60 or more and 400 or less and a growth temperature of 700 degrees C or more and 850 degrees C or less. , At least two types of low impurity concentration semiconductors are sequentially grown on the grown semiconductor layer at a V/III ratio of 150 or less, a growth temperature of 5 or more, 750 degrees C or less, and SOO degrees C or more, to form trapezoidal stripes. and a fourth step of growing a semiconductor with a high impurity concentration using an ethyl organic metal on the side surfaces of the trapezoid of the trapezoidal stripe.

[Effect]

The method for producing quantum wires of the present invention was devised to overcome damage caused by unevenness, contamination, or processing on the etching side surface. A trapezoidal multilayer structure is grown by using the same method, and one-dimensional electronic states are realized by modulation doping on the sides of the trapezoidal multilayer structure through continued growth.
This is a manufacturing method whose main feature is the creation of Doji thin wire.

In other words, the manufacturing method of the present invention skillfully takes advantage of the fact that the growth mode of selective growth changes depending on the growth temperature and V/III, and forms quantum wires only through the growth process, so there is no processing damage or Not only is it possible to completely avoid contamination, but also the steepness of the lateral interface can be controlled on the order of a single atom.

Examples will be described below based on the drawings.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail using AJGaAs/GaAs as an example of the material.

FIG. 1 shows the basic structure of a quantum wire produced by the method of the present invention, and the Doji wire exists in the interface portion surrounded by the dotted line. The same reference numerals as in FIG. 7 indicate the same elements.

FIGS. 2A to 2C show a procedure for manufacturing the structure shown in FIG. 1, which will be explained in sequence below. First, Sing is deposited as a selective growth mask 9 on a semi-insulating QaAs substrate l by sputtering or CVD to form long stripe-shaped openings in the [110) direction (FIG. 2a).

Using a metal organic vapor phase epitaxy method on this substrate, using a methyl organic metal, the V/lit ratio was in the range of 90-150, 80
10 lands-1AJGaA at a growth temperature of 0°C! After growing an I buffer layer f 100 nm, the V/11 ratio was 50
．． 7 undoped AJGaAs at a growth temperature of 650°C.
100 nm thick, 3 undoped GaAs and 2
A multilayer structure was fabricated by sequentially growing 8 non-doped A4GaAs to a thickness of 10 nm, and finally 8 non-doped AJGs were grown to a thickness of 10 nm.
Grow aAs to 1100n. At this time, by inserting 10 non-doped AJGaAa buffer layers, abnormal growth on the sides due to the fluctuation of the SiOg mask of the selective growth mask 9 can be prevented, and the growth layer is formed into a trapezoidal shape as shown in Figure 2. , there is no growth on the side walls of its trapezoid.

The effects of this non-doped AJGaAs buffer layer 10 are shown in FIGS. 3a and 3b. Figure 3a is non-doped Aj'GaA
FIG. 3 shows the case without the s buffer layer 10, and the case with the non-drug A/GJLA8 buffer layer IO. In the case of FIG. 3a without the non-doped AJGaAs buffer layer IO, abnormal growth 11 occurs on the sidewalls of one trapezoid due to fluctuations of the Si0g mask of the selective growth mask 9.

Next, 4 non-doped AJGaA was deposited on this trapezoidal multilayer structure at a growth temperature of SOO℃ using an ethyl organic metal.
s to 10 nm, followed by 5 St-doped AJGa
Although the sides of the trapezoid are effectively modulated and doped by As,
The upper surface of the trapezoidal multilayer film has 8 non-doped AJs of 1100n.
Because there is GaAs, there are no electrons at the upper interface, so
A one-dimensional electronic state can be realized on the side surface of the trapezoid. The reason for using the ethyl organic metal here is as follows. AIGaAa was used to fabricate the modulated Be-1 structure by methyl-based growth.
There is a problem of lower mobility due to the incorporation of carbon into the layer.To prevent this, ■/II! However, increasing the V/III ratio makes it difficult to grow on the sidewalls. Therefore, even if the V/I ratio is small, the ethyl system is effective in capturing carbon. In this example, growth was performed under reduced pressure using a horizontal furnace with high frequency heating. Using trimethylgallium, trimethylaluminum, triethylgallium, triethylaluminum, and arsine as raw materials, selective growth was performed on the semi-insulating GaAS substrate shown in FIG. 2a.

Similar thin line growth was also reported by Aaai et al.
ed Physics Letters Volume 51 (19
(1987) reported on page 1sts-20, only a GaAs layer was grown on a trapezoid using stripes in the [110] direction. Simply GaAs f, AJGaA
In the case of the thin wire covered with s, a good thin wire was obtained in this direction. However, when growing an AJGaAs/GaAs multilayer film on a trapezoid, the [110] direction stripe is
:] A good trapezoidal shape cannot be obtained compared to the direction. Fourth
Figures a and b are traces of micrographs of the grown sidewalls. As shown in Figure 4 a, AA'GaA31 growth [11
0] In the case of directional stripes, there were 5 dermoids (111) B
In the case of stripes in the [110] direction, the side surfaces become approximately (111) A planes, but as shown in FIG. 4, mirror surfaces cannot be obtained.

Therefore, the main points of the present invention are that a good multilayer film can be grown on stripes in the (110) direction, and that an undoped AI film of 10 can be grown. This is because a VGaAa buffer layer was introduced, the facet growth of the multilayer structure was performed using an all-methyl organic metal, and the growth on the sides was performed using an ethyl organic metal. Figure 5 shows @70 as an example of the thin wire produced in this way.
This figure shows a traced micrograph of quantum a-line nanometers. The existence of one-dimensional electron 1-DEC at the oblique interface has been confirmed from the dependence of magnetoresistance on the magnetic field orientation.

In this example, a non-doped AlGaA3 buffer layer was grown at a growth temperature of 800°C and a V/Il ratio of 90-150.
Non-doped AlG at a growth temperature of 50.650°C
We have explained an example in which an aAs layer is grown, and the buffer layer growth conditions for the former are V1m ratio of 60 or higher and 400 or lower, and the growth temperature of 700°C or higher and 850°C or lower, and the latter non-doped AA'GaAa layer growth conditions are V/III. Ratio 150 or less,
It was confirmed that the manufacturing method of the present invention can be applied in the following ranges: 5.5°C or higher, 750°C or lower, and 500°C or higher. When manufacturing was attempted outside of these conditions, abnormal growth due to mask fluctuation could not be removed. Furthermore, it is observed that parallel conduction occurs within the υ trapezoidal multilayer structure due to an increase in impurity concentration, which is undesirable.

As explained above, according to the manufacturing method of this embodiment, the entire quantum wire can be manufactured only by the growth process, so there is no etching contamination or processing damage, and the quantum wire has flat side surfaces on the order of monoatomic atoms.

In the embodiments of the present invention, AlGaAs/GaAa-based materials have been described, but GaInP/GaAs, GaInAs/
m-group bioconductors such as InP and their mixed crystal systems, Zn5e/
It can also be realized using ■-■ group semiconductors such as GaAa and their mixed crystal materials.

Furthermore, it is also possible to fabricate a reverse structure as shown in FIG. 6 using the same method. The same reference numerals as in FIG. 1 indicate the same elements. Using this structure, V/m? In contrast, the non-doped QaAs growth layer of 3 can be made of a methyl-based organometallic. Furthermore, the effect of the non-doped AA'GaAs buffer layer is not limited to the growth of AJGaAs 7 assets, but also to the growth of G&A
It is also effective for B facet growth.

〔Effect of the invention〕

Since the manufacturing method of the present invention forms quantum wires only through the growth process, it is not only completely free from processing damage and contamination, but also the steepness of the lateral interface can be controlled to the monatomic order. .

By using the present invention, a one-dimensional FE with higher transconductance than a conventional planar FET can be realized.
T was obtained.

[Brief explanation of the drawing]

Figure 1 is a quantum wire structure manufactured by the manufacturing method of the present invention, Figure 2 a"-c is a diagram explaining the procedure for manufacturing a quantum wire structure by the manufacturing method of the present invention, and Figure 3 a and b are AJGaAs. Figures 4a and 4b illustrate the effect of the buffer layer on facet growth.
0] direction stripe, FIG. 5 is an AJGaAa/GaAs-dimensional quantum wire, FIG. 6 is another example of a quantum wire structure created by the manufacturing method of the present invention, and FIG. 7 8 is a sectional view of a conventionally proposed one-dimensional quantum MB line structure, and FIGS. 8a to 8c are diagrams illustrating a conventional manufacturing method. l... Semi-insulating GaAs substrate 2.7.8... Non-doped AJGaAs growth layer 3...
・Non-doped GaAa growth layer 4...Non-doped 7°AIGaAa spacer layer 5''-
Si-doped AJGaAs growth layer 6...Etching mask 9...Selective growth mask 10...Non-doped AlGaAs buffer layer 11...
・Abnormal Growth Patent Applicant Nippon Telegraph and Telephone Co., Ltd. Agent Patent Attorney Tama Mushi Hisukabe (1 other person) Fig. GaAs A Kuwa et al. As/GaAs-dimensional electron wire Fig. Other embodiments of quantum wire structures fabricated by the manufacturing method of the present invention Fig.

Claims (1)

[Claims] An insulating film is deposited on the surface of a (001) compound semiconductor substrate, [
A first step of forming striped openings in the 110] direction, using a methyl-based organic metal on the semiconductor substrate in which the openings have been formed, using a methyl-based organic metal, with a V/III ratio of 60.
a second step of further growing the semiconductor at a growth temperature of 700 degrees C or more and 850 degrees C or less; a V/III ratio of 150 or less on the grown semiconductor layer;
A third step of sequentially growing at least two types of low impurity concentration semiconductors at a growth temperature of 750 degrees C or less and 500 degrees C or more to form trapezoidal stripes; a trapezoid of the trapezoidally formed stripes; A method for producing a semiconductor quantum wire, comprising a fourth step of growing a semiconductor with a high impurity concentration using an ethyl organic metal on the side surface.