[go: up one dir, main page]

JPH02133945A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH02133945A
JPH02133945A JP63286782A JP28678288A JPH02133945A JP H02133945 A JPH02133945 A JP H02133945A JP 63286782 A JP63286782 A JP 63286782A JP 28678288 A JP28678288 A JP 28678288A JP H02133945 A JPH02133945 A JP H02133945A
Authority
JP
Japan
Prior art keywords
memory device
circuit board
chip
fpc
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63286782A
Other languages
Japanese (ja)
Inventor
Yoshihiro Shimada
島田 佳宏
Isao Yabe
功 矢部
Shingo Ichikawa
新吾 市川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP63286782A priority Critical patent/JPH02133945A/en
Publication of JPH02133945A publication Critical patent/JPH02133945A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To obtain a structure of a semiconductor device having a degree of extreme freedom for an arrangement by a method wherein a plurality of IC chips are mounted on a flexible printed-circuit board having a wiring pattern and the individual IC chips are resin-molded independently. CONSTITUTION:In a memory device 1, an IC chip 3 is mounted on the surface of a flexible printed-circuit board 2 (hereafter abbreviated as FPC) and is molded by a sealing resin 4. A well-known pattern is formed on a surface 2a of the FPC 2; its one part is connected to external terminals 5 which have been formed at one end of the FPC 2 and is wire-bonded to a pad electrode of each IC chip 3. A part other than a wiring position of the external connection terminals 5 is protected by a coating of a resist film 6; after that, each IC chip 3 is molded individually by the sealing resin 4. Accordingly, since only a part of the sealing resin 4 in the memory device 1 is solid and other parts are structured to be flexible, it is possible to mount this device even on a substrate of a non-planer shape.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体メモリ装置のような多数のICチップを
実装した半導体装置の実装構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mounting structure for a semiconductor device, such as a semiconductor memory device, in which a large number of IC chips are mounted.

〔従来の技術〕[Conventional technology]

近年R,OM、ILAM等の半導体メモリが高容量化さ
れたことに伴い、これら半導体メモリ用のICチップを
一枚の基板に多数個実装したメモリ装置が製j貰され、
ゲーム用やプロセス管J里用等の広い応用分野で使用さ
れている。
In recent years, with the increase in the capacity of semiconductor memories such as R, OM, and ILAM, memory devices have been manufactured in which a large number of IC chips for these semiconductor memories are mounted on a single substrate.
It is used in a wide range of applications such as games and process pipes.

しかるに上記半導体メモリ装置は、セラミック基板又は
硬質の樹脂基板(PCB)に多数のチップを実装した後
、セラミック製の蓋や、樹脂製の蓋を被せて密封したり
、全体を樹脂モールドすることによりカード型状、PG
A型状、DLPW状等に仕上げている。
However, the semiconductor memory device described above is manufactured by mounting a large number of chips on a ceramic substrate or a hard resin substrate (PCB), and then sealing the device with a ceramic lid or a resin lid, or by molding the entire device with resin. Card shape, PG
Finished in A shape, DLPW shape, etc.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

前記のごと(従来の半導体メモリ装置はメモリカードや
PGAのようなコネクターによる着脱方式か、外部端子
をマザーボード上のパターンに半田付けする方式である
ため、その構造は堅牢なものとなっていた。
As mentioned above (conventional semiconductor memory devices are attached and detached using connectors such as memory cards and PGAs, or have external terminals soldered to patterns on the motherboard, so their structures are robust.

しかし、前記半導体メモリ装置を搭載する携帯型コンピ
ー−ター等の電子装置が近年ますます軽薄短小化し、且
つメモリ量を増大させる方向に進んでいる。
However, in recent years, electronic devices such as portable computers equipped with the semiconductor memory devices have become smaller and lighter, and the amount of memory has increased.

したがって前記電子装置内に於ける半導体装置リ装置の
配設スペースにも種々の制約が生じ、このような制約状
況に対応することが可能な配役自由度を有する構造の半
導体メモリ装置が望まれている。
Therefore, there are various restrictions on the space for installing semiconductor devices in the electronic device, and there is a demand for a semiconductor memory device with a structure that has a degree of freedom in placement that can cope with such restrictions. There is.

本発明の目的は上記要望に答えるものであり、極めて配
役自由度を有する半導体装置の構造を提供することにあ
る。
An object of the present invention is to meet the above-mentioned needs, and to provide a structure of a semiconductor device having an extremely high degree of freedom in arrangement.

〔課@な解決するための手段〕[Means to solve the problem]

上記目的を達成するための本発明の要旨は下記の通りで
ある。
The gist of the present invention for achieving the above object is as follows.

配線パターンを有し、かつ柔軟性を有する回路基板上に
複数のICチップを実装するとともに、各ICチップを
独立に樹、脂モールドしたことを特徴とする半導体装置
であり、又、前記回路基板の裏面に金属板を固着したこ
とな特徴とする半導体装置であり、さらに前記回路基板
の裏面な非平面形状を有する基台に固着したことを特徴
とする半導体装置である。
A semiconductor device characterized in that a plurality of IC chips are mounted on a flexible circuit board having a wiring pattern, and each IC chip is independently molded with resin, and the circuit board The semiconductor device is characterized in that a metal plate is fixed to the back surface of the circuit board, and the semiconductor device is further fixed to a base having a non-planar shape on the back surface of the circuit board.

〔作用〕 第1図は本発明に於ける半導体装置であるメモリ装置の
平面図であり、メモリ装置1は柔軟性な有するフレキシ
ブルプリント基板2(以後FPCと略記する)の表面に
8個のICチップ6が実装され、かつ封止樹脂4によっ
てモールドされている。前記FPC2の表面2aには周
知の配線パターン(図示せず)が設けられ、その一部は
FPC2の一端に設けられた外部接続端子5に接続され
るとともに各ICチップ乙のパッド電極とワイヤーボン
デングされている。
[Function] FIG. 1 is a plan view of a memory device, which is a semiconductor device according to the present invention. A chip 6 is mounted and molded with sealing resin 4. A well-known wiring pattern (not shown) is provided on the surface 2a of the FPC 2, a part of which is connected to the external connection terminal 5 provided at one end of the FPC 2, and is also connected to the pad electrode of each IC chip B and the wire bond. It is dengue.

そして表面2aの外部接続端子5の配役位置以外の部分
を一点鎖線で示すようにレジスト膜6によって保護コー
トした後に、各ICチップ6を封止樹脂4によって各々
独立にモールドした構成となっている。従って上記構成
によるメモリ装置1は封止樹脂40部分のみが堅牢で他
の部分はFPc2による柔軟構造となっているため、非
平面形状を有する基台に対しても装着が可能となる。
After the surface 2a other than the external connection terminal 5 is protectively coated with a resist film 6 as shown by the dashed line, each IC chip 6 is individually molded with the sealing resin 4. . Therefore, in the memory device 1 having the above configuration, only the sealing resin 40 portion is strong and the other portions are flexible due to the FPc 2, so that it can be mounted even on a base having a non-planar shape.

〔実施例〕〔Example〕

以下図面により本発明の詳細な説明する。 The present invention will be explained in detail below with reference to the drawings.

第2図はメモリ装置1の実装構造な示す断面図であり、
前記FPC2の裏面2bを薄い金属板8に接着したもの
である。
FIG. 2 is a cross-sectional view showing the mounting structure of the memory device 1.
The back surface 2b of the FPC 2 is bonded to a thin metal plate 8.

上記構成によれば、金属板8によってメモリ装置it 
1が弾性を有する構造になるとともに、金属板8が放熱
板の機能を兼ねることにより温度特性を改善することが
出来る。
According to the above configuration, the metal plate 8 allows the memory device it
1 has an elastic structure, and the metal plate 8 also functions as a heat sink, so that temperature characteristics can be improved.

第3図は他の実施例であるメモリ装置1の実装構造を示
す断面図である。
FIG. 3 is a sectional view showing a mounting structure of a memory device 1 according to another embodiment.

メモリ装置1な屈曲形状の金属板9に接着したものであ
り、その屈曲部9aに2閏の封止樹脂40間のFPC2
が位置するごとく配設されている。
The memory device 1 is bonded to a bent metal plate 9, and an FPC 2 between two sealing resins 40 is attached to the bent portion 9a.
It is arranged as if it were located.

上記のごと(本発明に於けるメモリ装置1は金属板9の
ように屈曲した非平面形状の基台にも固着することが出
来る。
As mentioned above (the memory device 1 in the present invention can also be fixed to a bent non-planar base like the metal plate 9).

第4図はさらに他の実施例であり、メモリ装置1を実装
した携帯型コンピュータの断面図である。
FIG. 4 shows still another embodiment, and is a sectional view of a portable computer in which the memory device 1 is mounted.

10は携帯型コンピュータ、11は上ケース、12は下
ケースであり、両者は図示しない係止手段によって係止
一体止されている。そして上ケース11には透明窓11
aと開口部11bが設けられている。13は回路基板で
あり・該回路基板130表面側にはICテップ14.1
5、電子部品16.17及びコネクタ18が実装され、
又裏面側には表示装置19とキーボード2oが実装され
ている。21はスペーサ、22は電池である。
10 is a portable computer, 11 is an upper case, and 12 is a lower case, both of which are locked together by a locking means (not shown). And the upper case 11 has a transparent window 11
a and an opening 11b are provided. 13 is a circuit board; on the surface side of the circuit board 130 there is an IC chip 14.1.
5. Electronic components 16, 17 and connector 18 are mounted,
Further, a display device 19 and a keyboard 2o are mounted on the back side. 21 is a spacer, and 22 is a battery.

そして前記下ケース12の内面部には前記メモリ装置1
が接着されているが、その配置は封止樹脂4の存在する
部分を下ケース12の底面に接着するとともに外部接続
端子5の存在する部分を立面げることにより下ケース1
2の側面に接着している。
The memory device 1 is provided on the inner surface of the lower case 12.
The arrangement is such that the portion where the sealing resin 4 is present is adhered to the bottom surface of the lower case 12 and the portion where the external connection terminal 5 is present is raised.
It is glued to the side of 2.

次に上記携帯型コンピュータ1oの組立手順を説明する
。まず下ケース12にメモリ装置1を接着した後スペー
サ21、回路基板16、電池22の順に各エレメントを
落し込む。次に上ケース11を装着して下ケース12に
係止一体止することにより組立が完了する。この状態に
於いては土ケース11の開口部11bに対してキーボー
ド20が操作可能に配設されるとともに透明窓11bに
対して表示装置19の表示部が見えるように配設される
。又スペーサ21に設けられた斜面部21aによってコ
ネクタ18が、左方向に押され、前記メモリ装置1の外
部接続端子5に圧接されることによりメモリ装置1のI
Cチップ3と回路基板13上のICチップ14.15が
電気的に接続される。
Next, a procedure for assembling the portable computer 1o will be explained. First, the memory device 1 is adhered to the lower case 12, and then each element is dropped in the order of the spacer 21, the circuit board 16, and the battery 22. Next, the upper case 11 is attached and fixed to the lower case 12, thereby completing the assembly. In this state, the keyboard 20 is disposed in an operable manner relative to the opening 11b of the soil case 11, and the display section of the display device 19 is disposed so as to be visible relative to the transparent window 11b. In addition, the connector 18 is pushed leftward by the slope portion 21a provided on the spacer 21 and is pressed against the external connection terminal 5 of the memory device 1, so that the I of the memory device 1 is pressed.
The C chip 3 and the IC chips 14 and 15 on the circuit board 13 are electrically connected.

上記構成によれば、メモリ装置1の収納スペースをほと
んど考慮する必要がなくなるため携帯型コンピュータの
小型、薄型化が可能になる。
According to the above configuration, there is almost no need to consider the storage space of the memory device 1, so that the portable computer can be made smaller and thinner.

又下ケース12を金属にした場合は、その温度特性の改
善も可能となる。
Furthermore, if the lower case 12 is made of metal, its temperature characteristics can also be improved.

尚前記メモリ装置1に於ける複数のICチップ乙に対す
る制止樹脂4の射出成形は、本出願人がすでに出願した
特願昭63−50738号及び特願昭63−59409
号にて提案した樹脂封止方法によって同時成形すること
が出来る。
The injection molding of the restraining resin 4 for the plurality of IC chips B in the memory device 1 is described in Japanese Patent Application No. 63-50738 and Japanese Patent Application No. 63-59409 filed by the present applicant.
Simultaneous molding can be performed using the resin sealing method proposed in the issue.

〔発明の効果〕〔Effect of the invention〕

上記のごと(本発明によれば、FPCK実装した複数の
ICチップを独立に樹脂封止することによって柔軟性を
備えた半導体装置を提供することが可能となり、この半
導体装置の非平面形状部への実装によって携帯機器の小
型薄型化に大なる効果な得ることが出来た。
As mentioned above (according to the present invention, it is possible to provide a flexible semiconductor device by individually sealing a plurality of FPCK-mounted IC chips with resin, and the non-planar shape portion of this semiconductor device By implementing this, we were able to obtain a great effect in making mobile devices smaller and thinner.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例であるメモリ装置の平面図、
第2図は第1図の断面図、第3図は他の実施例で前記メ
モリ装置を金属板に装着した状態な示す断面図、第4図
は更に他の実施例で前記メモリ装置を携帯型コンピュー
タに装着した状態を示す断面図である。 1・・・・・・メモリ装置、 2・・・・・・I”PC。 4・・・・・・封止樹脂。 第2図 第4図
FIG. 1 is a plan view of a memory device which is an embodiment of the present invention;
FIG. 2 is a cross-sectional view of FIG. 1, FIG. 3 is a cross-sectional view of another embodiment in which the memory device is attached to a metal plate, and FIG. 4 is a still further embodiment in which the memory device is portable. FIG. 3 is a cross-sectional view showing the state in which it is attached to a model computer. 1... Memory device, 2... I"PC. 4... Sealing resin. Fig. 2 Fig. 4

Claims (3)

【特許請求の範囲】[Claims] (1)配線パターンを有し、かつ柔軟性を有する回路基
板上に複数のICチップを実装するとともに、各ICチ
ップを独立に樹脂モールドしたことを特徴とする半導体
装置。
(1) A semiconductor device characterized in that a plurality of IC chips are mounted on a flexible circuit board having a wiring pattern, and each IC chip is independently resin molded.
(2)回路基板の裏面に金属板を固着したことを特徴と
する請求項1記載の半導体装置。
(2) The semiconductor device according to claim 1, further comprising a metal plate fixed to the back surface of the circuit board.
(3)回路基板の裏面を非平面形状を有する基台に固着
したことを特徴とする請求項1記載の半導体装置。
(3) The semiconductor device according to claim 1, wherein the back surface of the circuit board is fixed to a base having a non-planar shape.
JP63286782A 1988-11-15 1988-11-15 Semiconductor device Pending JPH02133945A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63286782A JPH02133945A (en) 1988-11-15 1988-11-15 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63286782A JPH02133945A (en) 1988-11-15 1988-11-15 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH02133945A true JPH02133945A (en) 1990-05-23

Family

ID=17708979

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63286782A Pending JPH02133945A (en) 1988-11-15 1988-11-15 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH02133945A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100495741B1 (en) * 2001-07-30 2005-06-16 세이코 엡슨 가부시키가이샤 Connection apparatus for circuit board, ink jet type recording apparatus using the same, ic chip and ink cartridge having ic chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100495741B1 (en) * 2001-07-30 2005-06-16 세이코 엡슨 가부시키가이샤 Connection apparatus for circuit board, ink jet type recording apparatus using the same, ic chip and ink cartridge having ic chip

Similar Documents

Publication Publication Date Title
US7534966B2 (en) Edge connection structure for printed circuit boards
US20040159955A1 (en) Semiconductor chip module
US5869889A (en) Thin power tape ball grid array package
US6104095A (en) Printed circuit board and chip-on-board packages using same
JP2002510148A (en) Semiconductor component having a plurality of substrate layers and at least one semiconductor chip and a method for manufacturing the semiconductor component
KR20060065561A (en) Semiconductor devices
US6122172A (en) Polymer stud grid array
US6740973B1 (en) Stacked structure for an image sensor
US7358600B1 (en) Interposer for interconnecting components in a memory card
US20070252263A1 (en) Memory package structure
JP3656861B2 (en) Semiconductor integrated circuit device and method for manufacturing semiconductor integrated circuit device
US6469903B1 (en) Flexible printed circuit and semiconductor device
JPH02133945A (en) Semiconductor device
US6057594A (en) High power dissipating tape ball grid array package
JP2008078164A (en) Semiconductor device and manufacturing method thereof
JP3232723B2 (en) Electronic circuit device and method of manufacturing the same
JPH11112121A (en) Circuit module and electronic device containing circuit module
JP3910711B2 (en) Circuit module and electronic device including the module
JPH05275838A (en) Module for electronic device
JPH1174421A (en) Composite semiconductor device
JP3769881B2 (en) Electronic circuit equipment
JP3174957B2 (en) Electronic circuit module substrate and electronic circuit module using the same
US7265446B2 (en) Mounting structure for semiconductor parts and semiconductor device
JPH115384A (en) Thin electronic device and method of manufacturing the same
JP2503891B2 (en) Heat sink mounting structure for integrated circuit device