JPH02129701A - Digital comparator - Google Patents

Abstract

PURPOSE:To prevent a fact that an output causes chattering even if there is a small fluctuation in input data by allowing the digital comparator to have a hysteresis characteristic. CONSTITUTION:The digital comparator is provided with an arithmetic means 3, and a comparing means 5 for comparing an output of the arithmetic means 3 and reference data which is set in advance, and a data generating means 6 outputs first arithmetic data or second arithmetic data to the arithmetic means 3 in accordance with an output of the comparing means 5. This constitution has the same meaning as a fact that a hysteresis characteristic is given to the comparing means 5. In such a way, even if there is a small fluctuation in input data, it can be prevented that an output of the comparator causes chattering.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" This invention relates to a digital comparator having hysteresis characteristics.

"Prior Art" A conventional digital comparator simply compares input data with reference data and outputs data indicating the magnitude of the comparison.

``Problems to be Solved by the Invention'' However, such conventional digital comparators have problems with input data that is unstable due to conversion errors, such as the output of an A/D (analog/digital) converter, in other words, small fluctuations. If this is data that occurs frequently, there is a risk that the comparator output may chattering.

The present invention has been made in view of the above-mentioned circumstances, and it is an object of the present invention to provide a digital comparator whose output does not cause chattering even if there are small fluctuations in input data.

"Means for Solving the Problem" The first invention provides a calculation means for calculating and outputting digital data supplied from the outside and calculation data output from a data generation means, and a calculation means that calculates and outputs the digital data supplied from the outside and the calculation data output from the data generation means, and the output of the calculation means and the preset and comparing means for comparing the data with standard data, detecting the magnitude of both data, and outputting data indicating the detection result, and the data generating means corresponds to the output of the comparing means. It is characterized in that the first calculation data or the second calculation data is output to the calculation means.

A second invention also provides a calculation means for calculating and outputting the calculation data output from the data generation means and preset reference data, and a calculation means for calculating and outputting the calculation data output from the data generation means and the digital data supplied from the outside. Comparing means detects the magnitude of both data by comparison and outputs data indicating the detection result, and the data generating means generates the first calculated data or the first calculated data in response to the output of the comparing means. It is characterized in that the calculation data of No. 2 is output to the calculation means.

"Operation" According to the first invention, different data is added (or subtracted) to the human data according to the output of the comparison means, and this addition (
The subtracted data and reference data are compared. This configuration has the same meaning as adding hysteresis characteristics to the comparison means, and therefore, even if there are small fluctuations in the input data, the comparator output does not chattering.

According to the second invention, data determined according to the output of the comparing means is added (or subtracted) to the reference data, and the added (subtracted) data is compared with the input data. With this configuration, a hysteresis characteristic is imparted to the comparing means, and therefore chattering of the converter output can be prevented.

"Embodiments" Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a digital comparator 1 according to a first embodiment of the present invention. The digital comparator shown in this figure compares the output data of the A/D converter 2 with a constant set internally, and outputs an "l" signal when the former is larger than the latter, and outputs a "0" signal when the latter is smaller. ``It outputs each signal.

In FIG. 1, TI is an input terminal to which output data Da of the A/D converter 2 is applied, 3 is an input terminal that adds the input data Da and the output data Dh of the hysteresis amount register 4,
This adder outputs the addition result to the comparator 5 as data Ds. The comparator 5 compares the above-mentioned data D8 and the constant data Kl output from the constant generator 6,
11” when Ds≧Kl, and “11” when Ds<Kl.
0" respectively. The output data Do of the comparator 5 is supplied to the output terminal T2 and also to the hysteresis amount register 4. The hysteresis amount register 4 outputs an output when the data Do is "O". "0" is output as the data Dh, and when the data Do is "i", a constant value of 2 is output as the data Dh.

Next, the operation of the above embodiment will be explained with reference to the waveform diagram shown in FIG. Assuming that the analog voltage shown in FIG. 2 (A) is supplied to the input terminal of the A/D converter 2, the A/D converter 2 outputs digital data Da shown in FIG. 2 (B).

Note that in this figure, symbol E indicates data based on a conversion error of the A/D converter 2. Moreover, the broken line is the output data Kl of the constant generator 6. Time t1 shown in this figure
When Da>Kl, the output data Do of the comparator 5 becomes "l" as shown in FIG. 2 (d), and this data Do "1" is applied to the output terminal T2 and the hysteresis amount register 4.
supplied to

When data DO "1'" is supplied to the hysteresis amount register 4, "K2" is outputted from the register 4 as data Dh and supplied to the adder 3. As a result, from now on,
As shown in FIG. 2(c), Ds=Da+ becomes 2.

Next, at time t, when Ds<Kl, the output data Do of the comparator 5 becomes "0", and this data DO"
0" is supplied to the output terminal T2 and also supplied to the hysteresis unit Nostar 4. As a result, from now on, Dh=
0, and Ds=Da.

Next, when Ds>Kl at time t3, data Do becomes "l" again, and the above operation is repeated.

In this way, according to the above embodiment, when the data Da rises and exceeds the data Kl, from then on, r is set as the data Ds.
2J is supplied to the comparator 5 on Da+.

Therefore, even if the data Da falls and reaches the data Kl, the data Ds is still rK-1+2 (>Kl), and therefore the output data of the comparator 5 continues to be "l". Then, when the data Da further decreases and passes 2J to r-Kl-, Ds<Kl, and the output data Do of the comparator 5 is inverted to "0". As a result, the data Dh
becomes 0, and thereafter Ds=Da. Then, when the data Da rises and exceeds the data Kl again, the output data Do of the comparator 5 becomes "L" and Ds=Da+2, and the same operation as described above is repeated.

As is clear from the above operation, this digital comparator has a hysteresis characteristic, so that the output data Do does not chattering in response to small vibrations in the input data Da.

In addition, when the adder 3 and the hysteresis quantity nostar 4 in FIG. 1 are not present, and only the comparator 5 and the constant generator 6 are used, the data Do changes as shown in FIG. 2 (to), and the sign C
Chattering indicated by H occurs.

Next, FIG. 3 is a block diagram showing the configuration of a digital comparator It according to a second embodiment of the present invention, and in this figure, parts corresponding to those in FIG. 1 are given the same reference numerals. . The digital comparator 11 shown in this figure differs from the one shown in FIG. 1 in the following two points.

■While the one shown in FIG. 1 adds data Dh to input data Da, this digital comparator 11
, data Dh is added to the output data Kl (reference data) of the constant generator 6.

■The hysterinosis register 4 in FIG.
However, in this embodiment, the hysteresis amount nostar 4a outputs data D, contrary to the above.

It outputs data Dh which becomes "K2" when the force is "O" and "0" when it is "l".

Next, the operation of the digital comparator 11 shown in FIG. 3 will be explained. First, it is assumed that the output data DO of the comparator 5 is "1" and the data Dh is "0".

In this state, when the input data Da gradually decreases and becomes smaller than the data Kl, the output data Do of the comparator 5 is inverted to "0", and therefore the data Dh becomes "K2", and the adder 3 The output data Ds of is 2 to rK1+.
becomes j. Next, even if the data Da gradually increases and reaches data 1, there is no change in the output of the comparator 5 because Da<Ds at this time. Next, the data Da further increases and when the data rKl+ exceeds 2J, Da>Ds
Then, the output data Do of the comparator 5 is inverted to "l",
Further, data Dh becomes "0". Next, even when the data Da falls and reaches 2J at rKI+, there is no change in the data Do. Then, when the data Da reaches rKIj, the data Do is inverted again, and the same operation as above is performed thereafter. The digital comparator 11 according to this embodiment also has hysteresis characteristics.

In addition, the above 1. In the second embodiment, it is desirable that the value of the hysteresis data Kl be a value that corresponds to the stability (width of small fluctuations) of the input data Da.

Further, in the above embodiment, the stability of the input data Da may be constantly measured and the value of the data Kl may be corrected according to the measurement result. In this way, even if the stability of the human input data Da changes, 2 can always be set as the optimum hysteresis data in the hysteresis claw register 4 or 4a.

Further, in the above embodiment, the adder 3 is used, but a subtracter may be used instead.

"Effects of the Invention" As explained above, since the digital comparator according to the present invention has hysteresis characteristics, it is possible to obtain an effect that the output does not chattering even if there is a small fluctuation in the input data.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a first embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the same embodiment.
FIG. 3 is a block diagram showing the configuration of a second embodiment of the invention. 3... Adder, 4.48... Hysteresis amount register, 5... Comparator, 6...
Constant generator.

Claims (2)

[Claims] (1) A calculation means that calculates and outputs digital data supplied from the outside and calculation data output from the data generation means, and a calculation means that compares the output of the calculation means with preset reference data. and a comparison means for detecting the magnitude of the data and outputting data indicating the detection result, and the data generation means generates first calculation data or second calculation data in response to the output of the comparison means. A digital comparator, characterized in that it outputs to the calculation means. (2) A calculation means that calculates and outputs the calculation data output from the data generation means and preset reference data, and a calculation means that compares the output of the calculation means with digital data supplied from the outside. and a comparison means for detecting the magnitude of the data and outputting data indicating the detection result, and the data generation means generates first calculation data or second calculation data in response to the output of the comparison means. A digital comparator, characterized in that it outputs to the calculation means.