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JPH021150A - Method for manufacturing semiconductor device substrate with excellent heat dissipation properties - Google Patents

Method for manufacturing semiconductor device substrate with excellent heat dissipation properties

Info

Publication number
JPH021150A
JPH021150A JP1028017A JP2801789A JPH021150A JP H021150 A JPH021150 A JP H021150A JP 1028017 A JP1028017 A JP 1028017A JP 2801789 A JP2801789 A JP 2801789A JP H021150 A JPH021150 A JP H021150A
Authority
JP
Japan
Prior art keywords
layer
substrate
excellent heat
sintered substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1028017A
Other languages
Japanese (ja)
Other versions
JP2536612B2 (en
Inventor
Yoshio Kuromitsu
祥郎 黒光
Hideaki Yoshida
秀昭 吉田
Tadaharu Tanaka
田中 忠治
Hiroto Uchida
寛人 内田
Kenji Morinaga
健次 森永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Metal Corp
Original Assignee
Mitsubishi Metal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Metal Corp filed Critical Mitsubishi Metal Corp
Priority to JP1028017A priority Critical patent/JP2536612B2/en
Publication of JPH021150A publication Critical patent/JPH021150A/en
Application granted granted Critical
Publication of JP2536612B2 publication Critical patent/JP2536612B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PURPOSE:To enhance a close contact property of a silicon dioxide (SiO2) layer by forming the silicon dioxide layer with a specific thickness on the surface of an aluminum nitride sintered substrate. CONSTITUTION:The surface of an AlN sintered substrate is oxidized in an atmosphere at an oxygen partial pressure of 10<-2> to 1atm. and at a steam partial pressure of 10<-3>atm. or lower and under a condition that it is heated and kept at a temperature of 1100 to 1500 deg.C; a surface oxide layer composed mainly of aluminum oxide is formed. An SiO2 layer 1b with an average film thickness of 0.05 to 5mum is formed on the surface of the AlN sintered substrate 1a having this surface oxide layer. Thereby, an extremely high close contact property with reference to the SiO2 layer is secured by the surface oxide layer formed on the surface of the substrate; a very excellent heat-dissipating property can be secured by the AlN sintered substrate; accordingly, it is possible to comply with an improvement in an integration density of a semiconductor device sufficiently satisfactorily.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、熱伝導性がよく、シたがってすぐれた放熱
性をもたらす窒化アルミニウム(以下。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention utilizes aluminum nitride (hereinafter referred to as aluminum nitride), which has good thermal conductivity and therefore provides excellent heat dissipation.

AffiNで示す)焼結基体の表面に対する酸化けい素
(以下、 8iQ2で示す)層の密着性がきわめてすぐ
れた半導体装置用基板に関するものである。
The present invention relates to a substrate for a semiconductor device in which a silicon oxide layer (hereinafter referred to as 8iQ2) has extremely good adhesion to the surface of a sintered base (hereinafter referred to as AffiN).

〔従来の技術〕[Conventional technology]

従来、放熱性のすぐれた半導体装置用基板として2例え
ば特開昭62−28847号公報に記載されるように、
AgN焼結基板の表面に、スパッタリング法やゾルゲル
法、さらに光化学蒸着法などにより5iQ2層を形成し
たものが提案されており。
Conventionally, as a substrate for a semiconductor device with excellent heat dissipation properties, 2 has been used, for example, as described in Japanese Patent Application Laid-Open No. 62-28847,
It has been proposed that a 5iQ2 layer is formed on the surface of an AgN sintered substrate by a sputtering method, a sol-gel method, or a photochemical vapor deposition method.

この5iQ2層の表面に例えば導体は−ストや抵抗体ペ
ーストを用いて印刷回路を形成し、焼成することにより
実用に供されることも知られている。
It is also known that a printed circuit can be formed on the surface of this 5iQ2 layer using, for example, a conductor paste or a resistor paste, and the printed circuit can be put to practical use by baking it.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかし、近年の電子機器の高性能化並びに軽薄短小化に
伴い、ハイブリッドモジュールの集積度も一段と増す傾
向にあり、この結果単位当シの発熱量の増大を避けるこ
とができない状態になりつつあるが、上記の従来基板で
は、熱伝導性のすぐれたA1.N焼結基体によってすぐ
れた放熱性が確保できるものの、、 AtN焼結基体と
8102層との密着性が十分でないために、増大する発
熱によって、これらの間に剥離が発生し易くなり、信頼
性の点で問題が生じるようになっている。
However, in recent years, as electronic devices have become more sophisticated, lighter, thinner, and smaller, the degree of integration of hybrid modules has also increased, and as a result, it has become impossible to avoid an increase in the amount of heat generated per unit. , the above-mentioned conventional substrate is A1. which has excellent thermal conductivity. Although excellent heat dissipation is ensured by the N sintered base, the adhesion between the AtN sintered base and the 8102 layer is insufficient, and the increased heat generation tends to cause peeling between them, reducing reliability. Problems are starting to arise.

〔課題を解決するだめの手段〕[Failure to solve the problem]

そこで1本発明者等は、上述のような観点から。 Therefore, the inventors of the present invention, etc., from the above-mentioned viewpoint.

5i02層のAtN焼結基体に対する密着性を向上せし
めるべく研究を行った結果、前記AtN焼結基体の表面
に、酸素分圧、10 〜1気圧、水蒸気分圧:1O−3
気圧以下の雰囲気中で、1100〜1500℃の温度に
加熱保持の条件で酸化処理を施して酸化アルミニウムを
主体とする表面酸化層を形成してやると、この基体表面
部に形成された表面酸化層は、810□層ときわめて強
固に結合することから。
As a result of research to improve the adhesion of the 5i02 layer to the AtN sintered substrate, it was found that the surface of the AtN sintered substrate had an oxygen partial pressure of 10 to 1 atm and a water vapor partial pressure of 1O-3.
When an oxidation treatment is performed under conditions of heating and holding at a temperature of 1100 to 1500°C in an atmosphere below atmospheric pressure to form a surface oxide layer mainly composed of aluminum oxide, the surface oxide layer formed on the surface of the substrate becomes , 810□ layer because of its extremely strong bond.

これらの間に発熱が原因の剥離は全く発生しないように
なるという知見を得たのである。
They found that during this period, peeling caused by heat generation no longer occurs.

この発明は、上記知見にもとづいてなされたものであっ
て。
This invention was made based on the above findings.

平均層厚:0,2〜20μmの表面酸化層を有するAt
N焼結基体の表面に、平均層厚:0.05〜5μmの8
i02層を形成してなる放熱性のすぐれた半導体装置用
基板に特徴を有するものである。
Average layer thickness: At with a surface oxidation layer of 0.2-20 μm
8 with an average layer thickness of 0.05 to 5 μm on the surface of the N sintered substrate.
The present invention is characterized by a semiconductor device substrate having an i02 layer and having excellent heat dissipation properties.

なお、この発明の基板において1表面酸化層の平均層厚
を0.2〜20μmとしたのは、その厚さが0.2μm
未満では、 8i02層の基体表面に対する密着性が十
分満足するものとはならず、剥離の問題を完全に解消す
ることができず、一方その厚さが20μmを越えて厚く
なると、基体のもつすぐれた熱伝導性を阻害するように
なるという理由によるものであり、また前記表面酸化層
の上に形成される8102層の平均層厚を0.05〜5
μmと定めたのは、その厚さが0.05μm未満では1
例えば回路印刷に用いられるペーストの焼成層との密着
性が不十分となシ、一方その厚さが5μmを越えると、
同様に基体のもつすぐれた放熱性が十分に機能しなくな
るという理由からである。
In addition, in the substrate of this invention, the average layer thickness of one surface oxidation layer is set to 0.2 to 20 μm because the thickness is 0.2 μm.
If the thickness is less than 20 μm, the adhesion of the 8i02 layer to the substrate surface will not be fully satisfactory and the problem of peeling will not be completely solved. This is because the average layer thickness of the 8102 layer formed on the surface oxidation layer is 0.05 to 5.
μm is defined as 1 if the thickness is less than 0.05 μm.
For example, if the adhesiveness of the paste used for circuit printing with the fired layer is insufficient, on the other hand, if the thickness exceeds 5 μm,
This is also because the excellent heat dissipation properties of the base body no longer function adequately.

また、この発明の基板は、単層基板として用いても、さ
らにこれに、それぞれ印刷回路を形成した後1例えばほ
うけい酸ガラスなどのガラス粉末を有機バインダーと混
合しては−スト状とし、これを基板表面に印刷添着した
状態で、2枚以上積み重ね、この基板の積み重ね体を、
前記ガラス粉末の軟化点以上の温度に加熱して焼成し、
相互接合することにより形成される多層基板として用い
てもよい。
Further, the substrate of the present invention can be used as a single-layer substrate, and after forming a printed circuit thereon, a glass powder such as borosilicate glass is mixed with an organic binder to form a strip. With this printed and attached to the surface of the board, two or more boards are stacked, and this stack of boards is
Heating and firing at a temperature equal to or higher than the softening point of the glass powder,
It may also be used as a multilayer substrate formed by mutually bonding.

〔実施例〕〔Example〕

つぎに、この発明の基板を実施例により具体的に説明す
る。
Next, the substrate of the present invention will be specifically explained using examples.

まず、原料粉末として、平均粒径:3μmを有するAf
fiN粉末を用い、常圧の窒素雰囲気中、温度:180
0℃に120分間保持の条件で焼結して。
First, Af having an average particle size of 3 μm was used as a raw material powder.
Using fiN powder, temperature: 180 in nitrogen atmosphere at normal pressure
Sintered at 0°C for 120 minutes.

直径:lomxx厚さ:3顛の寸法を有するAtN焼結
基体を成形し、ついでこの基体の表面に。
An AtN sintered substrate having dimensions of diameter: romxx and thickness: 3 is formed, and then on the surface of this substrate.

酸素分圧:10 気圧、水蒸気分圧、10 気圧の雰囲
気中、温度’:1300℃に所定間保持。
In an atmosphere with oxygen partial pressure: 10 atm, water vapor partial pressure, 10 atm, temperature: 1300°C and maintained for a predetermined period of time.

の条件にて酸化処理を施すことにより第1表に示される
平均層厚の表面酸化層を形成し、ついで。
A surface oxidation layer having an average layer thickness shown in Table 1 was formed by performing oxidation treatment under the following conditions.

この上に。On this.

(a)  ターゲット材質:純度99.9 %の高純度
石英ガラス。
(a) Target material: High purity quartz glass with a purity of 99.9%.

ターゲット寸法:直径3朋×高さLow。Target dimensions: Diameter 3mm x height Low.

電カニ1OOW。Electric crab 10OW.

基体回転数: l Or、p、m、 。Base rotation speed: l Or, p, m,.

スパッタ時間二所定時間、 の条件での高周波スパッタ法。Sputtering time 2 predetermined times, High frequency sputtering method under the conditions of.

(b)  エチルシリケート:34’7.9と、エチル
アルコール:500Jと、0.3%HC1水溶液: 1
90,2Iの割合の混合液を、  500 r、p、m
・で回転する基体の表面に10秒間ふりかけ、温度二8
00℃に10分間保持して焼成を1サイクルとし、これ
を所定厚さまで繰り返し行なうことからなるゾルゲル法
、 (C)  反応ガス:容量比で、 8i2H4/ 02
−0.015゜反応容器内圧カニ 0.2 torr 
(b) Ethyl silicate: 34'7.9, ethyl alcohol: 500 J, and 0.3% HC1 aqueous solution: 1
A mixture of 90.2I and 500 r, p, m
・Sprinkle it on the surface of the rotating base for 10 seconds and bring it to a temperature of 28
A sol-gel method consisting of holding at 00°C for 10 minutes and firing as one cycle, and repeating this cycle until a predetermined thickness. (C) Reaction gas: volume ratio, 8i2H4/02
-0.015゜Reaction vessel internal pressure 0.2 torr
.

基体温度=150℃。Substrate temperature = 150°C.

光:水銀ランプ発生光、 反応時間二所定時間。Light: Mercury lamp generated light, Reaction time 2 predetermined times.

の条件での光化学蒸着法(光CVD法)。Photochemical vapor deposition method (photoCVD method) under the following conditions.

以上(a)〜(C)のうちのいずれかの方法で、第1表
に示される平均層厚の5in2層を形成することにより
本発明基板1〜8をそれぞれ製造した。
Substrates 1 to 8 of the present invention were manufactured by forming two 5-inch layers having the average layer thickness shown in Table 1 using any of the methods (a) to (C) above.

また、比較の目的で、基体に酸化処理による表面酸化層
の形成を行なわない以外は、同一の条件で従来基板1−
3をそれぞれ製造した。
For the purpose of comparison, the conventional substrate 1-- was prepared under the same conditions except that the surface oxidation layer was not formed by oxidation treatment on the substrate.
3 were produced respectively.

ついで、この結果得られた各種の基板についマ、。Next, let's talk about the various boards obtained as a result.

レーザーフラッシュ法にて熱伝導度を測定すると共に、
ピーリング試験を行ない、基体と8102層との密着性
を評価した。
In addition to measuring thermal conductivity using the laser flash method,
A peeling test was conducted to evaluate the adhesion between the substrate and the 8102 layer.

なお、ピーリング試験は、第1図に概略斜視図で示され
るように、基板lの表面、すなわち基体1aの表面に密
着形成されたSiO□層lb上に、平面寸法で2 rm
 X 2 tmの面積にAg−20重量%Pd合金粉末
の導体は−ストをスクリーン印刷し、温度=125℃に
10分間保持して乾燥した後、温度=850℃に10分
間保持の条件で焼成しては一スト焼成層2を形成し、つ
いでこの上に直径二0.9期の無酸素銅ワイヤ4を5n
−Pb共晶合金はんだ3を用い、温度:215℃でろう
付けして1図示される状態とし、この状態で無酸素銅ワ
イヤ4をT方向に引張り、この時のピーリング強度(引
きはがし強度)を測定した。これらの測定結果を第1表
に示した。
In the peeling test, as shown in a schematic perspective view in FIG.
A conductor of Ag-20 wt % Pd alloy powder was screen-printed on an area of Then, a first-stroke fired layer 2 is formed, and then 5 nm of oxygen-free copper wire 4 with a diameter of 20.9 mm is formed on this layer.
-Pb eutectic alloy solder 3 is brazed at a temperature of 215°C to the state shown in Figure 1, and in this state, the oxygen-free copper wire 4 is pulled in the T direction to determine the peeling strength (peel strength) was measured. The results of these measurements are shown in Table 1.

〔発明の効果〕〔Effect of the invention〕

第1表に示される結果から、本発明基板1〜8は、従来
基板l〜3と同様に著しく高い熱伝導度を示し、すぐれ
た放熱性を保持した状態で、これより一段と高いピーリ
ング強度を示し、  5i02層の基体に対する密着性
がきわめて高いことが明らかである。
From the results shown in Table 1, substrates 1 to 8 of the present invention exhibit significantly high thermal conductivity similar to conventional substrates 1 to 3, and exhibit much higher peeling strength than conventional substrates while maintaining excellent heat dissipation. It is clear that the adhesion of the 5i02 layer to the substrate is extremely high.

上述のように、この発明の基板は、基体表面部に形成さ
れた表面酸化層によって8102層との間にきわめて高
い密着性が確保され、かつAtN焼結基体によって一段
とすぐれた放熱性が確保されるので、半導体装置の集積
度の向上にも十分満足して対応することができるなど工
業上有用な特性を有するのである。
As mentioned above, in the substrate of the present invention, the surface oxidation layer formed on the surface of the substrate ensures extremely high adhesion with the 8102 layer, and the AtN sintered substrate ensures even better heat dissipation. Therefore, it has industrially useful characteristics such as being able to respond satisfactorily to improvements in the degree of integration of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はピーリング試験方法を示す概略斜視図である。 1・・・基板、    1a・・・基体。 1b・・・5i02層、    2・・・ペースト焼成
層。 3・・・はんだ、    4・・・無酸素銅ワイヤ。 稟 1団
FIG. 1 is a schematic perspective view showing a peeling test method. 1...Substrate, 1a...Base. 1b...5i02 layer, 2... Paste firing layer. 3...Solder, 4...Oxygen-free copper wire. Group 1

Claims (1)

【特許請求の範囲】[Claims] (1)平均層厚:0.2〜20μmの表面酸化層を有す
る窒化アルミニウム焼結基体の表面に、平均層厚:0.
05〜5μmの酸化けい素層を形成してなる放熱性のす
ぐれた半導体装置用基板。
(1) Average layer thickness: 0.2 to 20 μm on the surface of an aluminum nitride sintered substrate having a surface oxidation layer with an average layer thickness of 0.2 to 20 μm.
A semiconductor device substrate with excellent heat dissipation properties formed by forming a silicon oxide layer with a thickness of 0.05 to 5 μm.
JP1028017A 1989-02-07 1989-02-07 Method of manufacturing substrate for semiconductor device having excellent heat dissipation Expired - Fee Related JP2536612B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1028017A JP2536612B2 (en) 1989-02-07 1989-02-07 Method of manufacturing substrate for semiconductor device having excellent heat dissipation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1028017A JP2536612B2 (en) 1989-02-07 1989-02-07 Method of manufacturing substrate for semiconductor device having excellent heat dissipation

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP63021579A Division JPH0834266B2 (en) 1988-02-01 1988-02-01 Semiconductor device substrate with excellent heat dissipation

Publications (2)

Publication Number Publication Date
JPH021150A true JPH021150A (en) 1990-01-05
JP2536612B2 JP2536612B2 (en) 1996-09-18

Family

ID=12236991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1028017A Expired - Fee Related JP2536612B2 (en) 1989-02-07 1989-02-07 Method of manufacturing substrate for semiconductor device having excellent heat dissipation

Country Status (1)

Country Link
JP (1) JP2536612B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1062413C (en) * 1990-10-15 2001-02-28 日本拜耳农药株式会社 Fungicidal and insecticidal composition

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01196149A (en) * 1988-02-01 1989-08-07 Mitsubishi Metal Corp Substrate for semiconductor device with excellent heat-dissipating performance

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01196149A (en) * 1988-02-01 1989-08-07 Mitsubishi Metal Corp Substrate for semiconductor device with excellent heat-dissipating performance

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1062413C (en) * 1990-10-15 2001-02-28 日本拜耳农药株式会社 Fungicidal and insecticidal composition

Also Published As

Publication number Publication date
JP2536612B2 (en) 1996-09-18

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