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JPH02108438U - - Google Patents

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Publication number
JPH02108438U
JPH02108438U JP1747489U JP1747489U JPH02108438U JP H02108438 U JPH02108438 U JP H02108438U JP 1747489 U JP1747489 U JP 1747489U JP 1747489 U JP1747489 U JP 1747489U JP H02108438 U JPH02108438 U JP H02108438U
Authority
JP
Japan
Prior art keywords
flip
flop
signal
clock
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1747489U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1747489U priority Critical patent/JPH02108438U/ja
Publication of JPH02108438U publication Critical patent/JPH02108438U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す回路図、第2
図はその動作を示すタイムチヤート、第3図は従
来の一例を示す回路図、第4図はその動作を示す
タイムチヤートである。 1,2,4,5,7,8,10……ゲート、C
……クロツク信号、R……リセツト信号、S……
セツト信号S。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a time chart showing its operation, FIG. 3 is a circuit diagram showing a conventional example, and FIG. 4 is a time chart showing its operation. 1, 2, 4, 5, 7, 8, 10...gate, C
...Clock signal, R...Reset signal, S...
Set signal S.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] クロツク同期型のR−Sフリツプフロツプの出
力信号と前記R−Sフリツプフロツプのセツト側
信号と前記R−Sフリツプフロツプのリセツト側
信号と前記R−Sフリツプフロツプのクロツク信
号とにもとづいて前記R−Sフリツプフロツプの
出力遅延時間を少なくする回路を含むことを特徴
とするフリツプフロツプ回路。
The output signal of the R-S flip-flop is based on the output signal of the clock-synchronous R-S flip-flop, the set side signal of the R-S flip-flop, the reset side signal of the R-S flip-flop, and the clock signal of the R-S flip-flop. A flip-flop circuit characterized by including a circuit that reduces output delay time.
JP1747489U 1989-02-17 1989-02-17 Pending JPH02108438U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1747489U JPH02108438U (en) 1989-02-17 1989-02-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1747489U JPH02108438U (en) 1989-02-17 1989-02-17

Publications (1)

Publication Number Publication Date
JPH02108438U true JPH02108438U (en) 1990-08-29

Family

ID=31231288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1747489U Pending JPH02108438U (en) 1989-02-17 1989-02-17

Country Status (1)

Country Link
JP (1) JPH02108438U (en)

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