JPH0210329A - Thin film transistor and active matrix circuit board and image display device formed by using the same transistor - Google Patents

Abstract

PURPOSE:To increase the on current of alpha-SiTFT and to improve reproducibility by removing an alpha-Si film from a 1st electrode and the superposed part of 2nd, 3rd electrodes by as much as the thickness thereof or above so that current flows in parallel with a gate electrode. CONSTITUTION:The decrease of the resistance on the gate electrode by as much as the resistance component occurring in the alpha-Si film in the electrode part or in the boundary resistance between the alpha-Si film and the 2nd, 3rd electrodes is resulted if the alpha-Si film is removed from the 1st electrode (gate electrode) and the superposed partof the 2nd, 3rd electrodes (drain electrode, source electrode) y as much as the thickness thereof or above. The current eventually flows in parallel with the gate electrode in this way and hardly receives the resistance of the alpha-Si film and the boundary resistance between the 2nd, 3rd electrodes and the alpha-Si film. The on current of the alpha-SiTFT is increased in this way and the reproducibility is enhanced.

Description

[Detailed description of the invention] [Industrial application field] The IJA of the present invention is a thin film transistor using a semiconductor film mainly composed of silicon, an active matrix circuit board using the thin film transistor as a switching element, and an image display device rItK using the thin film transistor. In particular, the present invention relates to a thin film transistor suitable for improving ON characteristics and distribution of switching characteristics, an active matrix circuit board using the thin film transistor as a switching element, and an image display device using the thin film transistor.

[Conventional technology]

amorphous silicon
on.

(hereinafter abbreviated as a-8i) 1-Thin film transistor with semiconductor layer (amorpb+ous 5ilicon Th1
n) 'i1mTransistor and below, a-3i
(abbreviated as TFT) is attracting attention as a switching element for active matrix drive type display devices.

Figure 8 shows the ft a-8i TF that has been proposed so far.
The cross-sectional structure of T is shown. 1 is the insulating substrate gold, 2 is the gate electrode (first electrode), 3 is the gate insulating film, 4 is a-3
5 indicates the drain electrode (second electrode), and 6 indicates the source electrode (third electrode). (C) and (d) are the second
．． Because the third electrode is inserted between the gate insulating film and the a-3i film, the gate insulating film and a-8i@ cannot be formed continuously, so (a) soft), especially (b), is often adopted. There is.

[Problem to be solved by the invention]

In these a-8i TFTs, the current flows across the a-f3i film, so the resistance of a-8ill and a
-8i Easily affected by the interface state between IIA and the second and third electrodes. Secondly, it is important to suppress the on-current, but when applied to an active matrix circuit board, the on-current often varies, causing a drop in yield.

The object of the present invention is to
The purpose is to prevent the current from decreasing and to make the on-current distribution of the active matrix circuit board uniform.

[Means for Solving the Problems] The above object is achieved by using the a-8i TFT structure (No. 81), with gate 1 pole (first electrode) 2, drain electrode (second electrode) 5, source electrode The overlapping part of the third electrode) 6 is at least the thickness of the a-8i film 4, and the a-8i sandwiched between the first electrode 2, the second electrode 5, and the third electrode 6
FIX 2nd. At least a- from the tip of the third electrode
The film thickness of 8i@ or more is removed and the second. Third
This is achieved by extending the thin film layers constituting the electrodes by at least their thickness.

[Effect]

The first electrode (gate electrode) and the second electrode. Removing more than the thickness of the a-8i film at the overlapping p part of the third electrode (drain electrode, source electrode)
-8i film and the second. This means that the resistance on the gate electrode is lowered by more than the resistance caused by the interfacial resistance with the third electrode. As a result, the current flows parallel to the gate electrode, and the resistor of a -8i and the second. This makes it less susceptible to the influence of the interfacial resistance between the third electrode and the a-8i film.

On the other hand, extending the thin film layers constituting the second and third electrodes on the a-8i film by the same thickness as the a-8i film and the second electrode.
This means ensuring the contact of the third electrode. That is, the second. When the third electrode is made of a metal film and an electrode pattern is formed by isotropic etching, the upper part of the electrode recedes by the thickness of the film, but even in this case, it is completely a-8i and the second. A third contact is made.

〔Example〕

Hereinafter, the present invention will be explained in detail using Examples.

Example 1 A first example is shown in FIGS. 1 to 4. FIG. 1 shows a cross-sectional view of an a-8i TFT to which the present invention is applied. 1 is an insulating substrate such as a glass plate; 2 is a first electrode (gate electrode) made of a metal film such as chromium (Cr); 6 is a gate insulating film made of an insulating film such as a silicon nitride film; is a-8
5 indicates a second electrode (drain electrode) made of a metal film such as aluminum (AI), and 6 indicates a sixth electrode (source electrode) made of a metal film such as AI. l) a indicates the thickness of the a-8i film, and Db indicates the thickness of the AI film constituting the second and third electrodes. LDI, La2 indicates the amount of overlap between the first and second electrodes, and LIN La2 indicates the amount of overlap between the first and third electrodes. The present invention is directed to this LD
I, LI+21 Ls +, Ll+2 are specified. That is, the present invention is applied where the following relationships are established: Ln+≧f)a, La1≧])a LD2≧Db, Ls2≧Db.

The manufacturing process of this example will be outlined below.

(1) First, a metal film such as Cr is formed on a cleaned glass substrate 1 by sputtering.

(2) Form gate electrode pattern 2 using a normal photoetching process.

(3) Blaze wcVD (Chemical
(Al Vapor Deposition) Law)
Broadcast continuously.

(4) Complete pattern 4 of the a-F3i film is formed by normal photolithography process and dry etching.

A metal film such as fil A1 is replaced by sputtering.

(6) Drain electrode pattern 5 and source electrode pattern 6 are formed using a normal photoetching process.

(7) Expose the gate terminal by normal photolithography process and dry etching.

With the above steps, the a-8i TFT shown in FIG. 1 is completed.

FIG. 2 is a graph showing the effects of the present invention. Since the influence of the overlap between the L electrodes is large between the source and gate, the relationship between the LSI on the source electrode side and the on-current was investigated. On the drain electrode side, there is sufficient overlap between the drain electrode and the gate electrode. As La1 increases, it increases rapidly and Lg1≧
Da on 11L#, powder.

sum up That is, it means that the drain current can be drawn out when L8+≧Da. Figure 2 shows number 811! ¥1
The results for the a-8i TFT according to the conventional method shown in FIG. In TPT according to the conventional method, a-8i@ protrudes outside the gate electrode 2 at LBl<o.

In this figure, the data for the conventional TPT shows the on-lt flow for the overlap of the gate and source electrodes. When the overlap i force exceeds t5Da, the on-current of the TPT according to the conventional method is saturated, but the level is about 1/2 of that when the present invention is applied.

The third graph shows the relationship between the overlapping amount LS2 of the gate electrode and the source electrode across the overlapping film (gate insulating film+A-8i film) and the ON-IT current. When Ls2 is 0, the channel and the electrode do not contact each other, so no on-current flows. On the other hand, if LB2 is set to approximately the thickness of the thin film layer constituting the source electrode, an on-current will flow. This is I
≦This is because the contact between the pole and the a-8i film is established.

Figure 4 shows approximately 500 a on a 100x100- board.
This is the result of fabricating a -8i TFT and looking at its on-current distribution. Obviously, the on-state current is larger and the distribution is smaller in the present invention than in the conventional method.

The above effect is that the a-8i film is removed from the part sandwiched between the source electrode and the gate electrode, and that part is converted into a thin film layer that constitutes the electrode, and furthermore, the contact between the a-8i and the electrode film can be made completely. This is achieved by doing this. The effect of the present invention is obtained when Ls1≧l)a, Laz≧Db, but the film thickness of Da is generally 10 to 300 nm, and Db=300 nm.
Considering that it is ~1 μm, the alignment accuracy in the photoetching process, the interelectrode capacitance between the source electrode and the gate electrode, etc., Ls 1 "1 ~ 5 μm, L
B2-1 to 3 μm is optimal. Also, a-8iTFT
When applied to active matrix circuit boards,
2 in Figure 1. Since each of the third electrodes functions as a source electrode or a drain electrode, the same can be said of the second electrode, which is used as a drain electrode in this embodiment. Therefore, it is practical to set Ln+::i to 3 μm and LB2 = 1 to 3 μm.

Example 2 A second example is shown in FIG. In this case, the lower layer of the second and third electrodes is doped with phosphorus (P) and an fcn type a-8ill is inserted. In this case, the on-current increases slightly compared to the first embodiment, satisfies the heat resistance, and has an effect equal to or greater than that of the first embodiment.

Note that drawings similar to the present invention can be found in specifications filed for purposes different from the purpose of the present invention. This is shown in FIG. (a) is a drawing found in Japanese Patent Application Laid-Open No. 62-67872. This invention aims to improve the reproducibility of the threshold voltage by forming an impurity doped layer inside the amorphous silicon that is the active layer. Therefore, unlike the present invention, the relative positional relationship between the gate electrode, drain electrode, and source electrode is not defined, and this is different from the present invention.

(b) is a diagram found in Japanese Unexamined Patent Publication No. 171166/1999.

In this method, 5IsNih is laminated on a-8i in almost the same shape, and n+a-3i is inserted under the second and third electrodes for electrical contact. Therefore, this is different from the present invention for the same reason as in case (a).

Example 3 A third example is shown in FIG. This is according to the present invention
A part of an actives circuit board to which a -8i TFT is applied is shown in (a) as a plan view, and (b) as a cross-sectional view of the KTFT section. There is a region without a-8i at the bottom of the drain electrode 5 and source electrode 6, and the present invention is applied to this region. The drain electrode 5 is connected to a signal line (drain bus line) 9, and the gate electrode 2 is connected to a scanning line (gate bus line) 8. Further, the source electrode 6 is connected to a single element electrode 7. In this active matrix circuit board, the a-8i TFT shown in FIG. 3 is used, and the above-mentioned effects can be obtained. That is, the effects of reducing screen unevenness and improving responsiveness can be obtained. The manufacturing process for this active matrix circuit board is almost the same as that for the a-8i TFT shown in FIGS. 1 and 3, and will be briefly explained below.

+1) Gold i′ such as Cr film on the cleaned glass substrate 1
6! A film of X is formed by a sputtering method or the like, and a gate electrode pattern 2 and a gate bus line 8 are formed using a normal photoetching process.

(2) Using the plasma CVD method, a silicon nitride film as the gate insulating film 3 is formed from a mixed gas of silane, ammonia, and nitrogen, and a-8i l[ is formed as a semiconductor layer from a mixed gas of silane and hydrogen. Na-8i11fi from a mixed gas of hydrogen and phosphine, true 9! Continuous film formation without breaking.

(3) Process the a-8i film using a normal photolithography process and dry etching to form a predetermined a-8i film.
Form pattern 4. At this time, the contents of the present invention are applied.

(41Cr tlR: Al@ is sequentially laminated by a sputtering method or the like to form a source electrode 6, a drain electrode 5, and a drain bus line 9. Next, the na-8i film on the channel is removed by dry etching.

(6) ITO (Indium) which is a substitute for transparent conductor
Tin oxide) film is formed by e-sputtering method. Next, a pixel electrode pattern 7 is formed by a normal photoetching process.

(6) The silicon nitride film, which is the gate insulating film, is patterned by a normal photolithography process and dry etching, and the gate bus line 8 is terminaled.

With the above steps, the active matrix circuit board shown in FIG. 6 is completed.

In the above embodiments, chromium (Cr) is used as the gate electrode 2 and gate bus line 8, a multilayer film of Cr and AI is used as the rain electrode 5, source electrode 6, and drain bus line 9, and silicon nitride is used as the gate insulating film. However, C is used as the gate electrode 2 and gate bus line 8.
Materials other than r (e.g. molybdenum, tantalum, IT
(O, aluminum, etc.), and the drain electrode 5, source electrode 6, and train line 9 are made of Cr, a film other than AI (for example, a single film of Cr or AI, ITO, molybdenum, tantalum, etc.), t-, gate isolation. Materials other than the silicon nitride film (eg, silicon oxide film, tantalum oxide film, etc.) may be used as the region film 5.

Embodiment 4 FIG. 7 shows the main part of an example in which the image display device of the present invention is formed of a liquid crystal display device using an active matrix circuit board constructed of &a-8i TFTs shown in FIG. 1. It is. FIG. 7(a) shows a plan view thereof, and FIG. 7(b) shows a sectional view thereof.

In the figure, 70 is a-8i shown in FIG. 1 of Example 1.
An active matrix circuit board using TFTs, 20 a polarizing plate, 21 a color filter, and 23 a counter electrode of the display pixel polarization 7 made of a transparent conductive film, which is also a transparent conductive film. ! Those consisting of @, 22 and 26 are protective films, respectively.
24 is an alignment film, and 25 is a liquid crystal filling the void.

This example of the image display device has the above-described configuration and is for color display. Further, this display device can be easily manufactured in the same manner as the manufacturing process of a well-known color liquid crystal display device.

Note that, in addition to the configuration shown in FIG. 15, an actual display device is provided with various electric circuit control systems and illumination means from the back as well-known image display driving means, but these are omitted.

〔Effect of the invention〕

According to the present invention, the on-current (mobility) of a-8i TFT
This has the effect of increasing the reproducibility.

Therefore, in such an active matrix circuit board configured with a large number of a-8i TFTs, the on-characteristic distribution of the a-8i TFTs in each pixel is favorable, and a high yield can be achieved. Furthermore, an image display device using this active matrix circuit board has a
-8i TFTs and active matrix circuit boards configured with them have the above-mentioned features, so they have the effect of improving responsiveness and eliminating screen unevenness.
This will greatly contribute to the development of this technical field.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing an embodiment of an amorphous silicon thin film transistor of the present invention, FIGS. 2 and 3 are graphs showing the principles and effects of the present invention, and FIG. 4 is a graph showing the effects of the present invention. Graph, FIG. 3 is a sectional view showing a second embodiment of the present invention, FIG. 6 is a plan view and sectional view showing an embodiment of an active matrix circuit board of the present invention, and FIG. 7 is an image of the present invention. A plan view and a sectional view showing one embodiment of a display device, and FIGS. 8 and 9 are sectional views of a conventional example. DESCRIPTION OF SYMBOLS 1... Insulating substrate, double gate electrode, 5... Kate insulating film, 4... Amorphous silicon film, 5... Drain cage electrode, 6... Source electrode, 7...・Display pixel electrode, 8
゛...Gate lot line, 9...Drain bus line, 51゜61...N-type amorphous silicon, 20...
Polarizing plate, 21... Color filter, 22.26...
Protective film, 23... Counter electrode, 24... Alignment film, 25
···liquid crystal. 2nd - Rain 3's lA main character Mitsumaru (PL scale) 22.2! -・Safety'' Disaster 7 Ku゛° 7 Riko Itsu'Mad IJ7 slot sleep, la quiet del l-... skin 52ψ spear 1st ride east 8th

Claims (1)

[Claims] 1. A first electrode pattern serving as a gate electrode on an insulating substrate, a first insulating film provided to cover the electrode pattern, and a first insulating film provided on the first insulating film. A semiconductor film pattern mainly composed of silicon, which overlaps with the electrode and has a limited area, and a second and third electrode pattern serving as a drain electrode or a source electrode on the semiconductor film pattern, at least in the semiconductor film pattern. In the thin film transistor arranged so as to partially cover the thin film transistor, the first insulating film is formed only between the thin film layer forming the first electrode and the thin film layer forming the second and third electrodes. 1. A thin film transistor characterized in that a region and a region composed of the insulating film and the semiconductor film are present. 2. The thin film transistor according to claim 1, which satisfies the following conditions. (1) A region consisting only of the first insulating film sandwiched between a thin film layer constituting the first electrode and a thin film layer constituting the second electrode, A thin film transistor realized by removing at least a distance approximately equal to the thickness of the semiconductor film from an end face of the first electrode pattern existing under the second electrode toward the third electrode pattern. (2) A region consisting only of the first insulating film sandwiched between a thin film layer constituting the first electrode and a thin film layer constituting the third electrode, A thin film transistor realized by removing a distance at least approximately equal to the thickness of the semiconductor film from the end face of the first electrode pattern existing in the lower layer of the electrode toward the second electrode pattern. (3) A region consisting of the first insulating film and the semiconductor film that is sandwiched between the thin film layer constituting the first electrode and the thin film layer constituting the second electrode, from the end face of the semiconductor film existing on the second electrode side toward the third electrode, the thin film layer constituting the electrode is at least approximately equal in thickness to the thin film layer constituting the second electrode. Thin film transistor extended over distance. (4) A region consisting of the first insulating film and the semiconductor device, which is sandwiched between the thin film layer constituting the first electrode and the thin film layer constituting the third electrode, is The thin film layer constituting the electrode is extended from the end face of the semiconductor layer existing on the third electrode side toward the second electrode to a thickness approximately equal to at least the thickness of the thin film layer constituting the third electrode. Thin film transistor extended over distance. 3. In the thin film transistor according to claim 1 or 2, the thin film layer constituting the second electrode and the thin film layer constituting the third electrode contain at least P, As,
A thin film transistor having a structure in which a silicon-based thin film containing one element of Sb and at least one metal film are sequentially laminated. 4. A plurality of thin film transistors according to claim 1, 2 or 3 are provided in a matrix, and the first electrodes of the thin film transistors in the same row are connected to form a first bus line, and the thin film transistors in the same column are provided. Said second
An active matrix circuit board that connects the electrodes to form a second bus line. 5. A display pixel electrode is connected to the third electrode of each thin film transistor of the active matrix circuit board according to claim 4, and a counter electrode is provided opposite to the display pixel electrode, and the display pixel electrode and the counter electrode An image display device characterized in that a display cell is formed by filling a gap with liquid crystal and sealing the gap.