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JPH0158888B2 - - Google Patents

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Publication number
JPH0158888B2
JPH0158888B2 JP56202438A JP20243881A JPH0158888B2 JP H0158888 B2 JPH0158888 B2 JP H0158888B2 JP 56202438 A JP56202438 A JP 56202438A JP 20243881 A JP20243881 A JP 20243881A JP H0158888 B2 JPH0158888 B2 JP H0158888B2
Authority
JP
Japan
Prior art keywords
circuit
diode
output
signal
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56202438A
Other languages
Japanese (ja)
Other versions
JPS58104515A (en
Inventor
Masahiro Tsucha
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Faurecia Clarion Electronics Co Ltd
Original Assignee
Clarion Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Clarion Co Ltd filed Critical Clarion Co Ltd
Priority to JP20243881A priority Critical patent/JPS58104515A/en
Publication of JPS58104515A publication Critical patent/JPS58104515A/en
Publication of JPH0158888B2 publication Critical patent/JPH0158888B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/02Multiple-port networks
    • H03H11/24Frequency-independent attenuators

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Attenuators (AREA)

Description

【発明の詳細な説明】 本発明はダイオード可変減衰回路、特にRF信
号路に減衰用ダイオードを介装して出力を一定と
するための自動出力制御系において、減衰用ダイ
オードの減衰量と制御電流との非直線性を補償し
て、入力変動に対して高精度で出力を一定とする
ための改良にする。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a diode variable attenuation circuit, particularly an automatic output control system for maintaining a constant output by interposing an attenuation diode in an RF signal path. This is an improvement that compensates for the non-linearity between the two and makes the output constant with high precision despite input fluctuations.

従来より自動出力制御系においてダイオード可
変減衰器が広く用いられている。この一例を第1
図に示す。1は発振器、2は減衰用ダイオード、
3は電力増巾器、4は検出回路、5は出力端、6
は検波器、7は制御回路である。電力増巾器3の
出力は検出回路4を介して検波器6で検波され、
この検波出力電圧を制御回路7で基準電圧と比較
し、その差信号に応じて減衰用ダイオード2に制
御電流を与えて減衰用ダイオード2の減衰量を制
御し、出力端5に一定の出力を得る。減衰用ダイ
オード2の具体的な回路構成例を第2図と第3図
とに示す。10はRF信号入力端、11はRF信号
出力端、12はRFチヨーク、13は制御電流入
力端、14,15はトランスである。さらに従来
の制御回路7を第4図に示す。20は検波器6に
接続される検波出力電圧入力端、21は演算増巾
器、22は基準電圧、23,24,26,27は
抵抗、25はPNPトランジスタ、28は制御電
流出力端、Vccは電源端子である。RF信号入力
の変動により検波出力電圧が変動し、検波出力電
圧と基準電圧22との差信号に応じた信号を演算
増巾器21の出力として得、該出力に応じて
PNPトランジスタ25を制御して制御電流出力
端28から減衰用ダイオード2に与えられて減衰
量を調整する。かかる従来の制御回路7では、検
波出力電圧と基準電圧22との差信号の変動に対
して減衰用ダイオード2の制御電流を線形に変動
させるが、減衰用ダイオード2の制御電流に対す
る減衰量は非線形であるため、出力端5に現われ
る出力は一定とならない不具合がある。即ち、第
5図に示すごとく減衰用ダイオード2の制御電流
−減衰量特性は非線形であり、基準となるRF信
号入力より大きな信号領域の入力変動に対して減
衰用ダイオード2の減衰量が好適に制御電流を変
動させるとすれば、第6図の破線aのごとく小さ
な信号領域の入力変動に対しては減衰用ダイオー
ド2の減衰量が大きすぎて出力端5の出力が第7
図Aのごとく低下する。一方基準となるRF信号
入力より小さな信号領域の入力変動に対して減衰
用ダイオード2の減衰量が好適に制御電流を変動
させるとすれば、第6図の破線bのごとく大きな
信号領域の入力変動に対して減衰用ダイオード2
の減衰量がやはり大きすぎて出力端5の出力を一
定とすることができない。
Diode variable attenuators have been widely used in automatic output control systems. An example of this is
As shown in the figure. 1 is an oscillator, 2 is an attenuation diode,
3 is a power amplifier, 4 is a detection circuit, 5 is an output end, 6
is a detector, and 7 is a control circuit. The output of the power amplifier 3 is detected by a detector 6 via a detection circuit 4,
This detected output voltage is compared with a reference voltage in the control circuit 7, and a control current is applied to the attenuation diode 2 according to the difference signal to control the amount of attenuation of the attenuation diode 2, and a constant output is output to the output terminal 5. obtain. A specific example of the circuit configuration of the attenuation diode 2 is shown in FIGS. 2 and 3. 10 is an RF signal input end, 11 is an RF signal output end, 12 is an RF chain, 13 is a control current input end, and 14 and 15 are transformers. Further, a conventional control circuit 7 is shown in FIG. 20 is a detection output voltage input terminal connected to the detector 6, 21 is an operational amplifier, 22 is a reference voltage, 23, 24, 26, 27 are resistors, 25 is a PNP transistor, 28 is a control current output terminal, Vcc is the power terminal. The detection output voltage fluctuates due to fluctuations in the RF signal input, and a signal corresponding to the difference signal between the detection output voltage and the reference voltage 22 is obtained as the output of the operational amplifier 21.
The PNP transistor 25 is controlled and the control current is applied from the control current output terminal 28 to the attenuation diode 2 to adjust the amount of attenuation. In such a conventional control circuit 7, the control current of the attenuation diode 2 varies linearly with respect to the variation of the difference signal between the detection output voltage and the reference voltage 22, but the amount of attenuation with respect to the control current of the attenuation diode 2 is non-linear. Therefore, there is a problem that the output appearing at the output terminal 5 is not constant. That is, as shown in FIG. 5, the control current-attenuation characteristic of the attenuation diode 2 is nonlinear, and the attenuation of the attenuation diode 2 is suitable for input fluctuations in a signal region larger than the reference RF signal input. If the control current is to be varied, the attenuation amount of the attenuation diode 2 is too large for input fluctuations in a small signal region as shown by the broken line a in FIG.
It decreases as shown in Figure A. On the other hand, if the attenuation amount of the attenuation diode 2 appropriately changes the control current for input fluctuations in a signal region smaller than the reference RF signal input, then the input fluctuations in a large signal region as shown by the broken line b in Fig. 6. Attenuation diode 2
The amount of attenuation is still too large, making it impossible to keep the output at the output end 5 constant.

本発明はかかる従来技術の不具合を改良するた
めになされたもので、信号入力の基準より大なる
信号の領域と小なる信号の領域とで入力変動に対
する制御電流の変動を異にして、減衰用ダイオー
ドを制御するように構成したことを特徴とする。
以下第8図に示す実施例を参照して本発明を説明
する。図において他の図と同一符号は同一部材を
示す。即ち、演算増幅器21は検波器の検波出力
電圧と基準電圧とが入力され、該検波出力電圧と
基準電圧との差信号に対応した差信号出力を発生
する第1の回路に相当し、第1のPNPトランジ
スタ25は電源と制御入力端との間に介装され、
上記差信号に応じて制御出力信号を上記制御入力
端に送出する第2の回路に相当する。そして演算
増幅器21の出力端は抵抗24を介して第1の
PNPトランジスタ25のベースに接続され、こ
の第1のトランジスタ25のエミツタは抵抗26
を介して電源端子Vccに接続され、コレクタは抵
抗27を介して制御電流出力端28に接続される
ことは第4図に示す従来の制御回路と同様であ
る。本発明はかかる従来回路に、電源と制御入力
端との間に制御出力信号を上記差信号に対して非
直線関係にする第3の回路として、例えば第2の
PNPトランジスタ30を介装したものである。
第1のPNPトランジスタ25のエミツタはさら
に抵抗29を介して第2のPNPトランジスタ3
0のベースに接続され、この第2のPNPトラン
ジスタ30のエミツタは抵抗31を介して電源端
子Vccに接続され、コレクタは抵抗32を介して
制御電流出力端28に接続される。
The present invention has been made in order to improve the problems of the prior art.The present invention has been made to improve the problem of the prior art. It is characterized by being configured to control a diode.
The present invention will be explained below with reference to the embodiment shown in FIG. In the figures, the same reference numerals as in other figures indicate the same members. That is, the operational amplifier 21 corresponds to a first circuit into which the detected output voltage of the detector and the reference voltage are input, and which generates a difference signal output corresponding to the difference signal between the detected output voltage and the reference voltage. A PNP transistor 25 is interposed between the power supply and the control input terminal,
This corresponds to a second circuit that sends a control output signal to the control input terminal in accordance with the difference signal. The output terminal of the operational amplifier 21 is connected to the first terminal via the resistor 24.
It is connected to the base of a PNP transistor 25, and the emitter of this first transistor 25 is connected to a resistor 26.
It is similar to the conventional control circuit shown in FIG. 4 that the collector is connected to the power supply terminal Vcc through the resistor 27 and the control current output terminal 28 through the resistor 27. The present invention provides such a conventional circuit with a third circuit between the power supply and the control input terminal that makes the control output signal have a non-linear relationship with respect to the difference signal, for example, a second circuit.
A PNP transistor 30 is inserted.
The emitter of the first PNP transistor 25 is further connected to the second PNP transistor 3 via a resistor 29.
The emitter of this second PNP transistor 30 is connected to the power supply terminal Vcc through a resistor 31, and the collector is connected to the control current output terminal 28 through a resistor 32.

本発明の動作につき説明すれば、検波出力電圧
が基準電圧22と等しい時に、第1のPNPトラ
ンジスタ25は制御電流出力端子28に適宜に設
定された制御電流が流れるよう設定されている。
そしてこの状態における第1のPNPトランジス
タ25のエミツタ電圧では、第2のPNPトラン
ジスタ30はOFF状態となるよう設定されてい
る。そして、信号入力が大となり検波出力電圧が
基準電圧22より高くなると、第1のPNPトラ
ンジスタ25のインピーダンスは検波出力電圧と
基準電圧22との差信号に応じて線形に増大して
制御電流を減少させる。第1のPNPトランジス
タ2のインピーダンスの増大に伴ないエミツタ電
圧は上昇し、第2のPNPトランジスタ30は
OFF状態を維持する。一方信号入力が小となり
検波出力電圧が基準電圧22より低くなると、第
1のPNPトランジスタ25のインピーダンスは
検波出力電圧と基準電圧22との差信号に比例し
て線形に減少して、第1のPNPトランジスタ2
5を介して流れる制御電流を差信号に応じて増加
させる。さらにこの第1のPNPトランジスタ2
5のインビーダンスの低下に伴ないエミツタ電圧
も低下し、第2のPNPトランジスタ30をOFF
状態から能動域として制御電流出力端28に電流
を流す。したがつて、制御電流出力端28に流れ
る電流は第1のPNPトランジスタ25と第2の
PNPトランジスタ30との双方を流れる電流が
加算されたものとなり、検波出力電圧が基準電圧
22より高くなる場合の差信号の変動に比して制
御電流の増加分は大きくなる。このため、検波出
力電圧が基準電圧より高い領域、即ち信号入力の
大なる領域では第6図の破線aの差信号−制御電
流特性をとり、低い領域、即ち信号入力の小なる
領域では破線bの差信号−制御電流特性をとり、
減衰用ダイオード2の非直線の減衰特性を補償す
ることができ、第7図bのごとき信号入力の変動
に対して、高精度で出力信号電圧を一定とするこ
とができる。
To explain the operation of the present invention, when the detected output voltage is equal to the reference voltage 22, the first PNP transistor 25 is set so that an appropriately set control current flows through the control current output terminal 28.
Then, at the emitter voltage of the first PNP transistor 25 in this state, the second PNP transistor 30 is set to be in the OFF state. When the signal input becomes large and the detected output voltage becomes higher than the reference voltage 22, the impedance of the first PNP transistor 25 increases linearly in accordance with the difference signal between the detected output voltage and the reference voltage 22, reducing the control current. let As the impedance of the first PNP transistor 2 increases, the emitter voltage increases, and the second PNP transistor 30
Maintain OFF state. On the other hand, when the signal input becomes small and the detected output voltage becomes lower than the reference voltage 22, the impedance of the first PNP transistor 25 decreases linearly in proportion to the difference signal between the detected output voltage and the reference voltage 22. PNP transistor 2
5 is increased in accordance with the difference signal. Furthermore, this first PNP transistor 2
As the impedance of transistor 5 decreases, the emitter voltage also decreases, turning off the second PNP transistor 30.
From this state, a current flows to the control current output terminal 28 as an active region. Therefore, the current flowing to the control current output terminal 28 is connected to the first PNP transistor 25 and the second PNP transistor 25.
The current flowing through both the PNP transistor 30 and the PNP transistor 30 is added, and the increase in the control current becomes larger than the variation in the difference signal when the detected output voltage becomes higher than the reference voltage 22. Therefore, in the region where the detection output voltage is higher than the reference voltage, that is, in the region where the signal input is large, the difference signal-control current characteristic is shown by the broken line a in FIG. Take the difference signal-control current characteristics of
The non-linear attenuation characteristic of the attenuation diode 2 can be compensated for, and the output signal voltage can be kept constant with high precision even with fluctuations in the signal input as shown in FIG. 7b.

なお、上記実施例では第1のPNPトランジス
タ25のコレクタ電流と差信号の特性を第6図破
線aに設定して、検波出力電圧が基準電圧22よ
り低い領域で第2のPNPトランジスタ30のコ
レクタ電流を加算するものであるが、検波出力電
圧が基準電圧22より低い領域で第1のPNPト
ランジスタ25のコレクタ電流と差信号の特性を
第6図破線bのごとく設定し、検波出力電圧が基
準電圧22より高い領域で別のトランジスタ等か
ら前記コレクタ電流に電流を加算して破線aのご
とき特性を構成してもよい。
In the above embodiment, the characteristics of the collector current of the first PNP transistor 25 and the difference signal are set as shown by the broken line a in FIG. The current is added, but in the region where the detected output voltage is lower than the reference voltage 22, the characteristics of the collector current of the first PNP transistor 25 and the difference signal are set as shown by the broken line b in Fig. 6, and the detected output voltage is set as the reference voltage. In a region higher than the voltage 22, a current may be added to the collector current from another transistor or the like to form a characteristic as shown by the broken line a.

以上説明した所から明らかなように、本発明に
よれば、検波出力電圧と基準電圧との差信号に対
して制御電流を非直線の関係としたため、信号入
力に応じた減衰量が減衰用ダイオードで得られ、
信号入力の変動に対する出力信号電圧を高精度で
一定とすることができる。
As is clear from the above explanation, according to the present invention, since the control current has a non-linear relationship with respect to the difference signal between the detection output voltage and the reference voltage, the amount of attenuation according to the signal input is obtained with
The output signal voltage can be kept constant with high precision in response to fluctuations in the signal input.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はダイオード可変減衰器を自動出力制御
等に用いたブロツク回路図、第2図および第3図
は減衰用ダイオードの具体的な回路構成図、第4
図は減衰用ダイオードを制御するための従来の制
御回路図、第5図は減衰用ダイオードの制御電流
−減衰量特性図でありAは特性全域を示す図であ
り、Bは減衰器として利用する領域の特性を詳細
に示す図、第6図は従来回路および本発明の動作
を説明するための特性図、第7図は信号入力−出
力信号電圧特性図であつてAは従来回路によるも
のでBは本発明によるものである。第8図は本発
明に用いる制御回路の実施例を示す回路図であ
る。 2……減衰用ダイオード、6……検波器、7…
…制御回路、22……基準電圧、25……第1の
PNPトランジスタ、30……第2のPNPトラン
ジスタ。
Figure 1 is a block circuit diagram using a diode variable attenuator for automatic output control, etc. Figures 2 and 3 are specific circuit configuration diagrams of the attenuation diode.
The figure is a conventional control circuit diagram for controlling an attenuation diode, and Fig. 5 is a control current-attenuation characteristic diagram of an attenuation diode, where A is a diagram showing the entire characteristic range, and B is a diagram used as an attenuator. FIG. 6 is a characteristic diagram for explaining the operation of the conventional circuit and the present invention. FIG. 7 is a signal input-output signal voltage characteristic diagram, and A is a characteristic diagram of the conventional circuit. B is according to the invention. FIG. 8 is a circuit diagram showing an embodiment of a control circuit used in the present invention. 2... Attenuation diode, 6... Detector, 7...
...Control circuit, 22...Reference voltage, 25...First
PNP transistor, 30... second PNP transistor.

Claims (1)

【特許請求の範囲】 1 信号路に介装され制御入力端を有する減衰用
ダイオードと、この減衰用ダイオードの出力信号
を検波する検波器と、 上記検波器の検波出力電圧と、基準電圧とが入
力され、該検波出力電圧と基準電圧との差信号に
対応した差信号出力を発生する第1の回路及び、
電源と上記制御入力端との間に介装された第1の
トランジスタを含み、上記差信号がそのベースに
入力されることにより制御出力信号を上記制御入
力端に送出する第2の回路を有するダイオード可
変減衰器において、 上記電源と制御入力端との間に介装されベース
が上記第2の回路に接続された第2のトランジス
タを含み、上記第2の回路の状態に応じて上記制
御出力信号を上記差信号に対して非直線関係にす
る第3の回路を具備したことを特徴とするダイオ
ード可変減衰回路。 2 上記第1の回路は一方の入力が検波器出力、
他方の入力が基準電圧である演算増幅器であり、
上記第1及び第2のトランジスタはPNPトラン
ジスタであつて、第2のトランジスタのベースが
抵抗を介して第1のトランジスタのエミツタ側に
接続されていることを特徴とする特許請求の範囲
第1項記載のダイオード可変減衰回路。 3 前記第1と第2のPNPトランジスタのコレ
クタ電流を合わせるように、前記減衰用ダイオー
ドの制御入力端に接続されたことを特徴とする特
許請求の範囲第2項記載のダイオード可変減衰回
路。
[Claims] 1. An attenuating diode interposed in a signal path and having a control input terminal, a detector for detecting an output signal of the attenuating diode, a detected output voltage of the detector, and a reference voltage. a first circuit that is input and generates a difference signal output corresponding to the difference signal between the detected output voltage and the reference voltage;
A second circuit includes a first transistor interposed between a power source and the control input terminal, and transmits a control output signal to the control input terminal when the difference signal is input to its base. The diode variable attenuator includes a second transistor interposed between the power supply and the control input terminal, the base of which is connected to the second circuit, and the control output according to the state of the second circuit. A diode variable attenuation circuit characterized by comprising a third circuit that brings a signal into a non-linear relationship with respect to the difference signal. 2 The above first circuit has one input as the detector output,
is an operational amplifier whose other input is a reference voltage;
Claim 1, wherein the first and second transistors are PNP transistors, and the base of the second transistor is connected to the emitter side of the first transistor via a resistor. Diode variable attenuation circuit as described. 3. The diode variable attenuation circuit according to claim 2, wherein the diode variable attenuation circuit is connected to a control input terminal of the attenuation diode so as to match the collector currents of the first and second PNP transistors.
JP20243881A 1981-12-17 1981-12-17 Diode variable attenuation circuit Granted JPS58104515A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20243881A JPS58104515A (en) 1981-12-17 1981-12-17 Diode variable attenuation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20243881A JPS58104515A (en) 1981-12-17 1981-12-17 Diode variable attenuation circuit

Publications (2)

Publication Number Publication Date
JPS58104515A JPS58104515A (en) 1983-06-22
JPH0158888B2 true JPH0158888B2 (en) 1989-12-14

Family

ID=16457518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20243881A Granted JPS58104515A (en) 1981-12-17 1981-12-17 Diode variable attenuation circuit

Country Status (1)

Country Link
JP (1) JPS58104515A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5239382U (en) * 1975-09-11 1977-03-19

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10024468B2 (en) 2014-05-09 2018-07-17 Swagelok Company Conduit fitting with components adapted for facilitating assembly
US10584814B2 (en) 2016-03-23 2020-03-10 Swagelok Company Conduit fitting with stroke resisting features
US11009158B2 (en) 2016-03-23 2021-05-18 Swagelok Company Conduit fitting with stroke resisting features

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JPS58104515A (en) 1983-06-22

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