JPH01320557A - Shared storage device - Google Patents

Abstract

PURPOSE:To improve the throughput of a storage device by performing unitary management whether or not an area is the one protected in an interface device or a bus controller before making access to the storage device by a computer. CONSTITUTION:The computer 3 sets a write address on the address register 21 of the interface device 2, and write data on a data register 22, and a protection key in data write on a protection key register 23. Protection lock is read out from a protection lock memory 26 according to the content of the register 21, and it is compared with the content of the register 23 by using a comparator 25. When it is judged that write is possible as a result of comparison, a request to make access to the memory device 1 is issued. When permission to use the memory device 1 is issued from the bus controller 4, the address of the register 21 is fetched in an address register 11, and the data in the register 22 is fetched in a data register 12, and the content of the register 12 is written on the address of a memory 15 indicated by the register 11. Thus, it is possible to improve the throughput of the memory device.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a shared storage device that can simplify the protection management of a shared storage area in a shared storage device of a computer and improve access throughput.

[Conventional technology]

FIG. 3 is a system configuration diagram showing a conventional shared storage device disclosed in, for example, Japanese Unexamined Patent Publication No. 56-143063.
In the figure, 1 is a storage device and 2 is an interface device. Multiple units such as 2b and 2e are connected. 3 is a computer that connects 3a and 3 via the interface device 2.
Multiple units are connected as shown in b and 3c. 4 is a bus control device, 5 is a bus, and each of the above-mentioned interface devices 28 to 2
c. Storage device 1. The bus control bag W4 is connected to configure a shared storage device. The storage device 1 includes address registers 11 . Data register 12. Protection key register 13. Comparison circuit 14 for comparing the protection key and protection lock. It is composed of a memory 15 and a protection lock memory 16. The interface device 2 includes an address register 21, a data register 22. It is composed of a protection key register 23 and a memory protection detection circuit 24. Next, the operation will be explained. A plurality of computers 3a to 3c connected to the shared storage device access the storage device I through interface devices 2a to 2c, respectively. Access requests from each of the interface devices 2a to 2C are prioritized by the bus control device 4, and controlled so that any of the permitted interface devices 2a to 2c can use the bus 5. Although this method is implemented using a well-known bus control method, it does not affect the purpose of the present invention, which will be described later. Now, an example of writing data into the memory 15 of the storage device 1 will be described using the computer 3a and the interface device 2a as representatives, respectively. The computer 3a sets a write address in the address register 21, write data in the data register 22, and a protection key for data writing in the protection key register 23 of the interface device 2a, and requests access to the storage device 1. When the bus control device 4 permits the use of the bus 5, the address register 2 is stored in the address register 11 of the storage device 1.
The address set to 1 is taken into the data register 12, the data set in the data register 22 is taken into the data register 12, and the protection key set in the protection key register 23 is taken into the protection key register 13, respectively. Then, according to the contents of the address register 11, the protection lock is read from the protection lock memory 16, and the contents of the protection key register 13 and the comparison circuit 14 are read.
Compare using. As a result of the comparison, if it is determined that writing is possible, the contents of the data register 12 are written to the address of the memory 15 indicated by the address register 11. If it is determined that writing is not possible, writing will be prohibited.
The comparator circuit 14 sends a signal indicating that writing is not possible to the memory protection detection circuit 24, and the error is reported to the computer 3. Next, a method of comparing the protection lock and the protection key will be explained. Table 1 below shows an example of write protection using 1 bit. Table 1 In Table 1, if the protection key is "0", writing is possible regardless of the contents of the protection lock, and if the protection key is "1", the contents of the protection lock are 0. When it is "1", it is not writable, and when it is "1", it is writable. A protection lock is written in the protection lock memory 16 in advance by one of the computers 3. As described above, the shared storage area is centrally managed by the protection lock memory 16 of one example of the storage device.

[12 Problems to be Solved by the Invention] Since the conventional shared storage device is configured as described above, it is necessary to determine whether the area is a protected area or not only after an access request to the storage device 1 is granted. Therefore, contention on the bus 5 occurs due to meaningless access to the storage device 1.
There were problems such as poor throughput of the shared storage device. This invention was made to solve the above-mentioned problems, and it is possible to simplify the protection management of the shared storage area in a storage device and improve the throughput of access to the shared storage area. The purpose is to obtain a storage device.

[Means to solve the problem]

A shared storage device according to the present invention is provided in either an interface device or a bus control device between a storage device and a plurality of computers, and is provided in either an interface device or a bus control device between a storage device and a plurality of computers, and before any of the computers accesses the bus to the storage device. A determining means is provided for determining the read/write permission state of the storage area to be read/written.

[Operation] Before any computer accesses the bus to the storage device, the determination means determines the read/write permission state of the storage area to be read or written by checking the protection lock of the address to be accessed and the protection key set by the computer. Based on this, it is determined whether or not the area that this computer attempts to access is prohibited.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, the same reference numerals as in FIG. 3 indicate the same or equivalent parts. Reference numeral 26 denotes a protection lock memory similar to the protection lock memory 16 in FIG. 3, and is provided in the interface device 2. Further, 25 is a comparison circuit provided in the interface device 2 to compare the protection key and the protection lock. Protection lock memory 26, comparison circuit 25, and protection key register 23
This constitutes a determining means for determining the read/write permission state of the storage area to be read/written. 6 is an exclusive control device. Note that the storage device J has an address register 11. Data register 12. The protection key register 13 . shown in FIG. Protection lock memory 16 and comparison circuit 14 are omitted. Furthermore, only one interface device 2 is connected between the plurality of computers 3 and the storage device 1 . The other parts of the interface device 2 are the same as in FIG. Next, the operation will be explained. An example of writing data to the memory 15 of the storage device 1 will now be described. A computer 3 attempting to access the storage device 1 notifies the exclusive control device 6 of this fact. The exclusive control device 6 checks an internal flag. This flag is set when there is an access request to the storage device 1 from one of the multiple computers 3, and after the computer 3 that made the access request completes the protection check for the shared storage area to be accessed, which will be described later, the computer 3 returns to the storage device 1. When a release command is issued from 3 onwards, the flag is reset. Therefore, while the flag is set, other computers cannot check the protection of the shared storage area. When the computer 3 is granted permission to check the protection of the shared storage area from the exclusive control device 6, the computer 3 to which the protection check permission has been issued performs a protection check of the shared storage area. That is, the computer 3 writes the write address into the address register 21 of the interface device 2, and writes the write address into the address register 21 of the interface device 2.
The write data is set in 2, and the protection key for data writing is set in the protection key register 23, respectively. Then, according to the contents of the address register 2, the protection lock is read from the protection lock memory 26, and the protection key register 2 is read out.
3 using the comparison circuit 25. As a result of the comparison, if it is determined that writing is possible, access to the storage device 1 is requested. When the use of the memory bag y11 is permitted by the bus control device 4, the address of the address register 21 is taken into the address register 11 of the storage device 1, the data of the data register 22 is taken into the data register 12, and the memory indicated by the address register 11 is stored. The contents of the data register 12 are written to address 15. If the comparison circuit 25 determines that writing is not possible, the access request to the storage device 1 is prohibited, and the comparison circuit 25 sends a signal to the memory protection detection circuit 24 indicating that writing is not possible, and the computer 3 is notified of the error. Reported. In the above embodiment, a judgment means for checking the protection area is provided in the interface device 2, but as shown in FIG. 2, the same protection Well as shown in FIG. By providing a determining means for performing a range check, the exclusive control device 6 shown in FIG. 1 can be omitted, and the same effect as the embodiment shown in FIG. 1 can be achieved. In FIG. 2, the bus control device 4 is configured to check the protected area before granting permission to use the bus 5 to the computer 3, and not grant the right to use the bus to the computer 3 if writing is not possible. , the same symbols as in FIG. 3 indicate the same or corresponding parts. 2, 41 is an address register, 42 is a data register, 43 is a protection key register, 44 is a memory protection detection circuit, 46 is a protection lock memory similar to the protection lock memory 16 in FIG. 3, and 45 is a protection key. This is a comparison circuit that compares the protection lock and the protection lock. Protection key register 43.
Comparison circuit 45. The protection lock memory 46 constitutes a determining means as in the case of FIG. Note that the interface device 2 has the same configuration as in FIG. 3, and the storage device 1 has the same configuration as in FIG. Next, the operation will be explained. In FIG. 2, when the computer 3 writes to the shared storage device 1, the computer 3 uses the address register 21 and data register 22 of the interface device 2.
．． The protection key register 23 contains addresses, data, and
Set a protection key. Each of the set data is simultaneously stored in the address register 41 in the bus control device 4. Data register 42. The data is stored in the protection key register 43, and the comparison circuit 45 determines whether or not it is writable in the same manner as described in the embodiment of FIG.
If it is determined that writing is possible, the bus controller 4 checks the bus usage status, and if the bus is usable, transfers the contents of the address register 41 and data register 42 to the address of the storage device l via the bus 5. Register 11. The data is taken into the data register 12 and written into the memory 15. If it is determined that writing is not possible, writing is prohibited, a signal indicating that writing is not possible is sent to the memory protection detection circuit 44, and an error is reported to the computer 3.

【Effect of the invention】

As described above, according to the present invention, before any computer accesses the storage device, it is configured to centrally manage whether or not the area is protected within the interface device or the bus control device. This simplifies the device, eliminates meaningless storage access requests, and reduces bus contention. This has the effect of improving the throughput of the storage device.

[Brief explanation of the drawing]

FIG. 1 is a system configuration diagram showing a shared storage device according to an embodiment of the invention, FIG. 2 is a system configuration diagram of a shared storage device according to another embodiment of the invention, and FIG. 3 is a system configuration diagram showing a shared storage device according to another embodiment of the invention. 1 is a system configuration diagram shown in FIG. ■ is a storage device, 2 is an interface device, 3 is a computer,
4 is a bus control device, 5 is a bus, 23.43 is a protection key register, 26.46 is a protection lock memory, and 25.45 is a comparison circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. (2 others) - Figure 1, Figure 31

Claims (1)

[Claims] a plurality of computers, a storage device provided in common to the plurality of computers, an interface device connected to the storage device via a bus and connected to the plurality of computers, and a bus control device that determines whether or not use of the bus is permitted when an access request to the storage device is generated from one of the computers; and a bus control device provided in either one of the bus control device and the interface device, and A shared storage device comprising determining means for determining a read/write permission state of a storage area to be read/written before any of the computers accesses the bus to the storage device.