JPH01261846A - Semiconductor element and manufacture thereof - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a wiring element for an LSI, and particularly to a semiconductor element using a wiring material having excellent stress migration resistance characteristics.

[Conventional technology]

In recent years, due to the ultra-integration of integrated circuits, the element dimensions of devices have tended to become smaller year by year. As a result, IMDRAAl
and 256, and 1 to 1.5 μm for Statec RAl, 4
In MDRAl, the wiring width is 1 μm or less.

For this reason, damage caused by stress (stress migration) in addition to electromigration is important. This stress migration improves as the crystal grain size increases, so when attaching a film, sometimes raising the substrate temperature to promote grain growth is recommended, as reported in the 23rd Annual Proceeding Reliability Physics (1985).
Pages 126 to 137) (23rd Annu
al ProceedingsReliability
Physics (1985)).

[Problem to be solved by the invention]

The above-mentioned conventional technology has a problem in that it does not take into account the influence of substrate temperature on crystal orientation.

In other words, when the substrate temperature is room temperature, the crystal orientation is <1
11> will be available. Electromigration resistance, which is another important characteristic of wiring materials, is affected by the discontinuity of the structure, and the more oriented the material is, the better it is. However, when the substrate temperature is increased, this orientation is disrupted.
This tendency becomes more pronounced as other additive elements are included. Therefore, in consideration of electromigration resistance characteristics and in order not to impair the orientation, it is inappropriate to increase the substrate temperature.

An object of the present invention is to provide a manufacturing method that prevents the formation of bread booth structures and forms a film structure with excellent stress migration resistance without impairing the <111> orientation.

[Means to solve the problem]

The above object can be achieved by laminating film structures with orientation.

In the present invention, monolayer films having different crystal grain sizes are laminated by varying the deposition rate to prevent the formation of bread booth structures.

Figure 1 shows a typical example of the membrane structure.

The formation of a thin film is facilitated by the three-dimensional growth of island-like structures in which atoms are aggregated, and the merging of islands.

The number density of islands depends on the deposition rate; the faster the deposition rate, the higher the number density of islands, and the finer the crystal grains.

The formation of bread booth structures can also be prevented by interrupting film formation and stacking single-layer films to make the grain boundaries discontinuous in the film thickness direction. Furthermore, it is effective to form the interlayer film 5 having higher electrical conductivity than the wiring material after the film formation is interrupted. In the figure, 1 is a Si plate, 2
, 3 is a wiring film, 4 is a Si substrate, 5 is an interlayer film, and 6 is a wiring film.

[Effect]

Both the change in the deposition rate and the formation of the glabellar membrane 5 are
This is effective in reducing grain boundaries that penetrate linearly in the film thickness direction. (Preventing the formation of bread booth structures).

That is, the main factor in stress migration is thermal stress caused by the difference in thermal expansion coefficient between the wiring film 6 and the passivation film. Since this thermal stress is mainly created in the longitudinal direction of the wiring, grain boundaries that are perpendicular to the longitudinal direction, that is, penetrating the film thickness direction, are most susceptible to damage. Therefore, in order to improve stress migration characteristics, it is effective to prevent the formation of bumpo suffrages.

〔Example〕

An embodiment of the present invention will be shown below. The composition of each target is Al-1%5i-0,25%Cu. Among these, thin film A was produced by introducing Ar gas and periodically changing the deposition rate in two steps by sputter deposition.

The deposition rate was in the range of 0.1 to 100 people·S″″1. Figure 2 shows the deposition rate during film deposition.

A sputter deposition apparatus biases the surface of a target placed in Ar gas to a negative potential, and injects Ar + ions to generate deposition particles. For this reason, the deposition rate was changed by changing the current value flowing through the cathode with the target attached.

As a result, the crystal grain size of N (crystal grain size 22~3X10-1 μm) is large in the slow part of the evaporation rate, and the small grain size of WJ (crystal grain size 12~3X10-1 μm) in the fast part is determined.
A two-layer end layer consisting of 10-2 .mu.m) was obtained. Since the grain boundaries included in each layer grow independently, a so-called bread booth structure in which the grain boundaries grow linearly in the thickness direction was not generated.

Thereafter, heat treatment was performed at 450°C.

Thin film B was first made in the same direction as A, with a film thickness of approximately 0.3μ.
After forming a thin film of m thickness on the substrate, electricity supply to the target was temporarily stopped, and a film of 0.3 μm thickness was laminated again. The above operation was repeated until the total film thickness was about 1 μm.

FIG. 2 shows the deposition rate of the thin material.

As a result, a subgrain boundary was formed at the interface between the first layer and the second layer. Therefore, the grain boundaries extending from the first layer to the second layer were divided by the sub-grain boundaries, and the grain boundaries could be prevented from penetrating in the thickness direction.

Thereafter, it was heated to 450°C.

For thin film C, an A1 alloy film having a thickness of about 0.3 μm was formed by the same method as for thin film B, and then about 100 to 300 layers of Au thin films were formed by sputter deposition.

Furthermore, a 12 alloy film was formed on this Au film to a thickness of about 0.3 μm by sputter deposition, and the above operations were repeated until the thickness of the entire film consisting of the 12 alloy film and the Au ifi layer film was about 1 μm. . FIG. 2 shows the deposition rate of the thin material. As a result, the first layer and the second layer were completely separated by Auv. For this reason, the first layer, the Au film and the second layer are continuous,
In addition, grain boundaries that penetrate linearly are not formed, thus preventing the formation of bump troughs. Thereafter, heat treatment was performed at 450°C.

The thin film is a comparative material prepared by a conventional method for comparison with the above-mentioned invention method.

The film was formed using a sputter deposition method. Figure 2 shows the deposition rate of the thin material. In this sample, since the supplied current value was kept constant, the formed thin film exhibited a bread booth structure. Thereafter, it was heat-treated at 450''C.

Using this thin film, an experimental sample having a wiring pattern with a line width of approximately 1 μm was prepared by wet etching. Etching solution is Ha P O4 + HN○8 + CHaCOO
H was used. Furthermore, a protective film was formed using Si◯ and used for the experiment.

FIG. 3 shows the (111) diffraction intensity. Both are relative intensities to the diffraction intensity of the thin film. The diffraction intensity of each sample was equivalent to that of a thin film, indicating that the orientation was not impaired by this manufacturing method.

FIG. 4 shows the stress migration intensity ratio. In the test, an experimental sample prepared by the method described above was heated to a temperature of 250'.
It was heated in a constant temperature bath, and its rupture time was measured by measuring electrical resistance. As a result, it was revealed that thin films A-C produced according to the present invention had a lifespan two to two times longer than those of thin films D.

The reason for the improvement in stress migration is thought to be as follows.

FIG. 5 shows a schematic diagram of wire breakage due to stress migration. Thermal stress due to heating occurs in the longitudinal direction of the thin film, so minute defects called vacancies are generated at grain boundaries perpendicular to the stress (
1 occurs first in the thickness direction). These pores grow due to the interaction between increased heating time and stress concentration, and when they reach a certain size, they coalesce into large cracks. For this reason, in an antinode where grain boundaries are linearly distributed in the thickness direction, such as in a bread booth structure, the cracks eventually penetrate the film and break the film. On the other hand, as shown in Figure 4a), although vacancies do grow in a film where grain boundaries do not penetrate in the thickness direction, this growth is suppressed by the intervening grain boundaries (in the longitudinal direction of the film). , less likely to cause coalescence. As a result, it does not lead to disconnection and is effective in improving the stress migration life. 6 On the other hand, FIG. 6 shows electromigration strength, which is one of the important characteristics for wiring materials. In the test, a direct current of 1 x 1015 Aaa was applied to the experimental sample.
2 The temperature was kept constant at 80° C. in a constant temperature bath while electricity was being applied. Thereafter, the disconnection time was measured by electrical resistance.

As shown in the figure, the thin films A-C produced by the method of the present invention have strength equal to or higher than that of the thin film produced by the conventional method. The reason is that the grain boundary distribution in the longitudinal direction of the film through which the current flows is A-D.
This is thought to be because there is not much difference between the two.

From the above results, it has become clear that the present invention can improve stress migration resistance without impairing electromigration characteristics.

FIG. 7 shows a cross-sectional view of a transistor type dRA1 cell which is a MO8LSI using the present invention.

〔Effect of the invention〕

According to the present invention, it is possible to prevent the formation of grain boundaries that penetrate in the direction of the thin film for wiring without impairing the orientation. (Prevention of formation of bread booth structures) As a result, stress migration characteristics can be improved without impairing electromigration resistance.

[Brief explanation of the drawing]

Fig. 1 is a cross-sectional view of a film according to an embodiment of the present invention, Fig. 2 is a vapor deposition pattern diagram for producing each thin film according to the embodiment, and Fig. 3 is a diffraction intensity showing the orientation of the thin film produced according to the present invention. FIG. 4 is a stress migration characteristic diagram of the present invention, FIG. 5 is an explanatory diagram showing the damage process of stress migration, FIG. 6 is an electromigration characteristic diagram of the present invention, and FIG. 7 is a stress migration characteristic diagram of the present invention. FIG. 2 is a cross-sectional view of a transistor-type dRA1 cell. 1.4...Si substrate, 2,3...wiring film, 5...
interlayer membrane. 6...Wiring film. Fig. 1 (d) Fig. 2 Shear Strag 9--2 Fig. 3 Fig. 4 Af3Cρ

Claims (1)

[Claims] 1. A wiring material whose basic composition is Al or Cu is formed on a substrate, characterized in that crystal grains of the wiring material are formed in multiple layers in the direction of deposition. semiconductor elements. 2. A semiconductor device in which a wiring material whose basic composition is Al or Cu is formed on a substrate, wherein crystal grain boundaries of the wiring material are distributed non-linearly. 3. A semiconductor device in which a wiring material whose basic composition is Al or Cu is formed on a substrate, wherein a second layer made of a different material is deposited within the wiring. 4. A wiring material whose basic composition is Al or Cu is formed on a substrate, characterized in that a second phase with a grain size of 0.1 μm or less is distributed in the crystal grain boundaries of the wiring material. semiconductor element. 5. A semiconductor device according to claim 3, characterized in that a second layer containing Ag as a main component is deposited. 6. For wiring materials whose basic composition is Al or Cu,
A method for manufacturing a semiconductor device, comprising periodically or intermittently changing a deposition rate for deposition. 7. A semiconductor device in which a wiring material whose basic composition is Al or Cu is formed on a substrate, characterized in that the crystal grain boundaries of the wiring material are not parallel to the thickness direction. 8. A MOSLSI made of a wiring material manufactured according to any one of claims 1 to 7. 9. A thin film production apparatus characterized in that the sputter deposition apparatus is equipped with a device capable of arbitrarily controlling the DC power supply value or the frequency of the AC power supply to the target, or a shielding device for adjusting the passage of deposition particles.