JPH01241138A - Wire bonding of semiconductor device - Google Patents

Abstract

PURPOSE:To conduct uniform wire bonding of each inner lead row, at all times and to remove defective partial wire bonding by applying the temporary lowering of inertia force with the falling of a bonder to dummy wire bonding and previously avoiding its application to wire bonding required. CONSTITUTION:In wire bonding regarding a semiconductor device 1 in which inner lead rows 2, 3 are formed to two opposed sides, the wire bonding of one inner lead row 2 is completed, and dummy wire bonding 3a, 3a0 shaped near the other inner lead row 3 are conducted first. The wire bonding of both inner lead rows 2, 3 is performed under fixed conditions as a whole-that is, under the state in which conditions such as pattern recognition stand-by are kept constant-in order to successively execute the wire bonding of the other inner lead row 3. Accordingly, wire bonding required is attained uniformly at all times regarding each inner lead row 2, 3.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a wire bonding method for a semiconductor device, and in particular, a method for wire bonding a semiconductor device having inner lead rows on two opposing sides by pattern recognition. The present invention relates to an improvement in a method of wire bonding while positioning on a wiring board.

(Prior art) For the purpose of downsizing electronic devices, semiconductor devices such as flat package elements (hereinafter referred to as FP elements) are arranged or mounted at predetermined positions on, for example, ceramic wiring boards to create high-density packaging circuits. There are known means for configuring.

That is, the FP element is sucked and held, for example, at the tip of a pickup, and the pickup is transported onto a wiring board while being driven in the xSy, z-axis directions, etc., and the element is positioned at a predetermined position on the board using, for example, a television camera. Positioning is first performed, and then necessary wire bonding is performed while sequentially determining or confirming the positions of the inner leads and lead patterns to be wire-bonded to each other.

(Problems to be Solved by the Invention) Although the above-mentioned wire bonding while positioning is an effective means for mass production, the following inconveniences are often recognized. In other words, when wire bonding is performed for each inner lead row on a wiring board of a semiconductor device having inner lead rows only on two opposing sides, there is no particular disadvantage for the first inner lead row, but for the later Regarding inner lead rows, bonding failures often occur during initial wire bonding of inner leads.

As a result of investigating this point, the inventors of the present invention confirmed that the waiting time of the bonder is affected when moving to wire bonding of the next inner lead row after completing wire bonding of the negative inner lead row. In other words, the movement of the bonder tip during the series of operations of pattern recognition and wire bonding described above is as shown in Figure 2.The bonder descends from the standby position (level), the lead position is confirmed at the search level, and the ball at the wire tip moves. Get hit. That is, normally, the bonder descends the distance Y1 between the standby level and the search level, and between the search level and the substrate level, and deformation energy is applied to the ball of the wire by the combined inertial force between the two.

In bonding the terminal lead row on the first side, the waiting time for pattern recognition is almost uniform, the effective bonding force by the bonding tool is also constant, and the required wire bonding is performed. However, when the bonder moves from one inner lead row to the other inner lead row on the opposite side, it moves from the search position to the position of the terminal lead row on the opposite side (A), so during this time the bonder is at the search level. It will be stopped for a while.

Therefore, during the first bonding on the terminal lead row on the later side (opposite side), the bonder will only descend by a distance of Y2, and the inertial force will also be relatively reduced.
It can be said that defects are likely to occur in wire bonding for the first inner lead of the transferred inner lead row.

Therefore, the present invention provides a method for reliably wire-bonding a semiconductor device having inner lead rows only on two opposing sides to corresponding lead patterns on a wiring board while recognizing the pattern of the inner lead rows.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides a semiconductor device having inner lead rows only on two opposing sides, and a wiring line provided with lead patterns corresponding to the inner lead rows of the semiconductor device. When wire bonding is performed sequentially for each inner lead row on the two sides while positioning on the substrate by pattern recognition, a dummy wire bonding means is provided near the inner lead row to be wire-bonded first among the inner lead rows to be wire-bonded later. The main point is to perform wire bonding of the later inner lead rows subsequent to the dummy wire bonding.

(Function) According to the present invention, in wire bonding of a semiconductor device having inner lead rows on two opposing sides, after wire bonding of one inner lead row is completed, a dummy wire provided near the other inner lead row is attached. Wire bonding is performed first. However, since wire bonding is subsequently performed on the other inner lead row,
Wire bonding of both inner lead rows is performed under generally constant conditions, that is, under conditions such as waiting for pattern recognition to be constant. Therefore, the required wire bonding is always uniformly achieved for each inner lead row.

(Example) The present invention will be described in detail below with reference to FIG.

First, a semiconductor device to be subjected to the required wire bonding, that is, a semiconductor chip or FP element having inner lead rows only on two opposing sides is prepared. For these semiconductor chips 1, dummy inner leads 3o are provided in the vicinity of the inner leads 31 to which wire bonding will be performed first in the inner lead row 3 on the side to which wire bonding will be performed later. Next, this semiconductor chip 1 is placed on a wiring board or lead frame 4 having corresponding lead rows 2a, s, and 3a.

In this case, lead portions 3ao corresponding to the dummy inner leads 3o are also provided on the wiring board or lead frame 4. In this state, wire bonding is performed using a required wire bonding device. First, regarding the inner lead row 2 formed on one side of the semiconductor chip 1, the lead row 2a corresponding to the inner lead is sequentially formed.
Wire bond the leads. When the wire bonding for the inner lead row 2 is completed, the wire bonding operation shifts to the wire bonding for the inner lead row 3 on the other opposing side of the semiconductor chip 1. Here, when the bonder moves to the inner lead row 3 side, first wire bonding is performed between the dummy inner lead row 3o and the dummy lead 3ao opposite to this dummy inner lead 3o, and then wire bonding is performed between the inner lead 31 and the lead 3a1. Starting with wire bonding, wire bonding is performed for the inner lead row 3 in sequence. That is, prior to wire bonding for the inner lead row 3 on the opposite side, the wire bonding of the inner lead 31 that is wire bonded first in the inner lead row 3 is performed following the dummy wire bonding in the vicinity thereof, and the necessary wire bonding is performed. is achieved.

[Effects of the Invention] As explained above, in the wire bonding of a semiconductor device (element) having inner lead rows only on two opposing sides, the method of the present invention makes it possible to perform wire bonding on one inner lead row. When the wire bonding is completed and the wire bonding is transferred to the other inner lead row, dummy wire bonding is especially interposed. However, in wire bonding, the transient condition change that occurs when the bonder moves from one inner lead row side to the other inner lead row side, that is, the temporary decrease in inertia force that occurs when the bonder descends, can be avoided. Used for dummy wire bonding to avoid application to required (regular) wire bonding. Therefore, wire bonding for each inner lead row is always uniformly performed under preset conditions, eliminating the problem of partial wire bonding failures and improving product reliability.

[Brief explanation of the drawing]

FIG. 1 is a plan view for explaining an embodiment of the method of the present invention, and FIG. 2 is a curve diagram showing the positional relationship of bonders in a wire bonding operation. 1...Semiconductor device 2.3...Inner lead row as3a...Lead pattern row 3os3a. ...Dummy wire bonding part 4...
・Wiring board a Figure 1 Time □ Figure 2

Claims (1)

[Claims] While positioning a semiconductor device having inner lead rows only on two opposing sides on a wiring board provided with a lead pattern corresponding to the inner lead rows of the semiconductor device by pattern recognition, sequentially for each lead row on the two sides. When performing wire bonding, a dummy wire bonding section is provided in advance near the inner lead row to be wire-bonded first among the inner lead rows to be wire-bonded later, and after the wire bonding of the first inner lead row is completed, the A wire bonding method for a semiconductor device, characterized in that wire bonding is performed on a dummy wire bonding section, and then wire bonding is performed on a subsequent inner lead row.