JPH01219923A - Sector buffer control system - Google Patents

Abstract

PURPOSE:To improve the reliability by dividing a sector buffer where one-sector components of data can be stored into two systems and providing each system with a data error detecting circuit and an additional sector buffer. CONSTITUTION:A disk controller to which the sector buffer control system is applied consists of two sector buffers 1 and 2 where one-sector components of data as the disk read/write unit are stored, additional sector buffers 3 and 4 for buffers 1 and 2, counters 7 and 8 incorporating flags 5 and 6, a sector buffer switching circuit 9, parity generators 10 and 11, checkers 12-15, selectors 16 and 17, and a controller 18. The data transfer processing between a first sector buffer 1 and the disk device and that between a second sector buffer 2 and a system bus are performed in the same time zone, and the output of the sector buffer switching circuit 9 is inverted by the end of transfer. Thus, buffers 1 and 2 are alternately switched, and they are switched to additional buffers 3 and 4 by selectors 16 and 17 to transfer data at the time of detecting error.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a sector buffer control method for a disk control device, and particularly to a data transfer processing method between a system bus and a disk device.

[Conventional technology]

Conventionally, this type of disk control device has been used in data transfer processing between a system bus and a disk device.

In order to compensate for the difference in transfer speed and asynchronous operation.

Generally, the data buffer was composed of an all-sector buffer that stored the maximum amount of data that could be handled by one instruction.

[Problem to be solved by the invention]

If the disk control device is configured with all sector buffers, data transfer with the disk device is started after all data transfer with the system bus has been completed, or data transfer with the system bus has been completed after data transfer with the disk device has been completed. Transfer must be initiated. Therefore, the time required for one command is

The sum of each data transfer time is
Not stupid, which requires a lot of processing time.

Due to the large capacity of the sector buffer, the capacity of the disk control device is limited and the amount of circuitry is increased. In addition to the above-mentioned drawbacks, if all sector buffers fail, it is not only impossible to perform data transfer normally thereafter, but also the number of two circuits is large, making it difficult to determine the location of the failure.

[Means to solve the problem]

According to the present invention, in a disk control device that is connected to a system bus and controls a disk device, first and second sectors each capable of storing l sector worth of data, which is a read/write unit of the disk device, are provided. a first additional sector buffer sharing an address bus and an input data bus with the first sector buffer;
a second additional sector buffer that shares an address bus and an input data bus with the sector buffer; a first address counter that counts addresses of the first sector buffer and the first additional sector buffer;
a second address counter that counts the addresses of the sector buffer and the second additional sector buffer; and a sector buffer switching circuit that specifies read/write states with the second additional sector buffer and switches whether it is used for data transfer with the disk device or data transfer with the system bus. , said first
The first step is to detect errors in the read data of the sector buffer.
error detection circuit.

a second error detection circuit that detects an error in the read data of the second sector buffer; and a second error detection circuit that detects an error in the read data of the first sector buffer and the first additional sector buffer based on the output signal of the first error detection circuit. A first selector selects one of the read data of the second sector buffer and the second additional sector buffer according to the output signal of the second error detection circuit. A second selector for selecting a sector buffer control method is obtained.

[Operation] The data transfer process between the first sector buffer and the disk device and the data transfer process between the second sector buffer and the system bus are performed in the same time period, and each one sector worth of data is transferred. When finished, switch by inverting the output of the sector buffer switching circuit.

This time, data transfer processing between the first sector buffer and the system bus and data transfer processing between the second sector buffer and the disk device are performed in the same time period, so that the first and second sector buffers are transferred alternately. Data transfer is performed by switching buffers, and the first sector buffer of the first and second sector buffers is
And if an error is detected in the read data of the first sector buffer or the read data of the second sector buffer by the second error detection circuit, the first and second error detection circuits
Data transfer is performed using the additional sector buffer by switching to the first additional sector buffer or the second additional sector buffer using the selector.

EMBODIMENTS Next, two embodiments of the present invention will be described with reference to two drawings.

FIG. 1 is a block diagram showing the configuration of a disk control device to which a sector packer control method according to an embodiment of the present invention is applied. In FIG. 1, an embodiment of the present invention has two sector buffers 1.2 (!:, a sector buffer l, an address bus, and an input Data is stored in additional sector buffer 3 that shares the data bus, additional sector buffer 4 that shares address bus and input data bus with sector buffer 2, sector buffer 1 and additional sector buffer 3, and sector buffer 2 and additional sector buffer 4. It has built-in 7 lags 5 and 6 that indicate that a specified amount has been stored, and indicates read and write addresses for sector buffer 1, additional sector buffer 3, sector buffer 2, and additional sector buffer 4, and counts the amount of transferred data. Specifies the reading and writing status of sector buffer l, additional sector buffer 3, sector buffer 2 and additional sector buffer 4, and whether it is used for data transfer with the system bus or not, and whether it is used for data transfer with the system bus. sector buffer switching circuit 9, which distinguishes whether the sector buffer 1 is being used for data transfer between the sector buffer 1, the additional sector buffer 3, and the sector buffer 2, and controls the data transfer state;
,! : Z?ity generator 10 that generates additional sector information (when writing data to Nofa 4).
．． 11, sector buffer l and additional sector buffer 3
and checker 1 which checks the read data of sector buffer 2 and additional sector buffer 4.
2゜14.13, 15 and the output of the parity checker 12 to select the sector buffer 1 and the additional sector number (with the selector 16 which selects one of the outputs of the parity checker 13) and the output of the parity checker 13. and a selector 17 that selects one of the outputs of the additional sector buffer 4 and the output of the additional sector buffer 4, and a controller 18 that controls data transfer with the disk device.

Taking the case of reading data from a disk device as an example, when a read command is given to the disk control device, flags 5, 6, . While initializing the counter 7.8° sector buffer switching circuit 9 and sequentially storing the data read from the disk device into the sector buffer l and additional sector buffer 3 designated by the sector buffer switching circuit 9 via the internal bus, Counter 7 counts. At this time.

A parity generator 10 generates parity bits for data to be stored, and stores them in the sector buffer 1 and additional sector buffer 3 together with the data.

When the data transfer for one sector is completed, 72g5 is set to logic @1# level, the data transfer process is stopped, the output of the sector buffer switching circuit 9 is inverted, and the sector buffer to be stored is switched. , resumes receiving data from the disk device, and counts the counter 8 while storing the data and the parity bits generated by the parity generator 11 in the sector buffer 2 and additional sector buffer 4 in the same manner as above. go.

At this time, flag 5 indicating the amount of data in sector buffer 1 or additional sector buffer 3 used for data transfer with the system bus is at the logic "Il# level," so data transfer with the system bus is possible and the , data transfer from sector buffer l or additional sector buffer 3 to the system bus is started, and counter 7 is counted.

At this point, processing for storing data from the disk device into sector buffer 2 and additional sector buffer 4 and processing for transferring data from sector buffer 1 or additional sector buffer 3 to the system bus are being performed simultaneously. Moreover, the data transfer speed with the system bus is determined only by the usage status of the system bus, without depending on the transfer speed of the disk device and the sector buffer, as long as it is within the one sector processing time of the disk device.

Data is transferred to the system bus sequentially, and when the 7lag 5 of the counter 7 reaches the logic 10'' level, it means that the transfer of one sector has been completed.

By interrupting the transfer with the system bus and completing the data transfer process from the disk device to the sector buffer 2 and additional sector buffer 4, the flag 6 becomes a logic "'1".
level, and wait for the output of the sector buffer switching circuit 9 to be inverted.

By repeating the above operation for the number of sectors given by the command, data transfer with the disk device and data transfer with the system bus can be performed simultaneously.

Next, the operations of the parity checker 12, 14 and selector 16 when transferring data from the sector buffer 1 or additional sector buffer 3 to the system bus will be described.

When transferring data from sector buffer l or additional sector buffer 3 to the system bus, the data read operation from the sector buffer is performed from both sector buffer 1 and additional sector buffer 3; The selector 16 selects read data from either the sector buffer 1 or the additional sector buffer 3 and transfers the data. In other words, 2 Normally, if there is no error in the read data number of sector buffer 1, the read data of sector buffer 1 is selected. 1 is judged to be faulty, and henceforth ignores the read data of the sector buffer 1 and transfers the read data of the additional sector buffer 3 to the system bus.

If an error is detected in the read data of sector buffer 1, the transfer time can be controlled to be enough to switch to the read data of additional sector buffer 3, or if switching occurs, the transfer time can be extended. Data transfer can be performed without stopping.

However, after switching to the additional sector buffer 3, if the criterion checker 14 also detects an error in the read data of the additional sector buffer 3.

Although it can be determined that both sector buffer 1 and additional sector buffer 3 have failed, the probability of such failure is considered to be extremely low.

The operations of the security checker 13.15 and the selector 17), the security checker 12.14 and the selector 16 are the same when data is transferred from the sector buffer 2 or the additional sector buffer 4 to the system bus.

With the above control, even if an error is detected in the sector buffer data, the additional sector buffer will operate.
Not only does it not need to stop the device, the reliability of the hardware is improved because it is equipped with an error detection circuit, and even if an error is detected by the parity checkers 12.13 and 14.15. can easily determine the failure location of the nine circuits by reporting the detected error to the system.

When writing data to a disk device, the basic operation is the same as when reading, except that the direction of data transfer is different from when reading. is omitted.

〔Effect of the invention〕

As explained above, the present invention divides the sector buffer into two systems each capable of storing data for one sector, and each system is provided with a data error detection circuit and an additional sector buffer. Data transfer processing with the device can be performed at the same time as data transfer processing with the system. -Compared to all-sector buffers, processing time can be shortened with a small amount of circuitry, and since it is equipped with an error detection circuit, The reliability of the hardware is improved, and even if an error is detected in the data in the sector buffer, the additional sector buffer continues to operate, making it possible to transfer data without stopping the device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. 1... First sector buffer, 2... Second sector buffer, 3... First additional sector buffer, 4...
・Second additional sector buffer, 5, 6...flag, 7
゜8...Counter, 9...Sector buffer switching circuit. 10.11...Parity generator, 12,13,14°15...Parity checker, 16.17...Selector. 18... Controller for disk control.

Claims (1)

[Claims] 1. In a disk control device connected to a system bus and controlling a disk device, first and second sector buffers each capable of storing one sector worth of data, which is a read/write unit of the disk device; a first additional sector buffer that shares an address bus and an input data bus with the first sector buffer; a second additional sector buffer that shares an address bus and an input data bus with the second sector buffer; a first address counter that counts addresses of the sector buffer and the first additional sector buffer; a second address counter that counts addresses of the second sector buffer and the second additional sector buffer; At a processing time interval, the first sector buffer, the first additional sector buffer, the second sector buffer, and the second
a sector buffer switching circuit that specifies read/write states with the additional sector buffer of the first sector buffer and switches whether the sector buffer is used for data transfer with the disk device or the system bus; a first error detection circuit that detects an error in the read data of the sector buffer; a second error detection circuit that detects an error in the read data of the second sector buffer; and an output of the first error detection circuit. a first selector that selects one of the read data of the first sector buffer and the first additional sector buffer according to a signal; Among the read data of the sector buffer and the second additional sector buffer,
A sector buffer control method comprising: a second selector that selects either one.