JPH01207961A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01207961A JPH01207961A JP3333388A JP3333388A JPH01207961A JP H01207961 A JPH01207961 A JP H01207961A JP 3333388 A JP3333388 A JP 3333388A JP 3333388 A JP3333388 A JP 3333388A JP H01207961 A JPH01207961 A JP H01207961A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- printed board
- lead frame
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 238000007747 plating Methods 0.000 abstract description 11
- 238000000034 method Methods 0.000 abstract description 5
- 229910000679 solder Inorganic materials 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 238000003780 insertion Methods 0.000 description 3
- 230000037431 insertion Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
- H05K3/308—Adaptations of leads
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に半導体装置の外部端子
に固定用の突起部を設けた半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which external terminals of the semiconductor device are provided with protrusions for fixing.
従来、この種の半導体装置は第2図に示す様に太さが一
定のリードフレームを有していた。この為半導体装置の
プリント基板への固定及びプリント基板上の回路への電
気的接続は、以下の方法で行われていた。まず、プリン
ト基板にリードフレームを通す為の挿入口を開け、挿入
口内部及び周囲にCuメツキを行う。その後、半導体装
置を所定個所に挿入する。次に挿入された半導体装置の
プリント基板への固定及びプリント基板上の回路との電
気的接続を行う為、高温にして溶解させた半田をCuメ
ツキ部とリードフレームに付着させ冷却してCuメツキ
部、リードフレーム、半田を合金化する。Conventionally, this type of semiconductor device has had a lead frame with a constant thickness as shown in FIG. For this reason, the fixing of the semiconductor device to the printed circuit board and the electrical connection to the circuit on the printed circuit board have been performed by the following method. First, an insertion hole for passing the lead frame through the printed circuit board is opened, and Cu plating is applied inside and around the insertion hole. After that, the semiconductor device is inserted into a predetermined location. Next, in order to fix the inserted semiconductor device to the printed circuit board and electrically connect it to the circuit on the printed circuit board, melted solder at high temperature is applied to the Cu plating part and the lead frame, and then cooled and Cu plating is performed. Alloy the parts, lead frame, and solder.
上述した従来の太さが一定のリードフレームは、半導体
装置をプリント基板へ挿入しただけではプリント基板よ
り抜は落ちるという危険がある為、リードフレームとプ
リント基板上の回路とを半田付けする工程が不可欠であ
る。しかし、半田付けという工程は半田を高温で溶解さ
せ、溶解した半田をCuメツキ部、リードフレームに付
着させる為、長時間高温にさらされたり高温過ぎたりし
た場合、Cuメツキが剥れたりプリント基板の一部
。With the conventional lead frame that has a constant thickness as described above, there is a risk that the semiconductor device will fall out of the printed circuit board just by inserting it into the printed circuit board, so the process of soldering the lead frame and the circuit on the printed circuit board is necessary. It is essential. However, in the soldering process, solder is melted at high temperatures and the melted solder is attached to the Cu plating and lead frame, so if it is exposed to high temperatures for a long time or is too high, the Cu plating may peel off or the printed circuit board may peel off. part of
.
が焦げついたりリードフレームからの熱伝導により半導
体素子のアルミ電極が溶解する等の問題が生じる。Problems arise such as burning of the aluminum electrodes of the semiconductor elements and melting of the aluminum electrodes of the semiconductor elements due to heat conduction from the lead frame.
本発明の半導体装置は、半導体装置の外部端子に該外部
端子と一体的に形成された突起部を有することを特徴と
する。The semiconductor device of the present invention is characterized in that an external terminal of the semiconductor device has a protrusion formed integrally with the external terminal.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の第1の実施例の縦断面図である。モー
ルド樹脂1は半導体のチップを外部から保護する為のも
の、リードフレーム2は半導体のチップの信号を外部へ
伝える為のもの、Cuメツキ3はリードフレーム2と外
部回路との電気的接続を行う為のもの、プリント基板4
は半導体装置を固定する為又は外部回路を配線する為の
基板、突起部6は半導体装置とプリント基板4との固定
を行う為のものである。第1図の様に太さ0.25mm
のリードフレーム2の両側面に最大高125μmのクサ
ビ形の突起部6を設け、直径0.5嗣のプリント基板4
上の穴に挿入する。半導体装置は突起部6の為にプリン
ト基板4への挿入は可能であるが、引き抜くことは不可
能となり、半田付は工程を行うことなく半導体装置のプ
リント基板4上への固定が可能となる。リードフレーム
20口径とプリント基板4のCuメツキ3が付着した開
孔部の口径は、リードフレーム2とCuメツキ4部のコ
ンタクト抵抗を下げる為にCuメツキ4の厚さを十分厚
くし、リードフレーム4の口径より小さくすることが望
ましい。FIG. 1 is a longitudinal sectional view of a first embodiment of the invention. The mold resin 1 is used to protect the semiconductor chip from the outside, the lead frame 2 is used to transmit signals from the semiconductor chip to the outside, and the Cu plating 3 is used to electrically connect the lead frame 2 and an external circuit. for printed circuit board 4
1 is a substrate for fixing a semiconductor device or for wiring an external circuit, and a protrusion 6 is for fixing the semiconductor device and the printed circuit board 4. Thickness 0.25mm as shown in Figure 1
A wedge-shaped protrusion 6 with a maximum height of 125 μm is provided on both sides of the lead frame 2, and a printed circuit board 4 with a diameter of 0.5 mm is provided.
Insert into the upper hole. Although the semiconductor device can be inserted into the printed circuit board 4 due to the protrusion 6, it is impossible to pull it out, and the semiconductor device can be fixed onto the printed circuit board 4 without any soldering process. . The diameter of the lead frame 20 and the diameter of the opening to which the Cu plating 3 of the printed circuit board 4 is attached are such that the thickness of the Cu plating 4 is sufficiently thick in order to reduce the contact resistance between the lead frame 2 and the Cu plating 4. It is desirable to make the diameter smaller than 4.
第2図は本発明の第2実施例の縦断面図である。FIG. 2 is a longitudinal sectional view of a second embodiment of the invention.
第1の実施例との違いは、第1の実施例の突起部6の上
部2〜3mmの部分に逆向きにクサビ形の突起部6を設
けたことである。すなわち、プリント基板4の両側から
プリント基板4を挟む様になっている。これにより第1
の実施例では半導体を挿入されたプリント基板4に振動
を与えた時に懸念される半導体の振動による故障を最小
限にすることができる。尚、突起部6の距離はプリント
基板4との厚さによって変るもので、上記の2〜3mm
と限るものではないことは言うもでもない。The difference from the first embodiment is that a wedge-shaped protrusion 6 is provided in the opposite direction at a portion 2 to 3 mm above the protrusion 6 of the first embodiment. That is, the printed circuit board 4 is sandwiched from both sides of the printed circuit board 4. This allows the first
In this embodiment, it is possible to minimize failures caused by the vibration of the semiconductor when vibration is applied to the printed circuit board 4 into which the semiconductor is inserted. Note that the distance between the protrusion 6 and the printed circuit board 4 varies depending on the thickness of the protrusion 6, and the distance between the protrusion 6 and the printed circuit board 4 is 2 to 3 mm.
Needless to say, it is not limited to this.
第3図は本発明の第3の実施例の縦断面図である。第3
の実施例はセラミックのピン・グリッド・アレイパッケ
ージ(以下単にPGAと言う)に突起部6を設けた場合
の実施例である。PGAのリードピンは断面形状が一般
に円形である為、突起部6は円錐にする必要がある。FIG. 3 is a longitudinal sectional view of a third embodiment of the invention. Third
This embodiment is an embodiment in which a protrusion 6 is provided on a ceramic pin grid array package (hereinafter simply referred to as PGA). Since a PGA lead pin generally has a circular cross-sectional shape, the protrusion 6 needs to be conical.
本発明の半導体装置は、モールド樹脂と、リードフレー
ムと、リードフレームの一部にクサビ形の突起部を有し
ている。この形状のリードフレームを使用した半導体装
置をプリント基板へ挿入する。リードフレームの側面が
クサビ形の為、挿入する際には比較的簡単に挿入できる
が、−度挿入された半導体装置をプリント基板より引き
抜く際には挿入口を大きくする等を行わない限り簡単に
は引き抜くことができない。従ってプリント基板上の回
路が動作中の場合でも半導体装置が抜は落ちる必要がな
い。A semiconductor device of the present invention includes a mold resin, a lead frame, and a wedge-shaped protrusion on a portion of the lead frame. A semiconductor device using a lead frame having this shape is inserted into a printed circuit board. Since the side of the lead frame is wedge-shaped, it can be inserted relatively easily, but it is not easy to pull out a semiconductor device that has been inserted from the printed circuit board unless the insertion opening is made larger. cannot be pulled out. Therefore, even if the circuit on the printed circuit board is in operation, there is no need to remove or drop the semiconductor device.
以上説明したように本発明は、半導体装置のパッケージ
の外部リードに突起部を設けることにより、半導体装置
を挿入するだけで固定も同時に行うことができるという
効果がある。尚、本発明はプリント基板に実装してから
半田付けを行う場合でもプリント基板と半導体装置を半
田付けするまでの間、固定性を良くする為に用いても非
常に有効であることは言うまでもない。As described above, the present invention has the advantage that by providing a protrusion on the external lead of a semiconductor device package, the semiconductor device can be fixed at the same time by simply inserting it. It goes without saying that the present invention is very effective when used to improve fixation even when soldering is performed after mounting on a printed circuit board and before soldering the printed circuit board and semiconductor device. .
第1図は本発明の第1の実施例の縦断面図、第2図は本
発明の第2の実施例の縦断面図、第3図は本発明の第3
の実施例の縦断面図、第4図は従来の半導体装置の縦断
面図である。
1・・・・・・モールド樹脂、2・・・・・・リードフ
レーム、3・・・・・・Cuメツキ、4・・・・・・プ
リント基板、訃・・・・・半田、6・・・・・突起部、
7・・・・・・セラミックパッケージ、8・・・・・・
リードピン。
代理人 弁理士 内 原 晋
/七−ルY桝斯
乙¥詑部
垢1図
/ モーフしト′石は■旨
3乙μメツX
第Z閲
7でラミッフパグーシ゛
ン
猶3冊
/モηし)゛州η盲
消41FIG. 1 is a longitudinal sectional view of a first embodiment of the present invention, FIG. 2 is a longitudinal sectional view of a second embodiment of the invention, and FIG. 3 is a longitudinal sectional view of a third embodiment of the invention.
FIG. 4 is a vertical cross-sectional view of a conventional semiconductor device. 1...Mold resin, 2...Lead frame, 3...Cu plating, 4...Printed circuit board, End...Solder, 6... ····protrusion,
7...Ceramic package, 8...
lead pin. Agent: Susumu Uchihara, Patent Attorney / 7-rule Y massi otsu 1 illustration / Morph stone is ■ 3 otsumutsu ηshi) ゛state η blind erasure 41
Claims (1)
た突起部を有することを特徴とする半導体装置。A semiconductor device characterized in that an external terminal of the semiconductor device has a protrusion formed integrally with the external terminal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3333388A JPH01207961A (en) | 1988-02-15 | 1988-02-15 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3333388A JPH01207961A (en) | 1988-02-15 | 1988-02-15 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01207961A true JPH01207961A (en) | 1989-08-21 |
Family
ID=12383628
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3333388A Pending JPH01207961A (en) | 1988-02-15 | 1988-02-15 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01207961A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7361983B2 (en) * | 2002-07-26 | 2008-04-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and semiconductor assembly module with a gap-controlling lead structure |
JP2011187915A (en) * | 2009-09-28 | 2011-09-22 | Kyocera Corp | Connection structure of flexible wiring board and electronic part with lead terminal |
WO2021106565A1 (en) * | 2019-11-27 | 2021-06-03 | 株式会社オートネットワーク技術研究所 | Flexible printed circuit board connection structure |
-
1988
- 1988-02-15 JP JP3333388A patent/JPH01207961A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7361983B2 (en) * | 2002-07-26 | 2008-04-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and semiconductor assembly module with a gap-controlling lead structure |
JP2011187915A (en) * | 2009-09-28 | 2011-09-22 | Kyocera Corp | Connection structure of flexible wiring board and electronic part with lead terminal |
WO2021106565A1 (en) * | 2019-11-27 | 2021-06-03 | 株式会社オートネットワーク技術研究所 | Flexible printed circuit board connection structure |
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