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JPH01202072A - Noise reducer circuit - Google Patents

Noise reducer circuit

Info

Publication number
JPH01202072A
JPH01202072A JP63025632A JP2563288A JPH01202072A JP H01202072 A JPH01202072 A JP H01202072A JP 63025632 A JP63025632 A JP 63025632A JP 2563288 A JP2563288 A JP 2563288A JP H01202072 A JPH01202072 A JP H01202072A
Authority
JP
Japan
Prior art keywords
signal
output
epsilon
subtractor
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63025632A
Other languages
Japanese (ja)
Inventor
Tadahiro Oku
奥 忠宏
Hiroshi Kasa
比呂志 嵩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP63025632A priority Critical patent/JPH01202072A/en
Publication of JPH01202072A publication Critical patent/JPH01202072A/en
Pending legal-status Critical Current

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  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To reduce the fog of a picture by finding out a moving part detecting signal based on a difference between an input video signal and an output of an input video signal unit delay element and controlling the factor of transmission characteristics based on the moving part signal. CONSTITUTION:An output from a frame memory 2 is inputted to a subtractor 3 and a difference value between the input and a current frame signal is calculated. The output of the subtractor 3 is outputted to an adder 4 and also outputted to a non-linear processing circuit 5 as a moving part detecting signal epsilon. The signal epsilon inputted to an adder 4 is added to an output of a frame memory 6 in circulating loop and the added sum epsilon' is outputted to the circuit 5. The circuit 5 multiplies the inputted epsilon' by a factor K (epsilon, epsilon') and outputs the multiplied result Kepsilon' to a subtractor 7 and the frame memory 6 in the circulating loop. The signal Kepsilon' inputted to the subtractor 7 is subtracted from an input video signal and the subtracted signal is outputted to an output terminal 8. Consequently, a noise reducer circuit removing a moving part detecting error and the fog can be obtained.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) この発明は映像信号のノイズを抑制するノイズリゾ1−
サ回路に関する。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) This invention provides noise resolution 1-1 for suppressing noise in video signals.
Regarding the circuit.

(従来の技術) ノイズリデューサの原理を第5図を使って説明する。映
像信号をNヶのフレームメモリーに記憶し%N枚のフV
−ムの平均を求めると信号成分は、フレーム間に変化が
なければ、そのままの直となるのに対して、ノイズは、
フレーム間に相関がないので電力で’/N lこ減衰す
る。しかし、現実の映は信号には動きがあり、Cのまま
加算したのでは、動画部は、時間的にぼけてしまう、又
フレームメモリーは高師であるから%N枚のフレームメ
モリーを用いた巡回型のフィルタに代って、1枚のフレ
ームメモリーによる巡回型溝によることが考えられ、そ
の代表的な構成は第6図グ)様になる。
(Prior Art) The principle of a noise reducer will be explained using FIG. The video signal is stored in N frame memories and %N frame memories are stored.
- If we calculate the average of the frames, the signal component will remain as it is if there is no change between frames, but the noise will be
Since there is no correlation between frames, the power is attenuated by '/Nl. However, in real video, there is movement in the signal, so if we add C as it is, the video part will be blurred in time.Furthermore, frame memory is expensive, so we have to use %N frame memories to cycle through. Instead of a type filter, it is possible to use a recursive groove formed by a single frame memory, and a typical configuration thereof is as shown in Fig. 6 (g).

この回路の伝達特性は ゛となる。ココで係数K O<K<1はg=XIZ)−
X lz) = X (z) −Y Iz) @Z−’
のI!!数であり、第7図の様な%注を持、つ、eは、
@7き部分【出信景である。
The transfer characteristic of this circuit is as follows. Here, the coefficient K O<K<1 is g=XIZ)-
X lz) = X (z) -Y Iz) @Z-'
I! ! It is a number and has a % note as shown in Figure 7, and e is
@7 part [This is Kei Izunoshi.

動きが大きい所では、K=0となり、(1)式はY (
z)= X (Z)となるので、動画部は、ぼけないl
1j71象となる。動きが小さい所では、に−’yOと
なりノイズは、電力相で(1−に’/(1+K)倍に抑
制することができる。しかし、ここで問題となるのは、
勧き部分検出信号とが、現フレームの信号x (z)と
、前フレームの信号X (Z)・Z−1との差ではなく
、前フレームx iz)の出力信号Y [z)のフレー
ム遅延信号Y (z)・2−+  との差であることで
ある。このため勧き部分検出信号に誤まりが、起こる可
能性が高くなり、エツジ部分や細かい絵柄の部分でぼけ
た画I象となる。
Where the movement is large, K=0, and equation (1) becomes Y (
z) = X (Z), so the video part is not blurred.
1j71 elephants. In a place where the movement is small, the noise becomes -'yO, and the noise can be suppressed by (1-'/(1+K) times) in the power phase.However, the problem here is that
The recommended part detection signal is not the difference between the signal x (z) of the current frame and the signal X (Z)/Z-1 of the previous frame, but the frame of the output signal Y [z) of the previous frame This is the difference from the delayed signal Y (z)·2−+. For this reason, there is a high possibility that an error will occur in the recommended portion detection signal, resulting in a blurred image at edge portions and fine pattern portions.

(発明が解決しようとする諌渭) 動き部分検出信号を、従来は、現フレーム映ぼ信号と前
フレーム映は1百号のノイズリデューサ回路出力映像信
号のフレーム遅延信号により求めていたので、taき部
品検出に誤まりが起る可能性が高く、映像のぼけとなっ
ていた。
(The problem to be solved by the invention) Conventionally, the moving part detection signal, the current frame image signal and the previous frame image were obtained from the frame delay signal of the No. 100 noise reducer circuit output video signal. There was a high possibility that errors would occur in component detection, resulting in blurred images.

この発明はこのような間頑5こ鑑み映ぼのぼけを少fx
<t、f、ニーノイズリデューサ回路を提供することを
目的とする。
This invention is designed to reduce the blurring of the image in such a way.
<t, f, knee noise reducer circuit.

〔発明の構成〕[Structure of the invention]

(課項を解決するための手段及び作用)動き部分検出を
正確に行うために、入力映像信号x (z)と入力映像
信号x (z)の単位遅延素子の出力x z * Z−
’  との差により動き部分検出信号を求め、この動き
部分信号により係数にの制御を行う。
(Means and actions for solving the problem) In order to accurately detect a moving part, the input video signal x (z) and the output of the unit delay element of the input video signal x (z) x z * Z-
A moving part detection signal is obtained from the difference between ' and the coefficients are controlled using this moving part signal.

(実施例) 以下本@−1の一実施例を図面を参照して詳述する第1
図において、入力端子1から人力した映像信号は、減算
器3及び7に入力すると共に単位遅延素子この場合フレ
ームメモリー2番こ入力する。
(Example) Hereinafter, an example of the book@-1 will be described in detail with reference to the drawings.
In the figure, a video signal input manually from an input terminal 1 is input to subtracters 3 and 7, and is also input to a unit delay element, in this case frame memory No. 2.

フレームメモリー2の出力は、7$、算33iこ入力し
The output of frame memory 2 is 7$, totaling 33i inputs.

現フレーム信号との差分値が計算される。減算器3の出
力は加算1W4Gこ出力されろと共に、@き部分検出信
号εとして、非啄を処理回路5に出力さ几る。MJJX
a4に入力したeは1巡回するループのフレームメモリ
ー6の出力とvOjtされ、加算料εは、非aを処理回
路5に出力される。非線型処理回路5では、入力したε
と係数K(ε、ε]の乗算を行い、その乗算結果にεを
減算器7及び巡回するループのフレームメモリー6に出
力する。
A difference value from the current frame signal is calculated. The output of the subtracter 3 is outputted as the addition 1W4G, and a non-selected signal is outputted to the processing circuit 5 as the @-marked portion detection signal ε. MJJX
e inputted to a4 is vOjt with the output of the frame memory 6 of one loop, and the additional charge ε is outputted to the processing circuit 5. In the nonlinear processing circuit 5, the input ε
is multiplied by a coefficient K (ε, ε), and outputs ε to the multiplication result to the subtracter 7 and the frame memory 6 of the circulating loop.

ここで、係数には従来εのみの関係で第7図の様な特性
を持っているが、本実施例では、例えば第2図の様な正
確な動き部分検出信号εによりて決まる特性を持つ係数
である。減算器7に入力したにεは、入力映像信号から
減算され出力端子8に出力される。
Here, the coefficient conventionally has a characteristic as shown in FIG. 7 due to the relationship only with ε, but in this embodiment, for example, it has a characteristic determined by the accurate motion detection signal ε as shown in FIG. It is a coefficient. The value ε input to the subtracter 7 is subtracted from the input video signal and output to the output terminal 8.

本実施例の伝達時性は となり従来の実施例と等しくなる。係数にの制御が正確
な動き部分検出信号ε憂こよりて行なわれたので動き部
分検出の誤りがなくぼけのないノイズリデューサ回路が
実現できる。
The transmission time of this embodiment is equal to that of the conventional embodiment. Since the coefficients are controlled based on the accurate moving part detection signal ε, it is possible to realize a noise reducer circuit without errors in moving part detection and without blur.

第3図は、係数にの制御の池の実施例である。FIG. 3 is an example of a control pond for coefficients.

本実施例は、従来と同様にKはεの関数であるが、この
関数の特性をNI道@準備し、正確な動き部分信号eの
匝により切り換えて使用するものである。第3図は、N
=3の場合である。特性の切り変え方法は以下の様にな
る。
In this embodiment, K is a function of ε as in the prior art, but the characteristics of this function are prepared in an NI way and used by switching according to the accurate motion part signal e. Figure 3 shows N
This is the case when =3. The method for changing the characteristics is as follows.

0<III<Tl :41)性1使用 T1く1εl<T2:特性2使用 T2<Igl    :特性3使用 ここで0<TI<T2である。0<III<Tl :41) Gender 1 use T1ku1εl<T2: Use characteristic 2 T2<Igl: Use characteristic 3 Here, 0<TI<T2.

この様lこすればCの誤まりが起りた場合でも、正確な
動き部分信号εにより、その誤まりを抑制することが可
能となる。
In this way, even if an error occurs in C, the error can be suppressed by using the accurate motion portion signal ε.

第4図は、請求範囲第2項の実施例である。FIG. 4 is an embodiment of claim 2.

本発明の実施例(第1図)では、従来の実施例(第5図
)の場合巡回するループの信号は、映1象信号であるの
に対して、ノイズ成分だけとなるので遅延素子(フレー
ムメモリー)の語長をφさくすることが可能とする。
In the embodiment of the present invention (Fig. 1), the signal of the circulating loop in the conventional embodiment (Fig. 5) is an image signal, but since it is only a noise component, the delay element ( This makes it possible to reduce the word length of the frame memory (frame memory).

映1象信号8 bit (0〜255)の場合、第1図
の非線型処理回路5の出力のレンジは6 bit (−
32−31)あれば十分で、にの%性がM2図の場合、
第4図の様になり、フレームメモリー6の語長は6 b
itとなり、映謙信号s bttよりも小さくできる、
この様にすること醗こよりハード規模を小さくすること
ができる。
In the case of an image signal of 8 bits (0 to 255), the output range of the nonlinear processing circuit 5 in FIG. 1 is 6 bits (-
32-31) is sufficient, and if the % property of is M2 diagram,
As shown in Figure 4, the word length of frame memory 6 is 6 b.
It becomes smaller than the Eiken signal s btt,
By doing this, the hardware scale can be made smaller.

〔発明の効果〕〔Effect of the invention〕

動き検出を正確に行うことにより、ぼけの少さいノイズ
リデューサ回路を実現することができる。
By accurately performing motion detection, it is possible to realize a noise reducer circuit with less blur.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す図、第2図は、係数に
の1WIJ呻の一実施例を示す図、第3図は、係数にの
1811鐸の他の実施例を示す図、第4図は、非暖形回
路5の出力レンジを示す図、第5図はノイズリデューサ
の原理を示す図、第6図は、従来の実施例を示す図、第
7図は、従来の係数にの制御を示す図である。 1・・・入力端子、2・・・フレームメモリー、3・・
・減算器、4・・・vD算器、5・・・非線型処理回路
、6・・・フレームメモリー、7・・・減算器、8・・
・出力端子。 代理人 弁理士  則 近 憲 佑 同  松山光之 第1図 第4図 体しネの熱凭胡り 第6図
Fig. 1 is a diagram showing one embodiment of the present invention, Fig. 2 is a diagram showing an embodiment of the 1WIJ ring on the coefficient, and Fig. 3 is a diagram showing another embodiment of the 1811 bell on the coefficient. , FIG. 4 is a diagram showing the output range of the non-warm type circuit 5, FIG. 5 is a diagram showing the principle of the noise reducer, FIG. 6 is a diagram showing a conventional embodiment, and FIG. 7 is a diagram showing the conventional example. It is a figure which shows control on a coefficient. 1...Input terminal, 2...Frame memory, 3...
・Subtractor, 4...VD calculator, 5...Nonlinear processing circuit, 6...Frame memory, 7...Subtractor, 8...
・Output terminal. Agent Patent Attorney Noriyuki Chika Yudo Mitsuyuki Matsuyama Figure 1 Figure 4 The body is in a hot seat Figure 6

Claims (1)

【特許請求の範囲】[Claims] (1)入力映像信号と入力映像信号の単位遅延素子の出
力との差分値を求める第1の減算器と、この第1の減算
器の出力信号と巡回するループの単位遅延素子の出力と
の和を求める加算器と、この加算器の出力に前記第1の
減算器の出力により非線型処理を行う処理回路とこの処
理回路の出力を巡回するループの単位遅延素子の入力と
すると共に、出力と入力映像信号との差分値を求める第
2の減算器とを有しこの第2の減算器の出力を出力映像
信号とし、前記第1の減算器の出力により前記非線型処
理特性の制御を行うことを特徴とするノイズリデューサ
回路。
(1) A first subtracter that calculates the difference value between the input video signal and the output of the unit delay element of the input video signal, and the output signal of the first subtractor and the output of the unit delay element of the circulating loop. an adder that calculates the sum; a processing circuit that performs nonlinear processing on the output of this adder using the output of the first subtracter; and an output of the processing circuit that is input to a unit delay element of a circulating loop and output and a second subtracter for calculating a difference value between the input video signal and the input video signal, the output of the second subtracter is used as the output video signal, and the nonlinear processing characteristic is controlled by the output of the first subtracter. A noise reducer circuit characterized by:
JP63025632A 1988-02-08 1988-02-08 Noise reducer circuit Pending JPH01202072A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63025632A JPH01202072A (en) 1988-02-08 1988-02-08 Noise reducer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63025632A JPH01202072A (en) 1988-02-08 1988-02-08 Noise reducer circuit

Publications (1)

Publication Number Publication Date
JPH01202072A true JPH01202072A (en) 1989-08-15

Family

ID=12171238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63025632A Pending JPH01202072A (en) 1988-02-08 1988-02-08 Noise reducer circuit

Country Status (1)

Country Link
JP (1) JPH01202072A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010163421A (en) * 2008-12-19 2010-07-29 Tadao Fukushima Antibacterial agent for periodontal disease-causing bacteria, and medical or dental material using the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010163421A (en) * 2008-12-19 2010-07-29 Tadao Fukushima Antibacterial agent for periodontal disease-causing bacteria, and medical or dental material using the same
US9486496B2 (en) 2008-12-19 2016-11-08 Maruha Nichiro Corporation Anti periodontitis-causing microorganism agent and medical or dental materials using the same

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