JPH01175436A - Data converter and automatic system for checking and testing equipment by using group of such converters - Google Patents

Abstract

PURPOSE: To standardize an automatic system which checks and tests a data format converter and a device by improving its function capability and expanding a peripheral range of execution for the check and test of a new object. CONSTITUTION: A data format converter 1 includes a message transceiver 2, a message encoding/decoding unit 3, a unit 4 which satisfies an interface function, a local communication unit 5, a parallel-parallel-serial conversion element 6 and a parallel-serial-parallel conversion element 7. An input/output group of a transceiver 2 is connected to a controller 36 via a device interface 39, and the input/output groups of both elements 6 and 7 are connected to an external operation device. That is, the data output group of the converter 1 of a stimulation device unit 40 is connected to the input of a stimulation device 43. At the same time, the data output group of the converter 1 of a switching unit 41 is connected to the input of a switching device, and the data input/output group of the converter 1 of a measurement unit 42 is connected to the input/ output of a measurement device 45 respectively.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to data processing systems and apparatus, and more particularly to apparatus for converting cheetah formats received from measurement devices and computers. It also relates to automatic systems using converters for checking and testing various devices.

[Application field]

The present invention can be used to construct automated systems for adjusting, monitoring, checking, and testing digital, analog-to-digital, and analog functional units, devices, and instruments.

[Prior art]

Already known data format converters (G
, Nauman et al.
e 1nterfeisydlya izmerite
1982.Mir, M.
o5kva.

p., 166, in Ru5sian) comprises a message transceiver including a parallel-to-serial-to-parallel conversion unit, a parallel-to-parallel-to-serial conversion unit, a message transceiver, and a data format converter connected to an execution peripheral device and an automatic test system. There is. The message transceiver is connected to an encoding/decoding unit with a control device, a unit execution interface and a local communication unit.

The data format converter is used to convert the execution peripheral's data format to the device interface cheater format and to allow the device interface's algorithms to execute the execution peripheral.

However, in conventional data format converters, the device interface is only connected to a special device execution peripheral, which selects the address of the requested execution peripheral, or when two or three special execution peripherals are connected. While it is impossible to determine its utilization when connected to a single data format converter.

Furthermore, each type of execution peripheral requires special circuitry, such as a data format converter with a message encoding/decoding unit.

There is also an already known automated system for checking and testing equipment (Izmeri-tel
naya Tekhnika, Vol. 7, 1983.
July, Mo5cou+, A, M.

^verbukh et al, Izmeriteln
o-vychislitelnykompleks d
lya metrologycheskikh 1sp
ytany, pp.

14-15) has a computer whose data and control bus is connected to a circuit that controls the data format converter via a computer interface;
The circuit is connected to the converter via a device interface. A data format converter connects the execution peripheral to the device interface.

In this case, the execution peripheral device is formed in the form of a stimulating device, for example a generator or a circuit and a power source that transmits the stimulating signals to the device to be checked and tested (the controlled object). Other types of implementation peripherals are devices that measure parameters of the controlled object and switching devices used to connect the controlled object to stimulation and measurement devices.

Prior art automatic systems for checking and testing equipment are simply analog and analog-digital d, c
It is possible to check and test a limited number of devices (control objects) including devices.

This automated system has other disadvantages, such as the large amount of software required, the large computer involved, and the lack of peripherals to perform on new objects to be tested. This is difficult to combine with the setup and wiring modalities of the system when making read adjustments.

[Problems to be solved]

The present invention is to standardize automated systems for checking and testing format data converters and devices by expanding their functional capabilities and extending the scope of execution when checking and testing new objects.

[Means to solve problems]

This purpose has the following serial elements: a message transceiver, a message encoding/decoding unit, a unit fulfilling the interface function, a local communication unit W parallel-parallel-serial conversion element, a parallel-serial-parallel conversion element, and the message transceiver One group of inputs and outputs of the data format converter is one group of inputs and outputs of the data format converter, and is connected to the device interface, and the inputs and outputs of the parallel-parallel-serial conversion element and the parallel-serial-parallel conversion element are one group of inputs and outputs of the data format converter. Another input/output group is connected to an external operating device, and according to the invention, said encoding/decoding unit includes an address decoder whose control input is connected to the output of the control unit and a triggering and availability device. The other groups of inputs and outputs of the message transceiver are connected via a data bus to the parallel-to-serial-to-parallel converter, the parallel-to-parallel-to-serial converter, the address decoder, and the triggering and availability address unit. The control outputs of these units are connected to the control inputs of the parallel-to-serial-to-parallel conversion element and the parallel-to-parallel-to-serial conversion element, respectively, and the control outputs of these elements are connected to the message encoding/decoding unit. This is achieved by providing a data format converter, characterized in that it is connected to the input of the control unit.

The object also includes a computer having data and control inputs and whose output is connected via a computer interface to a control device of the data format converter, said control device being connected via a data and device interface to a stimulation circuit unit, a switching control inputs and outputs respectively connected to a unit and a measuring unit, said unit having a stimulation device, a switching and measuring device and a group of data format converters connected to the measuring device, according to the invention each data format converter. is configured as described above, the data input/output group of each data format converter is connected to the control device of the data format converter via the device interface, and the data output group of each m+data format converter of the stimulation device unit is connected to one or several data format converters, respectively. connected to the input of the stimulation device, each TT+2 of the switching unit
The data output groups of the data format converters are connected to the inputs of one or more switching devices, and the data input and output groups of each '1113 data format converter of the measuring unit are connected to the inputs and outputs of one or more measuring devices (45). This is accomplished by providing an automated system for checking and testing equipment that is characterized by:

In an automatic system according to the invention, a controller for a data format converter includes a microprocessor, a direct access program storage device for storing programs and data, a direct access data device, a direct access unit and a controller for communicating with the data format converter, respectively. The interface for the communication unit with the interface, the direct access unit and the data format converter has a group of inputs and outputs connected to the computer interface and the device interface, respectively, the input group of the direct access unit and the other input and output groups respectively A control output of the direct access program storage device is connected to an input group of the direct access program storage device and an input group of the direct access data storage device, and the control output of the direct access program storage device is connected to the input group of the communication device provided with the data format converter. one input/output group of the microprocessor is connected to the input/output group of the direct access data storage device, and the other input/output group is connected to the input/output group of the communication device having the data format converter. It is preferable.

In an automated system for checking and testing equipment that has many data format converters, the claimed data format converters may be slightly more complex in terms of software system and monitoring required by the computer, but the storage It significantly reduces the demands on capacity and mainframe operating speed, expands the range of execution environments connected to the system, and thus expands the functional capabilities of automated systems and the range of objects checked. The use of such data format converters reduces the amount of equipment required and provides flexible recalibration of automated systems for checking and testing.

〔Example〕

Data format converter 1 has the following elements in series:
It includes a message transceiver 2, a message encoding/decoding unit 3, a device 4 for performing an interface function, a local communication device 5, a parallel-parallel-serial conversion unit 6, and a parallel-serial-parallel conversion unit 7. The message decoding and naturalization unit 3 includes a control unit 8 and an address decoder.

- includes a triggering address and availability address unit 10, the control output of which is connected to the control input of the control unit 8;

The input 11 and other outputs of the control unit 8, which are the inputs and outputs of the message encoding/decoding unit 3, are the control outputs of the message transceiver-2 used for sending and receiving messages of a device interface (not shown in FIG. 1). are connected to inputs 12, respectively. A data bus 13 is connected to one input/output group of the message transceiver 2 and to a data bus of the data format converter 1, which data bus is used to connect the data format converter 1 to a device interface. Message transceiver-2 control human power 1
4 and the output are respectively connected to the control input and control output of the data format converter 1, which are also connected to the device interface.

The information bus 15 is connected to the input/output group of the address decoder 9 and the input/output group of the triggering address and availability address 10, which form the triggering address and are connected to the data format converter 1. for decoding the address of one of the execution peripherals (not shown in FIG. 1) required to determine the availability address of the execution peripheral. The data bus 15 is also connected to the inputs of the parallel-to-serial-to-parallel conversion unit 7 and to the outputs of the parallel-to-parallel-to-serial conversion unit 6, and to the outputs of the unit 7 and to the control outputs of the unit 7. and the data bus 18 connected to the input group of the unit 6 and the control power 19 of the unit 6 are connected to another data bus and another control bus of the data format converter 1, respectively. Address decoder 9 and triggering address and availability address unit 10
The control output of is the control input 20, 2 of units 6 and 7.
1 , 22 , 23 respectively, and the control output of the local communication device 5 is connected to the control inputs 24 , 24 of the units 6 and 7 , respectively.
25, the control outputs of these units are connected to the control input 26 of the unit 5, and to the other outputs of the unit 5 and to the control power 28 and control output of the interface function execution unit 4, respectively. The control inputs 29 , 30 of the control unit 8 are respectively connected to the control output of the unit 6 and the other control input of the interface execution unit 4 , and the control input 31 of the unit 4 is connected to the next next control output of the unit 8 .

The standard setup of units 4, 5, 6.7 and units 8, 9 and 10 is based on the prior art (N, 1.Go
Relikov et al.
dlya progra-mmiruemykh pr
iborov v sistemakh avtoma
19
81, Nauka, Mo5cou+, p. 14).

The parallel-parallel-serial conversion unit 6 is used to multiplex the data received from the execution peripherals of the parallel code according to the requirements of the device interface. For example, parallel 2
The zero digit code is converted to an 8-bit code for the device interface. Parallel-serial-parallel conversion unit 7 performs the inverse conversion.

The interface function execution unit 4 is used for coordinating the operation of the converter 1 with the device interface to the working algorithm.

The local communication unit 5 is used to coordinate the operation of the converter 1 with the execution peripherals that are responsible for the operating algorithms; this unit also characterizes the functional conditions of the execution peripherals and of the converter 1 itself. The address decoder 9 and the triggering address and availability address unit 1 in the message encoding/decoding unit 3 form a single data format converter 1 by concentrating the coded addresses of several execution peripherals of the single converter 1. increases the number of execution peripherals connected to the converter 1 and this selects the execution peripheral pre-configured by the program stored in the computer when this execution peripheral becomes available to the converter 1 and the test subject. enable connection.

The automatic system for checking and testing equipment (objects to be checked) comprises a computer 32 (second
(FIG.), the data and control inputs and outputs of this computer are connected via a data bus 33, a control bus 34 and a computer interface 35 to inputs and outputs of a device controller 36. Device 36 is used to control the data format converter. Further inputs and outputs of the device 36 are connected via a data bus 37, a control bus 38 and a device interface 39 to a unit 40 of the stimulation circuit.
, a switching unit 41 and a measuring unit 42. Units 40, 41.

42 are m + + 71 described in FIG. 1, respectively.
12 or Trl+ data format converter.

The total number of converters 1 in an automatic system is equal to the sum (natural numbers), m - m + + m 2 + m 3
It is.

Each of the m+ converters 1 of the unit 40 is connected to one or several execution peripherals selected from Pl, for example to a stimulator 43 of the unit 40 (in this case ρ1>TT+1). Each of the sums of unit 41, converter l (given this case mz=1>, is connected to each input of the ρ2 execution peripheral, e.g. the switching device of unit 42 (in this case p2>T112>). 42 m1 data format converter 1 is connected from the p3 execution peripheral of unit 43 to one or several peripherals, for example measuring device 45, in which case ρ
2>Tl3IP+ 10P2+P3 =P, where P is a natural number and is the sum of ρ>. The functional outputs of the stimulation device are connected to the inputs of the object 46 to be checked. P1 stimulation circuit 43
The output of the other stimulation circuit 43 is connected via a switching device 44 to the other input group of the object to be checked. .

One or more of the ρ3 measuring circuits 45 are connected via their functional inputs directly to one output group of the object to be checked 46, while the remaining measuring circuits 45 are checked via the switching circuit 44 of the switching unit 42. It has functional inputs that are connected to other outputs of the object.

The stimulation device 43 is in the form of a d, c, and a, c, reference voltage source, analog and individual signal generator, and the measuring device 45 is in the form of a multimeter, a frequency meter, a voltage converter. If several stimulation devices to be tested are connected to the system, various switching circuits 44, such as programmable switches, are used.

A first data bus of each data format converter 1 and its control inputs and outputs, each corresponding to the data bus 13 of FIG. . The other data buses of the converter 1, corresponding to the data buses 16 and 18 of FIG. 'has one data bus, for example data bus 16 (FIG. 1).

The device 36 (FIG. 3) for controlling the data format converter comprises a direct access data unit 47, which unit 47 is connected to the computer 32 via the data bus 33, the control bus 34 and the computer interface 35 (FIG. 2). Has an input and an output.

A data bus 48 (FIG. 3) is connected to the outputs of unit 47 and to the data inputs of direct access program storage 49, and a data bus 50 is connected to the inputs and outputs of unit 47 and to the direct access data storage 5.
1, connected to one input/output group. Data bus 52 is connected to an input/output group of direct access storage device 57 and a first input/output group of microprocessor 53.

A control power 54 of the microprocessor 53 is connected to the control output of the direct access program storage 49, and a data bus 55 is connected to the input/output group of a unit 56 used for communicating with the data format converter and to the other inputs of the microprocessor 53. Connected to the I/O group.

The control output of the microprocessor 53 is connected to the control input of the unit 56, the other inputs and outputs of the unit 56 are connected to the data bus 37 of the unit 36 controlling the data format converter, and the control inputs and outputs of the unit 56 are connected to the device interface. 39 (FIG. 2) to the control bus 38 of the unit 56.

The automatic system for checking and testing equipment and the data format converter 1 used in this system operate as follows.

According to a program stored in the memory of the computer 32 (FIG. 2), test data in the form of a coded sequence is sent to the stimulation circuit 43 via the computer interface 35, the device 36, the device interface 39 and the data format converter 1. A test signal (stimulation operation) is formed here and sent to the switching unit 44. The test signal is sent to the object 46 and checked either directly or by the switching device 44. The response of the object 46 to be checked with the test signal is measured by one or more measuring devices 45 directly or via a switching device 44 .

The operation of measuring device 45 and switching device 44 is controlled by a program stored in the memory of computer 32. The control signals are received by the devices 45 , 44 in the form of a coded sequence transmitted via the computer interface 35 , the device 36 , the device interface and the data format converter 1 corresponding to the units 42 , 41 . The measurement result in the form of a coded data sequence is sent to unit 4.
The data is supplied to the computer 32 via two data formats 1 to converter 1, three device interfaces, a device 36 and a computer interface 35 in the form of data having a predetermined type and format. The data is analyzed and compared by the monitoring program's instructor, John, to determine whether the test object meets specifications.

According to program or operator instructions, test results are sent to a recording device (not shown in FIG. 2) built into the computer 32 system.

By considering the range of equipment and modules,
A maximum number of data and control channels II K I+ can be determined to be connected to each particular execution peripheral. The analysis shows that the value of "K" does not exceed 64. Thus, in units 6 and 7 (Fig. 1) "K"
By providing the above values of transceivers and memory elements, it is possible to connect any peripheral device or several peripheral devices of different types to an automatic test system.

In this case, the identification of the specific execution peripherals (measuring 45, stimulation 43, switching 44) connected to the data format converter 1 is controlled via the local communication device 5 and sent to the execution peripherals via the control unit 6.7. This is carried out by the message encoding/decoding unit 3 through the connected address decoder 9 and start address and availability address units 1-10.

If necessary prior to operation or during the course of operation, software is written to program random access device 49 from computer 32 (FIG. 3) via direct access unit 47.

This allows the checking program to be changed operationally depending on the type of object 46 to be checked at a given moment, and the software can be tailored to the required set of executing peripherals. If necessary, the initial value data is recorded in the random access storage device 49.

The operation of the unit 36 controlling the format converter, e.g. the data exchange between the execution peripherals and the computer 32 (FIG. 2) via the control unit 36, takes place as follows.

1. Data is transmitted from the computer 32 to the execution peripherals by a direct access unit 47 (FIG. 3) and a direct access data storage device 51, from which data is transmitted to the microprocessor 53, and by a communication device 56 and a data format converter 1. (FIG. 1), the communication algorithm and control algorithm are condensed and transmitted to the execution peripheral device.

Data format converter 1 is used to convert data meeting the requirements of device interface 39 into a format determined by specific execution peripherals, such as stimulation device 43, switching device 44 and measurement device 45. In this case the address of the required execution peripheral from the format connected to the given data format converter 1 is determined in unit 9 (FIG. 1). This coded address is device 3
6 (FIG. 2) via data bus 13, message transceiver 2 and data bus 15 to unit 9.1.
0 (Figure 1). Generated in unit 9 are control signals applied to control personnel 21 of unit 7 for shaping the converted data of data 16 in the required execution peripherals.

Control signals for triggering specific execution peripherals are generated in triggering address and availability address units I-10 and sent to control input 2 of unit 7.
3 is applied. After a signal is applied to the control input of the unit 7, a signal is generated at this output 17 for triggering the specific peripheral device required. Data is transmitted in batches (blocks), which enables the computer 32 (FIG. 2) and its direct access memory to solve other problems in the intervals between data conversion cycles.

After receiving the data, the device 36 for controlling the format converter executes a monitoring program leading to the next cycle of data conversion.

2. When the execution peripheral is available, the appropriate program can be used to trigger the requested data format converter 1 via the communication device 56, and the data from the execution peripheral is transferred to the converter 1 and It is sent to random access storage 51 via communication unit 56 according to instructions sent from microprocessor 53 and programs from direct access storage 49 . In this case, the data format converter 1 converts the data from the format of the specific execution peripheral into the format required by the interface 39, and the address of the specific execution peripheral is established in the address decoder 9 (FIG. 1), which Data from peripheral devices is transmitted via data bus 18, unit 6 and unit 2 to data bus 13, and thus data is sent to device 36 (FIG. 2) via three device interfaces.

Unit 9 also generates a control signal, which unit 6
control input 22 to enable the execution of the aforementioned operations.

The signals from the execution peripheral connected to the given data format converter 1 are sent to unit 6 of the converter.
is sent to the unit 5 via the control human power 19.

Based on these signals and the execution peripheral address received from unit 2 (FIG. 1) and device 36 (FIG. 2) via data bus 15, the triggering address and availability address unit 10 generates a "byte-state" signal that specifies the state of the required execution peripherals, and this signal is routed via data bus 15, message transceiver, and data bus 13 to device interface 39 (FIG. 2). ) will be sent to.

As soon as the data block reaches the length specified by the monitoring program, this block is sent to the computer 32 via the direct access device (FIG. 3) of the device 36. The organization of the structure and function of the device 36 controlling the data format converter frees the computer from computations that are not coupled to the control of peripheral controllers, thus increasing the speed at which programs can be executed, monitoring high-speed processes, Microprogram duties can be organized and direct access storage of computer 32 can be freed up.

〔Effect of the invention〕

The invention thus makes it possible to extend the functional capabilities of automated systems for checking and testing equipment by extending the range of peripherals that can be implemented by using the data format converter according to the invention. Furthermore, in the automatic system according to the invention, the number of running peripherals can be increased, their connections can be standardized, and the amount of data and control channels of units 6 and 7 of the data format converter 1 can be optimized. By selection and by the use of the address decoder 9 and the triggering address and availability address unit 10 of the data format converter 1, the range of equipment required can be reduced.

The present invention allows the automatic system for checking and testing equipment to be flexibly re-adjusted through the use of the data format converter 1, and the operation of the execution peripherals can be adjusted by setting up the automatic system for checking and testing equipment as proposed. The development of control programs can be standardized. Furthermore, the present invention can reduce the demands on the capacity and efficiency of the direct access storage of the computer 32, and the proposed set-up of the device automatic system for checking and testing the device and the use of the device 36 to control the format converter. Calculations related to the operation of the device can be freed up.

[Brief explanation of the drawing]

FIG. 1 shows a block diagram of a data format converter according to the invention, and FIG. 2 shows a block diagram of an automatic system for checking and testing equipment using data format converters according to the invention. FIG. 3 shows a block diagram of a control unit for a data format converter according to the present invention. 1... Data format converter 2... Message transceiver 3... Message encoding/decoding unit 4... Interface function execution unit 5... Local communication device 6... Parallel-parallel-serial conversion unit 7. - Parallel-serial-parallel conversion unit 8... Control unit 9... Address decoder 10... Triggering and availability address unit 11... Input 12 of control unit 8... Input 13 of unit 2. ...Data bus 14...Control input 15 of unit 2...Data bus 16...Data bus 17...Control output 18 of unit 7...Data bus 19, 20, 21...Unit 6 control input 22 of
, 23... Control input 24 of unit 7... Input 25 of unit 6... Input 26 of unit 7... Input 27 of unit 5... Control input 28 of unit 5... Control inputs 29, 30... Control inputs 31 of unit 8... Control inputs 32 of unit 4... Computer 33... Data bus 34... Control bus 35... Computer interface 36... Control Device 37...Data bus 38...Three control buses...Device interface 40...Stimulation circuit unit 41...Switching unit 42...Measurement unit 43...Stimulation circuit 44...Switching Device 45...Measuring device 46...Device under test 47...Direct access data unit 48...Four data buses...Direct access program storage device 50...
Data bus 51...Direct access data storage device 52...Data bus 53...Microprocessor 54--Manual control of microprocessor 53 55...
Data bus 56...Communication unit 57...Control input of unit 56 for data format converter

Claims (1)

[Claims] 1. The following series elements: a message transceiver (2);
A message encoding/decoding unit (3) mainly consisting of a control unit (8), a unit (4) fulfilling the interface function, a local communication unit (5), a parallel-parallel-serial conversion element (6), a parallel-serial- It has a parallel conversion element (7), one group of inputs and outputs of the message transceiver (2) is an input/output group of the data format converter (1), is connected to the device interface, and has a parallel-parallel-serial conversion element ( 6) and parallel-series-parallel conversion element (7
) is the input/output group of the data format converter (1
) in a data format converter connected to an external operating device, said encoding/decoding unit has an address decoder (9) and a trigger whose control input is connected to the output of the control unit (8). Another group of inputs and outputs of the message transceiver (2) is connected by the data bus (15) to the parallel-to-serial-to-parallel conversion element (7), including a ring-and-availability address unit (10); It is connected to an input/output group of a serial conversion element (6), an address decoder (9), and a triggering and availability address unit (10), and the address decoder (9) and the triggering and availability address unit (10
), the control output of each parallel-series-parallel conversion element (7
) and the control input of the parallel-parallel-serial conversion element (6) (
20, 22, 21, 23), and the element (7)
and a data format converter 2, having data and control inputs, characterized in that the output of (6) is connected to the input (29) of the control unit (8) of the message encoding/decoding unit (3); It has a computer (32) whose output is connected via a computer interface (35) to a control device (36) of a data format converter, said control device being connected to a stimulation circuit unit (40) via a data and device interface (39). )
, a switching unit (41) and a measuring unit (
42), said units (40), (41), (42) being connected to units (40), (41) of stimulation devices, switching and measuring devices, respectively.
, (42) stimulation circuit (43), switching device (4
4) and a group of data format converters (1) connected to a measuring device (45), in an automated system for checking and testing devices, each converter from m_1, m_2 and m_3 data format converters (1) series elements: a message transceiver (2), a message encoding/decoding unit (3) mainly consisting of a control unit (8), a unit fulfilling the interface function (
4), has a local communication unit (5), a parallel-parallel-serial conversion element (6), and a parallel-serial-parallel conversion element (7),
One group of inputs and outputs of the message transceiver (2) is an input and output group of the data format converter (1),
The input/output group of the parallel-parallel-serial conversion element (6) and the parallel-serial-parallel conversion element (7) is another input/output group of the data format converter (1) that is connected to the device interface and is not connected to external operation. In the data format converter connected to the device, said encoding/decoding unit comprises an address decoder (9) and a triggering and availability address unit (10) whose control inputs are connected to the output of the control unit (8). including,
Another group of inputs and outputs of the message transceiver (2) are connected by a data bus (15) to the parallel-to-serial-to-parallel converter (7), the parallel-to-parallel-to-serial converter (6), the address decoder (9), and It is connected to the input/output group of the triggering and availability address unit (10), and the control outputs of the address decoder (9) and the triggering and availability address unit (10) are subjected to parallel-serial-parallel conversion, respectively. Control input (20) of element (7) and parallel-parallel-serial conversion element (6)
, 22, 21, 23), and the outputs of said elements (7) and (6) are connected to a message encoding/decoding unit (3).
), one group of each data format converter (1) is configured to be connected to the input (29) of the control unit (8) of the
connected to a control device (36) of the data format converter (1) via a device interface (39);
The data output groups of each m_1 data format converter (1) of the stimulator unit (40) are respectively connected to the inputs of one or more stimulators (43), and the data output groups of each m_2 data format converter (1) of the switching unit (41) are connected to the inputs of one or more stimulators (43). The data output groups are connected to the inputs of one or several switching devices, each m_ of the measuring unit (42)
3. An automatic system for checking and testing devices, characterized in that the data input/output group of the data format converter (1) is connected to the input/output of the 1 or number measuring device (45). Control device(
36) includes a microprocessor (53), a direct access program storage device (49), a direct access data storage device (51), a direct access unit (47) and a communication unit (56) for the data format converter.
), the direct access unit (47) and the communication unit (56) have a computer interface (35
) and a device interface (39), with a group of inputs and outputs respectively connected to the direct access unit (4
7) and the other input/output groups are respectively connected to the input group of the direct access program storage device (49) and the input/output group of the direct access data storage device (51), and the control output of the direct access program storage device (49) is A control input (54) of a microprocessor (53) whose control output is connected to a control input (57) of a communication device (56)
), one input/output group of the microprocessor (53) is connected to the input/output group of the direct access data storage device (51), and the other input/output group is connected to the input/output group of the communication device (56). The second claim characterized in that
Automated system described in section