JPH01167794A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To correct all the levels of all the channels and to obtain an excellent image without the unevenness of luminance by adding outputs from a counter synchronizing with the shift register of a signal electrode driving circuit to a factor ROM and getting synchronism. CONSTITUTION:The title device is provided with an A/D converter 19 where a video signal is inputted, the factor ROM 20 connected to the A/D converter 19, D/A converters 22 and 23 which D/A convert the outputs from the factor ROM and the signal electrode driving circuits 7a and 7b which drive signal electrodes 6 connected to the D/A converters. The signal electrode driving circuits 7a and 7b are constituted of shift registers equivalent to the number of the signal electrodes 6, sample and hold circuits and buffer circuits and the outputs from the counter which counts clocks synchronizing with the clocks of the shift register are inputted in the factor ROM 20. Since the output deviation of the signal electrode driving circuit can be corrected in all the levels of all the channels the excellent image without the unevenness of luminance can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a liquid crystal display device using an active matrix for displaying television image signals.

2. Description of the Related Art In recent years, liquid crystal display devices for television image signals using an active matrix, so-called liquid crystal televisions, have been put into practical use.

FIG. 4 shows a typical configuration example of a conventional liquid crystal television, and will be explained with reference to the drawings. In FIG. 4, 1 is an active matrix panel, 2 is a thin film transistor provided for each pixel, 3 is a liquid crystal cell corresponding to one pixel, 4 is a scan electrode, and 5 is a scan electrode drive circuit. Although the contents of the scanning electrode drive circuit 5 are not shown, it is composed of a shift register,
Terminal SV is input data, terminal ΦV is a horizontal scanning period clock, and a scanning pulse is applied to the scanning electrode 4 every horizontal period in order from the top. Furthermore, 6 is a signal electrode, 7a and 7b are signal electrode drive circuits, and 8 is a signal processing circuit that processes a normal video signal into a waveform suitable for driving a liquid crystal. The explanation of the operating principle of the panel will be omitted since it departs from the purpose of the present invention. Next, the signal processing relationship will be specifically explained with reference to FIG. 5. In Fig. 5, 9.10 is an operational amplifier, 11 is an analog multiplexer, 12 is an input resistance of operational amplifier 9, 13 is a feedback resistance of operational amplifier 9, and 1
4 is the input resistance of the operational amplifier 10, 15 is the operational amplifier lO
is the feedback resistance of The resistor 14 and the resistor 15 have the same value, and the operational amplifier lO operates as an inverting amplifier with an amplification degree l. An analog video signal is amplified by an operational amplifier 9 through an input resistor 12 to a predetermined amplitude (normally 0.7 mm amplitude to about 5 V amplitude). The amplified signal and the signal inverted by the operational amplifier 10 are switched by an analog multiplexer 11 to 1/2 fV, that is, for each leaf yield, to realize AC driving of the liquid crystal. Terminal A in FIG. 3 is connected to signal electrode drive circuits 7a and 7b shown in FIG. 4, and serves as an output section of this circuit. An example of the waveform of this terminal A is shown in FIG. 3(a). As shown in Figure 3(c), Vs in Figure 3(a) is the waveform at terminal A when a ramp wave that changes from black to white in the vertical scanning period is applied, and the polarity changes at every leap in the field period. It has an inverted AC waveform.

Incidentally, Vg is an example of the voltage waveform of the scanning electrode.

Regarding the contents of the signal electrode drive circuits 7a and 7b, the fourth
This will be explained with figures. The terminal A section in FIG. 6 is the terminal A section in FIG. 3, and is an analog input section in FIG. In FIG. 6, 16 is a shift register, 1
7 is an analog sample and hold circuit, and 18 is an output buffer. The terminal SH of the shift register 16 is a start pulse for the horizontal scanning period, and this pulse is sent to the next stage in order at the clock period from the terminal ΦH. The output of each stage of this shift register is used as a sample signal of the sample/hold circuit 17. Sample and hold circuit 17
samples the signal from the alternating current terminal A and drives the signal electrode 6 through the output buffer 18. Here, if the number of horizontal pixels is 500, the clock period is 0.1 μs, which is the effective horizontal scanning period of 50 μs divided by 500, or IOMH
2 and high speed.

Therefore, as shown in FIG. 2, the signal electrodes are generally connected one above the other in an alternating manner, and each clock cycle is halved to 5 MHz. This also has the advantage of doubling the mounting pitch. And IC for dozens of channels at once
and install it on panel l. Normally, it is implemented as a MOS-IC in terms of power consumption and chip size, but the sample/hold 17 and buffer 18 are analog operated, and in order to integrate a large number of channels, the number of transistors is increased to improve accuracy. Since it is not possible to take the following steps, there are problems that will be described later.

Problems to be Solved by the Invention The conventional configuration has a problem in that blind-like brightness unevenness tends to occur. A typical example of this is shown in Figure 7. This is an example in which a difference in brightness occurs for each vertical line because there is a difference in output between the upper signal electrode drive circuit 7a and the lower signal electrode drive circuit 7b even if a signal with negative brightness is input. In the inventor's experiments, blind-like unevenness could be recognized even with an output difference of about 100 mV.

It is generally known that even a luminance difference of about 1% can be recognized between adjacent pixels. In addition, the dynamic range of the liquid crystal is approximately 3V (maximum amplitude 5 - threshold voltage 2
V), 100 mV is equivalent to about 3% in luminance, which is a level that can be reliably recognized. Further, even if the characteristics match well between the upper and lower ICs, if there is an output deviation between adjacent ICs, a line can be recognized at the boundary.

One of the causes of this is the offset voltage deviation of the output buffer 18 shown in FIG. 6, which is caused by variations in the IC process. The variation within the same uniform bar is small, but if the lofts differ, it is very difficult to keep the voltage below 100 mV. Another cause is variations in the sample capacitor of the sample and hold circuit 17. This is due to mask pattern accuracy and causes variations even within the same chip.

As described above, with the conventional configuration, it is difficult to eliminate output deviation, and as a result, only low-quality images with uneven brightness are obtained.

In view of this, an object of the present invention is to provide a liquid crystal driving device that can obtain good images without uneven brightness.

Means for Solving the Problems The present invention provides an A/D converter receiving a video signal as an input, a coefficient ROM connected to the A/D converter, and a coefficient ROM connected to the A/D converter.
a D/A converter for D/A converting the output of M;
a signal electrode drive circuit that drives the signal electrodes connected to the converter, and this signal electrode drive circuit is composed of shift registers, sample/hold circuits, and buffer circuits corresponding to the number of signal electrodes; The output deviation of the signal electrode drive circuit is corrected by inputting the output of a counter that counts clocks synchronized with the clock to the coefficient ROM.

Function The present invention first A/D converts the video signal, adds the digital signal to the coefficient ROM which stores data that has been corrected for the output deviation of the signal electrode drive circuit, and then converts the digital output again to D/A. and added to the signal electrode drive circuit. Then, in order to correct each channel of the signal electrode drive circuit, all levels of all channels are corrected by adding the output of a counter synchronized with the shift register of the signal electrode drive circuit to the coefficient ROM for synchronization. becomes possible.

Embodiment An embodiment of the present invention is shown in FIG. 1 and will be explained with reference to the drawings. In FIG. 1, 19 is an A/D converter, 20 is a coefficient ROM,
21C, t counter, n, 23, D/A converter, 24
．． 25 is a latch for data retention, 26 is a frequency 1
/2. Next, the operation will be explained. The analog video signal is digitized by the A/D converter 19, whose clock is IOMH2 in the 500 pixel example described above. At the same time, this 10 MHz clock also increments the counter 21. A/D
The digital output of the converter 19 and the output of the counter 21 are added to the address of the coefficient ROM 20. Furthermore, a 1/2 fV signal is added to the 1-bit coefficient ROM 20 to convert the video signal to AC for the liquid crystal. This operation will be described later. According to the inventor's experiments, the capacity of the coefficient ROM 20 is 9 because the address is 7 bits for the video signal and the output of the counter 21 is 500 pixels.
There was a total of 17 bits, including 1 bit and 1 bit for alternating current, and the data was a general 8 bit, totaling 1M bits. This is the capacity of one chip. 10MHz clock 2ΦH is halved by 1/2 counter 26 to 5MHz Φ
The signal becomes H and serves as a clock for the upper latch 24 and the shift register of the signal electrode drive circuit 7a. ΦH having an opposite phase to the upper ΦH serves as a clock for the lower latch 25 and the shift register of the signal electrode drive circuit 7b. The digital signal corrected by the latch 24 and reduced to the signal for the upper signal electrode drive circuit 7a is converted back into an analog signal by the D/A converter 22 and input to the signal electrode drive circuit 7. Similarly, the corrected analog signal is input to the signal electrode drive circuit 7b through the latch 25 and the D/A converter 23. The correction error is less than 50 mV because the output of the D/A converter is 10 Vpp (doubled because the maximum voltage of 5 V is converted to AC) with 8 bits.

With the configuration of the present invention, fine-grained gamma correction is also possible at the same time. The situation will be explained with reference to FIG. Figure 2 (a
) shows an example of the human output characteristics of the liquid crystal. Here, the input on the horizontal axis shows the input terminal of the liquid crystal, and the output on the vertical axis shows the brightness (or transmittance).This is a non-linear characteristic that rises suddenly in the middle region and then saturates, and if left as it is, it will be excessively high. The image becomes whitish in the middle tones and is clogged at the white peak. Therefore, if input/output characteristics that form a straight line as shown by the solid line in FIG. 2(a) are included in the contents of the coefficient ROM 20, a good image with good gradation can be obtained. In reality, in order to correct for variations in the signal electrode drive circuit, the signal electrode
The input/output characteristics of each liquid crystal are measured, and the overall data including gamma correction is written into the coefficient ROM 20.

The aforementioned alternating current will be explained with reference to FIGS. 2(a) and 2(b). The most significant bit of the coefficient ROM 20 is fixed to 1. Then, in a certain field, the data increases as shown by the solid line in Fig. 7(a) using a 1/2 fV signal.
In other fields, as shown in FIG. 2(b), the data decreases in the opposite way to that in FIG. 2(a). In this way, accurate alternating current becomes possible. An example of this alternating current is V in Figure 3(b).
Shown in s.

In the example shown in Figure 1, two sets of D/A converters are used, but the output of the coefficient ROM is D/A converted by one D/A converter without passing through a latch, and a high-speed analog multiplexer is used. It is also possible to separate the signals into upper and lower signals. Also, the latch is set to the coefficient RO
The coefficient ROM may be placed in front of M to form two sets of coefficient ROMs.

Effects of the Invention As described above, according to the present invention, in an active matrix liquid crystal display device, the output deviation of the signal electrode drive circuit can be corrected in all channels and at all levels, so that a good image without uneven brightness can be produced. Obtainable. In addition, it becomes possible to use an IC chip of a signal electrode drive circuit with a large output deviation, which was not possible until now, and the degree of freedom in IC chip design increases, making it possible to use an IC chip with a simple configuration. Furthermore, fine-grained gradation becomes possible, and high-quality images can be obtained. Since the alternating current is converted digitally, stable alternating current driving without DC offset due to temperature etc. is possible, and the life of the liquid crystal can be extended.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a liquid crystal display device in an embodiment of the present invention, and FIG. 2 shows an example of input/output characteristics of a liquid crystal panel and an example of input/output characteristics by a coefficient ROM in the embodiment. FIG. 3 is a waveform diagram showing an example of input and output waveforms of the signal processing circuit of the liquid crystal display device in the embodiment and the conventional example, FIG. 4 is a block diagram showing the configuration of the conventional liquid crystal display device, and FIG. The figure is a circuit diagram showing a signal processing circuit in a conventional liquid crystal display device, FIG. 6 is a circuit diagram showing the configuration of a signal electrode drive circuit in a conventional liquid crystal display device, and FIG.
The figure is a display screen diagram showing an example of a screen of a conventional liquid crystal display device. l...Active matrix panel (liquid crystal panel), 6...Signal electrode, 7 as 7 b...Signal electrode drive circuit, 19--A/D converter, 20-...Coefficient ROM. 21--Counter, 22.23-D/A converter. Name of agent Patent attorney Toshio Nakao Compilation 1 Figure Q ゐ-H' ゛, Φ Figure 2 Input input Figure 3 Figure 4 Figure 5 Figure 6

Claims (4)

[Claims] (1) A liquid crystal display panel having a signal electrode, an A/D converter for inputting a video signal, a coefficient ROM connected to the A/D converter, and a D/D converter for D/A converting the output of the coefficient ROM. 1. A liquid crystal display device comprising: a /A converter; and a signal electrode drive circuit that drives the signal electrode connected to the D/A converter. (2) the signal electrode drive circuit is composed of shift registers, sample/hold circuits, and buffer circuits corresponding to the number of signal electrodes, and the coefficient ROM has correction data for correcting output deviation of the signal electrode drive circuit; The coefficient ROM
Claim 1 in which the output of a counter that counts a clock synchronized with the clock of the shift register is input.
The liquid crystal display device described in Section 1. (3) The liquid crystal display device according to claim 1, wherein an AC periodic signal is input to the coefficient ROM to drive the liquid crystal display panel with AC. (4) The liquid crystal display device according to claim 1, wherein the data in the coefficient ROM is data including gamma correction data for the liquid crystal panel.