JPH01163842A - Input/output device fault testing system - Google Patents

Abstract

PURPOSE:To rewrite a microprogram and to generate any types of faults by carrying out the generation of the fault due to the microprogram. CONSTITUTION:When an instruction executing address corresponds to a fault generating address 21 while an input/output device carries out a normal action 20, an address correspondence interruption 22 is generated, and activates a fault generating module 23. After one routine in fault generating routines 30 is carried out according to a fault number designated by the setting of the fault number and a fault address number, a processing is returned to the normal action 20 indicated by the next address of a fault generating address 21. At such a time point, a tested fault carried out by a fault generating module 23 is generated. In such a way, the generation of the tested fault is realized by carrying out the microprogram for the fault generation, and since the microprogram for the fault generation is loaded by maintaining and diagnosing commands, any types of the faults can be generated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a fault testing method for input/output devices, and particularly to an automatic fault testing method suitable for setting a fault to be tested and adjusting the timing of fault occurrence.

[Conventional technology]

Conventional techniques include Japanese Patent Publication No. 58-33579 and Japanese Patent Application Laid-open No. 61
As described in Publication No. 23245, there are methods to generate a failure by scanning the hardware under test at a preset failure timing, and methods to set the timing of failure occurrence based on the number of executed instructions. As such, it concerned how the failure occurred.

[Problem that the invention seeks to solve]

The purpose of the present invention is to automatically control a series of processes from a host system, from setting the means and timing of failure occurrence, to determining the content of the failure, and to handling and recovery methods, without the need for acquisition operations. The goal is to perform disability tests on a regular basis.

[Means for solving problems]

The above purpose is to provide three types of maintenance and diagnostic commands that load a microprogram group to cause the fault under test, specify which fault in the microprogram group should occur and when, and perform recovery processing for the fault that has occurred. This is achieved by performing a fault test during normal operation of the input/output device using the fault generating means set by the host system by these maintenance 1 diagnostic commands.

[Effect]

The occurrence of the fault under test is realized by executing a microprogram for fault generation. Since this fault generation microprogram is loaded by the maintenance 1 diagnostic command, any fault can occur.

Furthermore, since the maintenance 1 diagnostic command specifies the timing of failure occurrence, it is possible to cause a failure to occur at any timing during input/output operations.

Furthermore, since confirmation of the failure details and recovery processing after occurrence are performed under the control of the host system, failure tests can be performed automatically and no acquisition operations are required.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail using the drawings.

Figure 1 shows the process after a fault test is started on the input/output device by a maintenance/diagnosis command from the host system.

This shows the flow up to failure recovery processing. FIG. 2 shows an operation in which a failure occurs during normal operation 20 of the input/output device. FIG. 3 shows the format of the failure occurrence routine 30 that is loaded into the input/output device by maintenance and diagnostic commands from the host system. One embodiment will be described in detail below with reference to FIGS. 1 to 3.

First, when the host system issues a maintenance/diagnosis command to the input/output device to instruct the load 10 of the fault occurrence microprogram, the fault occurrence routine 30 is loaded into the control storage area of the input/output device. Next, the fault generation routine 30 issues maintenance and diagnostic commands that instruct setting 11 of a fault number for selecting a fault to be generated and a fault address number for determining the timing of fault occurrence.
One of the routines is selected, and the address for the address match interrupt that triggers the occurrence of the fault is set in the fault occurrence address 21. Thereafter, the host system sends a normal operation instruction 12 to the input/output device.

Next, how the failure occurs will be explained. When the instruction execution address matches the fault occurrence address 21 while the input/output device is executing the normal operation 20, an address match interrupt 22 is generated and the fault occurrence module 23 is activated. After executing one of the fault occurrence routines 3o according to the fault number specified by the fault number and fault address number setting 11, the routine returns to the normal operation 20 indicated by the next address of the fault occurrence address 21. At this point, the fault under test performed by the fault generation module 23 occurs.

After the above procedure is performed, the host system performs a check 13 for the occurrence of a failure, a check 14 for the contents of the failure, and maintenance 1 instructing to perform the same process as the failure recovery process that is triggered by the acquisition operation. Failure recovery processing 15 is performed using the diagnostic command.

By changing the fault address number of the maintenance 1 diagnosis command that instructs setting 11 of the fault number and fault address number, it is possible to test by changing the timing of the fault occurrence, and by changing the fault number, it is possible to perform another fault test. It is possible to do this. Further, if necessary, by loading the fault generation microprogram 10, it is possible to rewrite the fault generation microprogram infinitely and perform various fault tests.

As described above, according to this embodiment, a fault test of an input/output device can be automatically performed by a maintenance 1 diagnosis command from a host system.

〔Effect of the invention〕

According to the present invention, since faults are caused by microprograms, it is possible to cause any faults by rewriting the microprograms. Furthermore, it is possible to set the timing of occurrence of a failure for each instruction.

By sending these functions as maintenance 1 diagnostic commands from the host system, failure tests can be automatically performed without requiring acquisition operations.

[Brief explanation of the drawing]

Figure 1 is a flowchart of instructions sent from the host system to the input/output device according to an embodiment of the present invention, Figure 2 is an explanatory diagram of how a failure occurs within the input/output device, and Figure 3 is a flowchart of instructions sent to the input/output device. FIG. 2 is a configuration diagram of a failure occurrence routine. 10...Loading the microprogram for failure occurrence. 11...Fault number, fault address number setting, 12.
...Normal operation instruction, 13...Fault occurrence check, 7゜14...Fault details check, 15...Recovery processing, 2
0... Normal operation, 21... Failure occurrence address, 22
Address - Enemy side included, 23...fault generating module. 30... Failure occurrence routine.

Claims (1)

[Claims] 1. In an input/output device that has a command processing function from a host system, a storage area for storing a microprogram that executes the command processing, and a processing and recovery function in the event of a failure, load the failure program into the storage area. A command for instructing the type of the faulty program and the timing of the fault occurrence, and a command for instructing recovery after the fault has occurred, thereby making it possible to perform automatic fault testing by commands from the host system. An input/output device fault testing method featuring: