JPH01157468U - - Google Patents
Info
- Publication number
- JPH01157468U JPH01157468U JP15185788U JP15185788U JPH01157468U JP H01157468 U JPH01157468 U JP H01157468U JP 15185788 U JP15185788 U JP 15185788U JP 15185788 U JP15185788 U JP 15185788U JP H01157468 U JPH01157468 U JP H01157468U
- Authority
- JP
- Japan
- Prior art keywords
- holes
- circuit board
- break groove
- break
- wall surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
第１図は従来の回路基板の一例を示す斜視図、
第２図は第１図の一部を示す拡大図、第３図は第
１図の回路基板を切断した部分を示す斜視図、第
４図は本考案による回路基板の一実施例を示す斜
視図である。
１……セラミツク絶縁基板、２……貫通孔、３
……ブレーク溝、５……境界線。
FIG. 1 is a perspective view showing an example of a conventional circuit board;
FIG. 2 is an enlarged view of a part of FIG. 1, FIG. 3 is a perspective view of a section of the circuit board shown in FIG. 1, and FIG. 4 is a perspective view of an embodiment of the circuit board according to the present invention. It is a diagram. 1...Ceramic insulating substrate, 2...Through hole, 3
...Break groove, 5...boundary line.
Claims (1)
電子回路の互いの境界線に沿つて一連の貫通孔と
該貫通孔間にブレーク溝とが設けられ、該電子回
路の印刷による形成に際して該貫通孔の内壁面に
も導電ペーストが印刷され、該境界線に沿つて切
断することによつて該電子回路毎に分割すること
ができ、該分割後の導電ペーストが印刷された該
貫通孔の内壁面をリード線接続用端子部とする回
路基板において、該ブレーク溝を該貫通孔の間隔
よりも短かくし、該貫通孔間で該ブレーク溝が途
切れるように構成したことを特徴とする回路基板
。 (2) 実用新案登録請求の範囲第(1)項において、
前記ブレーク溝は不連続な複数の溝からなること
を特徴とする回路基板。[Claims for Utility Model Registration] (1) A plurality of desired electronic circuits are formed, and a series of through-holes and break grooves are provided between the through-holes along the boundaries of the electronic circuits, When forming the electronic circuit by printing, a conductive paste is also printed on the inner wall surface of the through hole, and by cutting along the boundary line, the electronic circuit can be divided into individual circuits, and the conductive paste after the division is In a circuit board in which the inner wall surface of the through-hole printed with paste serves as a terminal for connecting a lead wire, the break groove is made shorter than the interval between the through-holes, and the break groove is interrupted between the through-holes. A circuit board characterized by comprising: (2) In paragraph (1) of claims for utility model registration,
A circuit board characterized in that the break groove is composed of a plurality of discontinuous grooves.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988151857U JPH0346518Y2 (en) | 1988-11-24 | 1988-11-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988151857U JPH0346518Y2 (en) | 1988-11-24 | 1988-11-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01157468U true JPH01157468U (en) | 1989-10-30 |
| JPH0346518Y2 JPH0346518Y2 (en) | 1991-10-01 |
Family
ID=31426270
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988151857U Expired JPH0346518Y2 (en) | 1988-11-24 | 1988-11-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0346518Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05327222A (en) * | 1992-05-25 | 1993-12-10 | Kokusai Electric Co Ltd | Ceramic multilayer wiring board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5123429A (en) * | 1974-08-21 | 1976-02-25 | Matsushita Electric Ind Co Ltd | NITSUKERUCHITANGOKINNO SEIZOKAKOHOHO |
| JPS5197768A (en) * | 1975-02-26 | 1976-08-27 | ||
| JPS51125865A (en) * | 1975-04-25 | 1976-11-02 | Hitachi Ltd | Method of manufacturing ceramic wiring substrate |
-
1988
- 1988-11-24 JP JP1988151857U patent/JPH0346518Y2/ja not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5123429A (en) * | 1974-08-21 | 1976-02-25 | Matsushita Electric Ind Co Ltd | NITSUKERUCHITANGOKINNO SEIZOKAKOHOHO |
| JPS5197768A (en) * | 1975-02-26 | 1976-08-27 | ||
| JPS51125865A (en) * | 1975-04-25 | 1976-11-02 | Hitachi Ltd | Method of manufacturing ceramic wiring substrate |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05327222A (en) * | 1992-05-25 | 1993-12-10 | Kokusai Electric Co Ltd | Ceramic multilayer wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0346518Y2 (en) | 1991-10-01 |
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