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JPH01154629U - - Google Patents

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Publication number
JPH01154629U
JPH01154629U JP5163088U JP5163088U JPH01154629U JP H01154629 U JPH01154629 U JP H01154629U JP 5163088 U JP5163088 U JP 5163088U JP 5163088 U JP5163088 U JP 5163088U JP H01154629 U JPH01154629 U JP H01154629U
Authority
JP
Japan
Prior art keywords
photomask
insulating film
gate electrode
source
interlayer insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5163088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5163088U priority Critical patent/JPH01154629U/ja
Publication of JPH01154629U publication Critical patent/JPH01154629U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は本考案における第1の実
施例を説明するためのそれぞれ断面図および平面
図、第3図は本考案における第2の実施例を説明
するための断面図である。 20……ゲート電極、22……ソースドレイン
領域、24……層間絶縁膜、26……フオトレジ
スト、28……フオトマスク、30……接続窓。
1 and 2 are a sectional view and a plan view, respectively, for explaining a first embodiment of the present invention, and FIG. 3 is a sectional view for explaining a second embodiment of the present invention. 20... Gate electrode, 22... Source/drain region, 24... Interlayer insulating film, 26... Photoresist, 28... Photomask, 30... Connection window.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ゲート電極に整合した領域にソースドレイン領
域を形成後、層間絶縁膜を全面に形成して、フオ
トマスクを用いて前記層間絶縁膜に接続窓を形成
するフオトマスクにおいて、前記フオトマスクパ
ターンの大きさは前記ゲート電極上と前記ソース
ドレイン領域とにおいて異なるように構成するこ
とを特徴とする半導体集積回路におけるフオトマ
スク。
In a photomask in which a source/drain region is formed in a region aligned with a gate electrode, an interlayer insulating film is formed over the entire surface, and a connection window is formed in the interlayer insulating film using a photomask, the size of the photomask pattern is as described above. 1. A photomask for a semiconductor integrated circuit, characterized in that a photomask is configured differently on a gate electrode and on the source/drain region.
JP5163088U 1988-04-19 1988-04-19 Pending JPH01154629U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5163088U JPH01154629U (en) 1988-04-19 1988-04-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5163088U JPH01154629U (en) 1988-04-19 1988-04-19

Publications (1)

Publication Number Publication Date
JPH01154629U true JPH01154629U (en) 1989-10-24

Family

ID=31277649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5163088U Pending JPH01154629U (en) 1988-04-19 1988-04-19

Country Status (1)

Country Link
JP (1) JPH01154629U (en)

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