JPH01130131A - Driver-containing active matrix panel - Google Patents
Driver-containing active matrix panelInfo
- Publication number
- JPH01130131A JPH01130131A JP62288650A JP28865087A JPH01130131A JP H01130131 A JPH01130131 A JP H01130131A JP 62288650 A JP62288650 A JP 62288650A JP 28865087 A JP28865087 A JP 28865087A JP H01130131 A JPH01130131 A JP H01130131A
- Authority
- JP
- Japan
- Prior art keywords
- driver
- signal lines
- built
- tfts
- active matrix
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011159 matrix material Substances 0.000 title claims description 19
- 239000010409 thin film Substances 0.000 claims abstract 3
- 239000000758 substrate Substances 0.000 claims description 4
- 239000004973 liquid crystal related substance Substances 0.000 claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- 230000002950 deficient Effects 0.000 abstract description 11
- 238000009966 trimming Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 4
- 238000007689 inspection Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000011179 visual inspection Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136254—Checking; Testing
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136259—Repairing; Defects
- G02F1/136268—Switch defects
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はドライバー内蔵アクティブマトリクスパネルの
構成に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of an active matrix panel with a built-in driver.
従来の、ドライバー内蔵アクティブマトリクスパネルの
、例としてはrsID(ニス・アイ拳デイ−)84ダイ
ジェストP、316両角他」がある。第2図はその回路
図の例である。21は、画素エリア、22はXドライバ
ー、24はYドライバーである。画素エリア21は、信
号nx1、x* s X M ト走査1a Y s 、
Y * 、Y N1及ヒソh ラの交点に配置された画
素TFT30とから成る。Examples of conventional active matrix panels with built-in drivers include rsID (Nisu Eye Fist Day) 84 Digest P, 316 Ryojiku, etc. FIG. 2 is an example of the circuit diagram. 21 is a pixel area, 22 is an X driver, and 24 is a Y driver. The pixel area 21 receives signals nx1, x*s
It consists of a pixel TFT 30 arranged at the intersection of Y*, YN1, and Hisoh.
画素TFT30には画素電極が接続され、対向電極VC
8,4との間に容量31が存在する。82は信号線と対
向W1極間の容量である。Xドライバー22は、シフト
レジスタ26とアナログスイッチTFT28とから成る
。VIDは画素信号入力端子、CLX、CLYはクロッ
ク信号、DX、DYlはドライバーの動作入力信号の端
子である。A pixel electrode is connected to the pixel TFT 30, and a counter electrode VC
A capacitor 31 exists between 8 and 4. 82 is the capacitance between the signal line and the opposing W1 pole. The X driver 22 consists of a shift register 26 and an analog switch TFT 28. VID is a pixel signal input terminal, CLX and CLY are clock signals, and DX and DYl are driver operation input signal terminals.
しかし、前述の従来技術では以下に述べるような問題点
を任する。すなわち、アクティブマトリクスパネルは、
大面積に数万〜数百万個もの能動素子を作製する必要が
あり、無欠陥のパネルを作るのは本質的に極めて難しい
という点である。特に、画面サイズの大型化、画面の高
精細化に伴い歩留まりは一層低下する。However, the above-mentioned prior art has the following problems. In other words, the active matrix panel is
It is necessary to produce tens of thousands to millions of active elements over a large area, and it is essentially extremely difficult to produce a defect-free panel. In particular, as the screen size increases and the screen definition increases, the yield rate further decreases.
一方、アクティブマトリクスパネルをキャラクタなどの
データ表示に用いる場合、無欠陥であることはもちろん
、すべての画素が与えられた信号に対して忠実な階調表
示をする必要がある。このようなパネルを従来技術で作
製するのはほとんど不可能である。On the other hand, when an active matrix panel is used to display data such as characters, it is necessary not only to be defect-free but also to display gradations that are faithful to the signals applied to all pixels. It is almost impossible to make such panels using conventional techniques.
本発明はこのような問題点を解決するものであり、その
目的とするところは、データ表示に適した無欠陥のアク
ティブマトリクスパネルを、ドライバーを内蔵し低コス
トで高い歩留まりで作製できるようにするところにある
。The present invention is intended to solve these problems, and its purpose is to manufacture a defect-free active matrix panel suitable for data display with a built-in driver at low cost and high yield. It's there.
本発明のドライバー内蔵アクティブマトリクスパネルは
以下の構成を有することを特徴とする。The active matrix panel with a built-in driver of the present invention is characterized by having the following configuration.
N本の走査線と2M本の信号線、及びM×N個の画素電
極と、各画素電極の1つにドレイン電極が共通に、接続
された2つのTFTを備え、前記2つのTFTのゲート
電極は共通の走査線に接続され、ソース電極は隣接する
2本の信号線に接続され、奇数列目の信号線と偶数列目
の信号線をそれぞれ独立に駆動できる内蔵ドライバーを
備えている。N scanning lines, 2M signal lines, M×N pixel electrodes, and two TFTs each having a drain electrode commonly connected to one of the pixel electrodes, and a gate of the two TFTs. The electrodes are connected to a common scanning line, the source electrodes are connected to two adjacent signal lines, and the device is equipped with a built-in driver that can independently drive the signal lines in odd-numbered columns and the signal lines in even-numbered columns.
本発明の上記の構成を用いたドライバー内蔵アクティブ
マトリクスパネルは、画素TFTと信号線に冗長性を持
たせてあり、各画素の2つのTFTのうちどちらかが正
常であれば正規の信号を与えることができる。一方、こ
れらの2つのTFTには、内蔵ドライバーを用いて異な
る信号を与えることができ、電気的、光学的に簡単に不
良TFTのアドレスを検出することができる。The active matrix panel with a built-in driver using the above configuration of the present invention has redundancy in the pixel TFT and signal line, and if either of the two TFTs in each pixel is normal, a normal signal is given. be able to. On the other hand, different signals can be applied to these two TFTs using built-in drivers, and the address of the defective TFT can be easily detected electrically and optically.
第1図は、本発明の1実施例を示すドライバー内蔵アク
ティブマトリクスパネルの回路図の例である。ドライバ
ー内蔵アクティブマトリクスパネルは、画素エリア1と
Xドライバー2.3及びYドライバー4とから成ってい
る。本実施例においては信号線と画素TFTに冗長性が
あり、画素エリア1は、2M本の信号線とN本の走査線
及びM×N個の画素電極と、各画素電極の1つにドレイ
/電極が共通に接続された2つの画素TFT 10とか
ら成り、この画素TFTのゲート電極は共通の走査線に
、ソース電極は隣接する2本の信号線に接続されている
。11は画素電極と対向電極V。。間との間の液晶の容
量であり、12.13は信号線と、VcoMとの間の液
晶の容量である。FIG. 1 is an example of a circuit diagram of an active matrix panel with a built-in driver showing one embodiment of the present invention. The active matrix panel with a built-in driver consists of a pixel area 1, an X driver 2.3, and a Y driver 4. In this embodiment, there is redundancy in the signal lines and pixel TFTs, and pixel area 1 has 2M signal lines, N scanning lines, M×N pixel electrodes, and a drain on one of each pixel electrode. The pixel TFT 10 has a gate electrode connected to a common scanning line and a source electrode connected to two adjacent signal lines. 11 is a pixel electrode and a counter electrode V; . 12.13 is the capacitance of the liquid crystal between the signal line and VcoM.
信号の、保持特性を改善するため、これらの容量に並列
に、容量を付加することもある。奇数列目の信号n X
、n 、Xs a 1XM wはXドライバー2で、偶
数列目の信号線Xtb%X、h、XHhはXドライバー
3で、走査線Y1、Yl、YNは全て、Yドライバー4
で駆動する。Xドライバー2.3はシフトレジスタ6.
7とアナログスイッチTFTアレイ8.9とから成る。In order to improve the signal retention characteristics, a capacitor may be added in parallel to these capacitors. Odd column signal n
, n , Xs a 1XM w is the X driver 2, the even-numbered column signal lines Xtb%X, h, and XHh are the X driver 3, and the scanning lines Y1, Yl, and YN are all the Y driver 4.
Drive with. The X driver 2.3 is a shift register 6.
7 and an analog switch TFT array 8.9.
このアナログスイッチのかわりにラッチ回路を設けて線
順次ドライバーとすることもできる。CLxas CL
xbはシフトレジスタ6.7のクロック入力端子、DX
axDXbはシフトレジスタ6.7のスタート信号入力
端子、VIDalVIDbは画像信号入力端子である。A latch circuit can be provided in place of this analog switch to provide a line sequential driver. CLxas CL
xb is the clock input terminal of shift register 6.7, DX
axDXb is a start signal input terminal of the shift register 6.7, and VIDalVIDb is an image signal input terminal.
Yドライバーはシフトレジスタで、CLYはクロック、
DYはスタート信号の入力端子である。Y driver is shift register, CLY is clock,
DY is an input terminal for a start signal.
本実施例においては1つの画素に2つのTFTを備えて
いるため、どちらか一方のTFTが不良であっても他の
TFTが正常であれば、不良TFTをレーザトリミング
等を用いて切断して修正できる。修正した画素には正規
の信号が与えられるため、本実施例ではキャラクタなど
のデータ表示にも対応できる無欠陥のアクティブマトリ
クスパネルを高い歩留まりで作製できる。一方、不良部
分のアドレスを検出する場合、本実施例においては信号
線に冗長性を有しかつ奇数列目と偶数列目の信号線を独
立に駆動できるため、電気的あるいは光学的に簡単に検
出できる。以下、その具体的な方法について説明する。In this example, one pixel has two TFTs, so even if one of the TFTs is defective, if the other TFT is normal, the defective TFT can be cut off using laser trimming or the like. It can be fixed. Since a regular signal is given to the corrected pixels, in this embodiment, a defect-free active matrix panel that can also display data such as characters can be manufactured at a high yield. On the other hand, when detecting the address of a defective part, this embodiment has redundancy in the signal lines and can drive the signal lines in odd-numbered columns and even-numbered columns independently, so it can be easily detected electrically or optically. Can be detected. The specific method will be explained below.
第1の方法は、電気的に検出する方法である。The first method is an electrical detection method.
一般にTFTの不良にはシq−トとオープンの2つのモ
ードがあるが、後者については特に修正する必要はない
ので、前者の検出方法について述べる。第3図(a)は
TFTのゲート−ソース間及びゲート・ドレイン間のシ
ョートを検出する方法である。この図のように走査線を
順次選択し、画像信号入力端子VIDa、VIDbにそ
れぞれ電流計−を接続して、信号線を順次選択していけ
ばショートしているアドレスを簡単に求めることができ
る。2つのTFTのどちらがショートしているかは、検
出された電流値の大きさで判別する。なお、全アドレス
についてこの測定を行なうのはかなり時間を要するため
、まず全ての走査線と信号線を同時に選択し、もしリー
ク電流が検出されれば、走査線を1本ずつ順次選択し、
リーク電流が再び検出された走査線でYドライバーの動
作を止め、信号線を1本ずつ選択しアドレスを求めると
いった方法が効率的である。第3図(b)はTFTのソ
ース・ドレイン間のシ2−トを検出する方法で、2つの
TFTの直列抵抗を求めている。もし、どちらかのTF
Tのソース自ドレイン間がショートしていれば、この抵
抗は約半分となる。ただし、2つのTFTのどちらが不
良かはとの伏態では判断できないため、外観検査か画素
電極に直接プロービングして調べる必要がある0通常は
、ソース慟ドレイ/間のショートは平面図なパターン不
良がおもなので外観検査で対応がつくことが多い。第3
図(C)はTFTの不良ではなく、信号線間のショート
を求める方法である。本実施例のように信号線に冗長性
を持たせる場合、画素電極間の2本の信号線がショート
するような事も起こり得る。そのような不良はこの図の
ように隣接する2本の信号線を順次選択し、それらの信
号線間のリーク電流を検出することで可能になる。この
場合、電気的にY側のアドレスを求める−のは不可能だ
が、パターン不良がおもなml因なので外観検査で19
所を求めて修正することができる。There are generally two modes of TFT failure: seat and open, but since there is no particular need to correct the latter, the method for detecting the former will be described. FIG. 3(a) shows a method for detecting short-circuits between the gate and source and between the gate and drain of a TFT. As shown in this figure, if you select the scanning lines in sequence, connect an ammeter to each of the image signal input terminals VIDa and VIDb, and select the signal lines in sequence, you can easily find the shorted address. . Which of the two TFTs is short-circuited is determined based on the magnitude of the detected current value. Note that it takes a considerable amount of time to perform this measurement on all addresses, so first select all the scanning lines and signal lines at the same time, and if a leakage current is detected, select the scanning lines one by one one by one.
An efficient method is to stop the operation of the Y driver at the scanning line where leakage current is detected again, select the signal lines one by one, and obtain the address. FIG. 3(b) shows a method of detecting a sheet between the source and drain of a TFT, and the series resistance of two TFTs is determined. If either TF
If the source and drain of T are short-circuited, this resistance will be approximately halved. However, since it cannot be determined implicitly which of the two TFTs is defective, it is necessary to investigate by visual inspection or by directly probing the pixel electrode.Normally, a short between the source and the drain is a pattern defect in the top view. Since this is the main problem, it can often be resolved through a visual inspection. Third
Figure (C) shows a method for determining short circuits between signal lines rather than defects in TFTs. When the signal lines are provided with redundancy as in this embodiment, a short circuit may occur between the two signal lines between the pixel electrodes. Such defects can be detected by sequentially selecting two adjacent signal lines as shown in this figure and detecting the leakage current between the signal lines. In this case, it is impossible to electrically determine the address on the Y side, but since pattern defects are the main cause of ml, visual inspection shows
You can find out where it is and make corrections.
第2の方法は光学的に検出する方法である。この検査は
液晶を封入した後行なう。この方法は簡単で、Xドライ
バー2のみを使って画像を表示した場合を甲、Xドライ
バー3のみを使゛つて画一を表示した場合を乙とすると
、甲と乙を比・較して不良TFTのアドレスを求めると
いう方法である。The second method is an optical detection method. This inspection is performed after the liquid crystal is sealed. This method is simple, and if A is the case where an image is displayed using only X Driver 2, and B is a case where an image is displayed uniformly using only X Driver 3, compare A and B and see if the image is defective. This method involves finding the TFT address.
アクティブマトリクス基板の断面図を第4図に示す。4
0は絶縁基板、41はゲート電極、42はゲート絶縁膜
、43はチャネル部、44.45はそれぞれソース・ド
レイン電極、46は層間絶縁膜、47は信号線、48は
画素電極である。内蔵ドライバーを構成するTFTも同
じ構造で、画素TFTと同時に作製する。A cross-sectional view of the active matrix substrate is shown in FIG. 4
0 is an insulating substrate, 41 is a gate electrode, 42 is a gate insulating film, 43 is a channel portion, 44 and 45 are source and drain electrodes, 46 is an interlayer insulating film, 47 is a signal line, and 48 is a pixel electrode. The TFTs that make up the built-in driver have the same structure and are manufactured at the same time as the pixel TFTs.
以上述べたように、本溌明のドライバー内蔵アクティブ
マトリクスパネルは、画素TFTと信号線に冗長性を持
たせてあり、各画素の2つのTFTのうちどちらかが正
常であれば正規の信号を与えることができ2゜一方、こ
れらの2つのTFTには、内蔵pライ5バーを用いて異
なる信号を与えることができ、電気的、光学的に而単に
、不良TFTのアドレスを求めることができる。従って
、内蔵ドライバーを用いて不良部分を検出し、レーザー
トリミング等によって修正すれば、データ表示に適′シ
た無欠陥のアクティブ4トリクスパネルを高い歩留まり
4作製できる。特に高精細な・・ネルにおいては、通常
のプローブカード等を用いた検査方法ではこのような検
査は不可能だが、本発明はよればドライバーの動作が可
能な限り非常に高精細のパネルにも対応できる。しかも
検査に要する時間も短くてすみ、コストアップにはなら
ない。また、ドライバー内蔵であるからパネルは小型軽
量で製造コストも安い。As mentioned above, Honjomei's active matrix panel with a built-in driver has redundancy in the pixel TFT and signal line, and if either of the two TFTs in each pixel is normal, the normal signal will be output. On the other hand, different signals can be given to these two TFTs using the built-in p-river, and the address of the defective TFT can be easily determined electrically and optically. . Therefore, by detecting the defective portion using the built-in driver and correcting it by laser trimming or the like, it is possible to produce a defect-free active 4-trix panel suitable for data display at a high yield. In particular, for high-definition panels, such inspection is impossible with normal inspection methods using probe cards, etc., but according to the present invention, the driver can be operated as much as possible even on very high-definition panels. I can handle it. Furthermore, the time required for inspection is short, and costs do not increase. Additionally, since the driver is built-in, the panel is small and lightweight, and manufacturing costs are low.
第1図はドライバー内蔵アクティブマトリクスパネルの
回路図。
第2図は従来のドライバー内蔵アクティブマトリクスパ
ネルの回路図。
第3図(a、)、(b゛)、(c)は不良部分の検出方
法を示す図。
第4図はアクティブマトリクス基板の断面図。
1.21・・・画素エリア
2.22・・・Xドライバー
4.24・・・Yドライバー
6.7.26・・・シフトレジスタ
8.9.28・・・アナログスイッチTFT10.30
・・・画素TFT
以 上
出願人 セイコーエプソン株式会社
”; 、−:
$2図
(し)
(ご)Figure 1 is a circuit diagram of an active matrix panel with a built-in driver. Figure 2 is a circuit diagram of a conventional active matrix panel with a built-in driver. FIGS. 3(a), 3(b), and 3(c) are diagrams showing a method of detecting a defective part. FIG. 4 is a cross-sectional view of the active matrix substrate. 1.21... Pixel area 2.22... X driver 4.24... Y driver 6.7.26... Shift register 8.9.28... Analog switch TFT 10.30
... Pixel TFT Applicant: Seiko Epson Corporation"; , -: $2 Figure (shi) (go)
Claims (2)
び前記データ線及び走査線の少なくとも一方を駆動する
ためのドライバーを備え、前記データ線及び走査線の交
点に設けられた薄膜トランジスタ(以下TFTと略記)
アレイによって画素電極を駆動し液晶を駆動して成るド
ライバー内蔵アクティブマトリクスパネルにおいて、以
下の構成を有することを特徴とするドライバー内蔵アク
ティブマトリクスパネル。 N本の走査線と2M本の信号線、及びM×N個の画素電
極と、各画素電極の1つにドレイン電極が、共通に接続
された2つのTFTを備え、前記の2つのTFTのゲー
ト電極は共通の走査線に接続され、ソース電極は隣接す
る2本の信号線に接続され、奇数列目の信号線と偶数列
目の信号線をそれぞれ独立に駆動できる内蔵ドライバー
を備えている。(1) A thin film transistor provided on an insulating substrate, including a plurality of data line groups, a plurality of scanning line groups, and a driver for driving at least one of the data line and the scanning line, and provided at an intersection of the data line and the scanning line. (hereinafter abbreviated as TFT)
An active matrix panel with a built-in driver comprising an array that drives pixel electrodes and drives a liquid crystal, the active matrix panel with a built-in driver having the following configuration. N scanning lines, 2M signal lines, M×N pixel electrodes, and two TFTs each having a drain electrode connected to one of the pixel electrodes in common. The gate electrode is connected to a common scanning line, the source electrode is connected to two adjacent signal lines, and it has a built-in driver that can independently drive the odd-numbered and even-numbered signal lines. .
FTはポリシリコン薄膜を用いて形成されることを特徴
とする特許請求の範囲第1項記載のドライバー内蔵アク
ティブマトリクスパネル。(2) T constituting the pixel TFT and built-in driver
2. The active matrix panel with a built-in driver according to claim 1, wherein the FT is formed using a polysilicon thin film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62288650A JPH01130131A (en) | 1987-11-16 | 1987-11-16 | Driver-containing active matrix panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62288650A JPH01130131A (en) | 1987-11-16 | 1987-11-16 | Driver-containing active matrix panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01130131A true JPH01130131A (en) | 1989-05-23 |
Family
ID=17732911
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62288650A Pending JPH01130131A (en) | 1987-11-16 | 1987-11-16 | Driver-containing active matrix panel |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01130131A (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0312637A (en) * | 1989-06-12 | 1991-01-21 | Matsushita Electron Corp | Manufacture of image display device |
| US5165075A (en) * | 1990-12-10 | 1992-11-17 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optic device having pairs of complementary transistors |
| US5193018A (en) * | 1991-10-28 | 1993-03-09 | Industrial Technology Research Institute | Active matrix liquid crystal display system using complementary thin film transistors |
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| US5956105A (en) * | 1991-06-14 | 1999-09-21 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method of driving the same |
| US6013928A (en) * | 1991-08-23 | 2000-01-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having interlayer insulating film and method for forming the same |
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-
1987
- 1987-11-16 JP JP62288650A patent/JPH01130131A/en active Pending
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| US7115902B1 (en) | 1990-11-20 | 2006-10-03 | Semiconductor Energy Laboratory Co., Ltd. | Electro-optical device and method for manufacturing the same |
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| WO2001011598A1 (en) * | 1999-08-05 | 2001-02-15 | Kabushiki Kaisha Toshiba | Flat display device |
| KR20190092427A (en) * | 2016-11-08 | 2019-08-07 | 엘비트 시스템스 엘티디. | Fault Tolerant Display |
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