JP7225052B2 - 電子部品モジュール - Google Patents
電子部品モジュール Download PDFInfo
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- JP7225052B2 JP7225052B2 JP2019140663A JP2019140663A JP7225052B2 JP 7225052 B2 JP7225052 B2 JP 7225052B2 JP 2019140663 A JP2019140663 A JP 2019140663A JP 2019140663 A JP2019140663 A JP 2019140663A JP 7225052 B2 JP7225052 B2 JP 7225052B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
- H01L2224/13014—Shape in top view being circular or elliptic
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- H—ELECTRICITY
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1412—Layout
- H01L2224/1413—Square or rectangular array
- H01L2224/14131—Square or rectangular array being uniform, i.e. having a uniform pitch across the array
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26165—Alignment aids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/83138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/8314—Guiding structures outside the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Description
図2(a)は、電子部品モジュール1の模式断面図であり、図2(b)は図2(a)に示す位置決め部品30の拡大断面図である。
図3は、電子部品20と基板10との接続部の模式断面図である。
Claims (8)
- 基板と、
前記基板の表面に設けられた複数の電極パッドと、
前記基板の表面に設けられた少なくとも1つの金属パッドと、
前記基板の前記表面に搭載される電子部品であって、前記複数の電極パッドの前記表面方向に対向し、且つ前記複数の電極パッドと電気接続される複数の対向電極を有する電子部品と、
前記金属パッドに固定された少なくとも1つの位置決め部品と、
を備え、
前記位置決め部品と前記電子部品の前記基板の前記表面面内方向の間隙が、前記複数の電極パッドの最小距離より短く、
前記位置決め部品の前記金属パッドに向き合う面に金属膜が設けられ、
前記位置決め部品がはんだで前記金属パッドに固定され、
前記金属パッドのサイズは、前記金属膜のサイズよりも小さい電子部品モジュール。 - 前記電極パッドと前記金属パッドが、同じ材料、且つ同じ厚さである請求項1に記載の電子部品モジュール。
- 前記金属パッドが、前記基板の前記表面に設けられた孤立パターンである、または半田レジストにより開口制限されている請求項2に記載の電子部品モジュール。
- 前記位置決め部品が、前記電子部品に向き合う側面と、上面と、前記側面と前記上面の間に設けられ前記側面および前記上面に対し傾斜した傾斜面と、を有する請求項1~3のいずれか1つに記載の電子部品モジュール。
- 基板と、
前記基板の表面に設けられた複数の電極パッドと、
前記基板の表面に設けられ、前記基板の前記表面において互いを結ぶ線が三角形を含む配置関係にある少なくとも3つの金属パッドと、
前記基板の前記表面に搭載される電子部品であって、前記複数の電極パッドの前記表面方向に対向し、且つ前記複数の電極パッドと電気接続される複数の対向電極を有する電子部品と、
前記金属パッドにそれぞれ固定された少なくとも3つの位置決め部品と、
を備え、
前記位置決め部品と前記電子部品の前記基板の前記表面面内方向の間隙が、前記複数の電極パッドの最小距離より短く、
前記位置決め部品の前記金属パッドに向き合う面に金属膜が設けられ、
前記位置決め部品がはんだで前記金属パッドに固定され、
前記金属パッドのサイズは、前記金属膜のサイズよりも小さい電子部品モジュール。 - 前記位置決め部品の側面が前記電子部品に向き合っている部分が3つ以上である請求項1~5のいずれか1つに記載の電子部品モジュール。
- 前記電子部品の前記複数の対向電極と、前記複数の電極パッドとの間に設けられ、前記複数の対向電極と前記複数の電極パッドとを電気接続する異方導電性部材をさらに備えた請求項1~6のいずれか1つに記載の電子部品モジュール。
- 前記電子部品を前記基板の前記表面に向けて押圧する押圧部材をさらに備えた請求項1~7のいずれか1つに記載の電子部品モジュール。
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JP2019140663A JP7225052B2 (ja) | 2019-07-31 | 2019-07-31 | 電子部品モジュール |
US16/808,522 US11239145B2 (en) | 2019-07-31 | 2020-03-04 | Electronic component module |
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JP2019140663A JP7225052B2 (ja) | 2019-07-31 | 2019-07-31 | 電子部品モジュール |
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JP2021027059A JP2021027059A (ja) | 2021-02-22 |
JP7225052B2 true JP7225052B2 (ja) | 2023-02-20 |
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CN114049845A (zh) * | 2021-11-23 | 2022-02-15 | Tcl华星光电技术有限公司 | 一种显示器的邦定方法及显示器 |
JP7597752B2 (ja) | 2022-03-10 | 2024-12-10 | 株式会社東芝 | 半導体モジュールアレイ装置 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000260904A (ja) | 1999-03-11 | 2000-09-22 | Sony Corp | 電子回路基板及び電子部品の実装方法 |
JP2001338944A (ja) | 2000-03-24 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 固定治具、固定治具付配線基板、及び電子部品実装体とその製造方法 |
JP2004259876A (ja) | 2003-02-25 | 2004-09-16 | Mitsubishi Electric Corp | パッケージの位置決め方法及びその装置 |
JP2010134082A (ja) | 2008-12-03 | 2010-06-17 | Advanced Photonics Inc | 部品の取付方法及びこれによって製造される装置 |
JP2011228335A (ja) | 2010-04-15 | 2011-11-10 | Mitsubishi Electric Corp | 半導体装置 |
JP2017069401A (ja) | 2015-09-30 | 2017-04-06 | 日亜化学工業株式会社 | 基板及び発光装置、並びに発光装置の製造方法 |
Family Cites Families (5)
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JPH11312759A (ja) * | 1997-10-24 | 1999-11-09 | Seiko Epson Corp | フェイスダウンボンディング用基板またはプリント配線板もしくはフレキシブル配線板またはその基板の形設方法 |
JP6076653B2 (ja) * | 2012-08-29 | 2017-02-08 | 新光電気工業株式会社 | 電子部品内蔵基板及び電子部品内蔵基板の製造方法 |
US9754870B2 (en) * | 2013-07-10 | 2017-09-05 | Kinsus Interconnect Technology Corp. | Compound carrier board structure of flip-chip chip-scale package and manufacturing method thereof |
US10438882B2 (en) * | 2017-03-29 | 2019-10-08 | Intel Corporation | Integrated circuit package with microstrip routing and an external ground plane |
JP6991782B2 (ja) | 2017-08-23 | 2022-01-13 | センサータ テクノロジーズ インコーポレーテッド | ソケット |
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- 2019-07-31 JP JP2019140663A patent/JP7225052B2/ja active Active
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Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000260904A (ja) | 1999-03-11 | 2000-09-22 | Sony Corp | 電子回路基板及び電子部品の実装方法 |
JP2001338944A (ja) | 2000-03-24 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 固定治具、固定治具付配線基板、及び電子部品実装体とその製造方法 |
JP2004259876A (ja) | 2003-02-25 | 2004-09-16 | Mitsubishi Electric Corp | パッケージの位置決め方法及びその装置 |
JP2010134082A (ja) | 2008-12-03 | 2010-06-17 | Advanced Photonics Inc | 部品の取付方法及びこれによって製造される装置 |
JP2011228335A (ja) | 2010-04-15 | 2011-11-10 | Mitsubishi Electric Corp | 半導体装置 |
JP2017069401A (ja) | 2015-09-30 | 2017-04-06 | 日亜化学工業株式会社 | 基板及び発光装置、並びに発光装置の製造方法 |
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US11239145B2 (en) | 2022-02-01 |
US20210035900A1 (en) | 2021-02-04 |
JP2021027059A (ja) | 2021-02-22 |
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