JP6927634B2 - Substrate for mounting semiconductor elements and its manufacturing method - Google Patents

Description

The present invention is manufactured by removing a metal plate from a resin encapsulant in which a region on which a semiconductor element is mounted is sealed with a sealing resin, and an external connection terminal composed of a plating layer exposed on the back surface side is a printed circuit board. The present invention relates to a substrate for mounting a semiconductor element used for manufacturing a semiconductor package of a type connected to an external device such as, and a manufacturing method thereof.

When incorporating a semiconductor device into an electronic device, visualization of the solder connection part is required so that the good or bad of the solder connection state between the external connection terminal of the semiconductor device and the external electronic device can be visually inspected. ing.

However, conventionally, a type of semiconductor package in which external connection terminals do not protrude from the outer periphery has a structure in which a plurality of external connection terminals arranged in an exposed state on the back surface side are connected to an external device such as a printed circuit board. Therefore, it was difficult to visually inspect whether or not the solder connection was normally performed.

However, if the solder connection portion cannot be visually inspected, the connection failure inherent in the solder connection work is overlooked, and the work cost until the connection failure is found in the subsequent energization inspection or the like is incurred. Further, although it is possible to perform a fluoroscopic inspection of the solder connection portion using an X-ray apparatus, that would increase the equipment cost of the X-ray apparatus.

Therefore, conventionally, as a technique for visually inspecting the quality of the solder connection state in the solder connection portion of the semiconductor package, for example, in the following Patent Document 1, the external connection on the back surface side of the lead in the lead frame is described. By forming a groove across the lead at the cutting position of the terminal portion to be the terminal portion, a space portion is provided over the end edge portion of the external connection terminal exposed on the back surface of the semiconductor package when individually cut. It has been proposed to make the solder connection portion visible from the edge portion of the external connection terminal exposed on the side surface of the semiconductor package by interposing the solder in the space portion.

Further, for example, in the following Patent Document 2, a recess is provided on the back surface of the lead frame, the front surface side is sealed with resin, and then a predetermined region including the recess is half-cut from the sealing resin side to form the recess. By forming a through hole in the provided part and then performing full-cut processing with a width narrower than the width of half-cut processing, the external connection terminal is projected sideways, and solder is applied to the lateral protrusion. It is described that through holes and slits are provided to make the connection portion visible.

Japanese Unexamined Patent Publication No. 2000-294715 Japanese Unexamined Patent Publication No. 2011-124284

In recent years, as represented by mobile phones, electronic devices have been rapidly reduced in size and weight, and semiconductor devices used in these electronic devices are also required to be smaller, lighter, and more sophisticated. In particular, the thickness of semiconductor devices. With regard to the above, thinning is required, and a semiconductor package of a type in which a metal plate is finally removed has been developed in place of a semiconductor device using a lead frame in which a metal plate is processed.

For example, a resist mask having a predetermined patterning is formed on one side surface of the metal plate, the metal plate exposed from the resist mask is plated, and the pad portion for mounting the semiconductor element is connected to the semiconductor element. A substrate for mounting a semiconductor element is manufactured by forming a terminal for internal connection and a terminal portion for connecting to an external device and then removing the resist mask. Then, the semiconductor element is mounted on the manufactured substrate for mounting the semiconductor element, and the resin is sealed after wire bonding or flip chip connection. After the resin is sealed, the metal plate is removed and the back surface of the sealing resin is coated with a plating layer. The pad and terminal parts are exposed to complete a thin semiconductor package.
According to this type of semiconductor package, the pad portion and the terminal portion are formed of a plating layer thinner than the metal plate, and the metal plate is removed, so that the thickness of the semiconductor package can be further reduced. ..

However, in the technique described in Patent Documents 1 and 2 for visually inspecting the good or bad of the solder connection state in the solder connection portion of the semiconductor package, the plating layer exposed on the back surface by removing the metal plate is external. It cannot be applied to a substrate for mounting a semiconductor element for manufacturing a type of semiconductor device that constitutes a terminal portion to be a connection terminal.
That is, in the techniques described in Patent Documents 1 and 2, the groove, the through hole, and the recess in the pre-stage for forming the slit for making the solder connection portion visible are etched on the lead frame made of a metal plate. It is done by pressing. However, in the case of a substrate for mounting a semiconductor element for manufacturing a semiconductor device of a type in which a plating layer exposed on the back surface by removing a metal plate constitutes a terminal portion serving as an external connection terminal, a patent document is provided for the plating layer. It is very difficult to form grooves and recesses by performing etching processing or press processing as in the techniques described in 1 and 2.

Moreover, in the technique described in Patent Document 1 in which a groove crossing a lead is formed at a cutting position of a terminal portion serving as an external connection terminal on the back surface side of the lead in the lead frame, the groove of the terminal portion is formed during resin sealing. Resin enters the space, and a space for making the solder connection portion visible is not formed, which may reduce the yield of the semiconductor package product.

Further, in the technique described in Patent Document 2, after resin sealing, two cutting steps of half-cut and full-cut using a blade are required, which results in poor production efficiency and an increase in cost. In addition, since the external connection terminal protrudes sideways, it is difficult to miniaturize the semiconductor package product.

As described above, in a semiconductor package of a type in which a plurality of external connection terminals exposed on the back surface side are connected to an external device such as a printed circuit board, a conventional technique for making a solder connection portion visible is a semiconductor package. The above-mentioned conventional technology is applied to a semiconductor package of a type in which there are problems in terms of product yield, production efficiency, and product miniaturization, and the terminal portion which is an external connection terminal exposed on the back surface side is a plating layer. It was difficult to use.

Further, in each of the techniques described in Patent Documents 1 and 2, in the state where the semiconductor package is manufactured, the surface of the terminal portion to be the external connection terminal forms a space portion for making the solder connection portion visible. (Patent Document 1) and the surface on which the through holes and slits are provided (Patent Document 2) are flush with the surface of the adjacent terminals and the surface of the sealing resin filled between the adjacent terminals. At the time of solder connection with a device, the solder easily wets and spreads beyond the terminal portion, and there is a concern that an electrical short circuit may occur due to solder bleeding at the solder connection portion between adjacent terminals.

The present invention has been made in view of the above-mentioned conventional problems, and is manufactured by removing a metal plate from a resin sealing body in which a region on which a semiconductor element is mounted is sealed with a sealing resin, and is manufactured on the back surface side. In a semiconductor device mounting substrate used for manufacturing a semiconductor package of the type in which an external connection terminal composed of an exposed plating layer is connected to an external device such as a printed circuit board, the yield of semiconductor package products and production efficiency are improved, and the size is reduced. Provided is a substrate for mounting a semiconductor element and a manufacturing method thereof, which can be used for plating, the solder connection portion can be visually observed, and electrical short circuit due to solder bleeding at the solder connection portion between adjacent terminals can be prevented. The purpose is to do.

In order to achieve the above object, the substrate for mounting a semiconductor element according to one aspect of the present invention has a plurality of convex portions on one side of the metal plate, which are smaller than the terminal size exposed on the back surface of the semiconductor package, and each of the convex portions. It is characterized by having a plurality of terminal portions made of a plating layer formed by forming a step at a predetermined position from the top surface of the portion to the side surface and the outer surface of the convex portion.

Further, the substrate for mounting a semiconductor element according to another aspect of the present invention is formed on one side of a metal plate with a plurality of convex portions exposed on the back surface of the semiconductor package, which are smaller than the terminal size, and a plating layer in the central portion. A plurality of terminals composed of a pad portion and a plating layer formed by providing a step at a predetermined position from the top surface to the side surface of each of the convex portions and the outer surface of the convex portion around the pad portion. It is characterized by having a part.

Further, in the substrate for mounting a semiconductor element of the present invention, it is preferable that each of the terminal portions is formed so as to surround the convex portion.

Further, in the substrate for mounting a semiconductor element of the present invention, the height of the convex portion is preferably 0.005 mm to 0.11 mm.

Further, in the method for manufacturing a substrate for mounting a semiconductor element according to the present invention, a predetermined region smaller than the terminal size in a portion corresponding to each terminal exposed on the back surface of the semiconductor package is formed on one side surface of the metal plate. A step of forming an etching resist mask that covers and has an opening around the metal plate, and forming an etching resist mask that covers the entire surface on the other side surface of the metal plate, and one side of the metal plate. A step of half-plating the metal plate to form a convex portion, a step of removing the resist mask for etching formed on one side surface of the metal plate, and a step of removing the resist mask for etching on one side surface of the metal plate. , A step of forming a resist mask for plating having openings in a plurality of regions corresponding to predetermined positions surrounding the convex portion, and plating the openings of the resist mask for plating from the top surface of the convex portion. It is characterized by having a step of forming a plurality of terminal portions having a step at a predetermined position over a side surface and an outer surface of the convex portion, and a step of removing a resist mask formed on both surfaces of the metal plate. There is.

Further, in the method for manufacturing a substrate for mounting a semiconductor element according to the present invention, a predetermined region smaller than the terminal size in a portion corresponding to each terminal exposed on the back surface of the semiconductor package is formed on one side surface of the metal plate. A step of forming a plating resist mask having an opening and forming a plating resist mask covering the entire surface on the other side surface of the metal plate, and the metal plate from one side of the metal plate. A step of plating the same metal to form a convex portion, a step of removing the plating resist mask formed on one side surface of the metal plate, and a step of removing the plating resist mask formed on one side surface of the metal plate. In addition, a step of forming a plating resist mask having openings in a plurality of regions corresponding to predetermined positions surrounding the convex portion and a plating process of a metal different from the metal plate are performed on the openings of the plating resist mask. A step of forming a plurality of terminal portions having steps at predetermined positions extending from the top surface of the convex portion to the side surface and the outer surface of the convex portion.
It is characterized by having a step of removing a resist mask formed on both surfaces of the metal plate.

According to the present invention, an external connection terminal made of a plating layer exposed on the back surface side, which is manufactured by removing a metal plate from a resin encapsulant in which a region on which a semiconductor element is mounted is sealed with an encapsulating resin. In a substrate for mounting a semiconductor element used for manufacturing a type of semiconductor package that is connected to an external device such as a printed circuit board, the yield and production efficiency of the semiconductor package product are improved, and it is possible to cope with miniaturization. A substrate for mounting a semiconductor element and a method for manufacturing the same can be obtained.

It is explanatory drawing which shows an example of the main part structure of the substrate for mounting a semiconductor element which concerns on one Embodiment of this invention, (a) is the sectional view which shows the structure of the terminal part, (b) is perpendicular to (a). A cross-sectional view showing the structure of the terminal part seen from the direction, (c) is a cross-sectional view showing the structure of the terminal part according to the modified example, and (d) shows the structure of the terminal part seen from the direction perpendicular to (c). A cross-sectional view, (e) is a top view showing an example of a multi-row semiconductor device mounting substrate in which the semiconductor element mounting substrates of (a) are arranged in multiple rows, and (f) is a semiconductor element mounting substrate of (a). It is explanatory drawing which shows one aspect which mounts a semiconductor element in, and (g) is explanatory drawing which shows the other aspect which mounts a semiconductor element on the substrate for mounting a semiconductor element of (a). It is explanatory drawing which shows an example of the main part structure of the substrate for mounting a semiconductor element which concerns on another Embodiment of this invention, (a) is the sectional view which shows the structure of the terminal part, (b) is perpendicular to (a). The cross-sectional view showing the structure of the terminal part seen from various directions, (c) is the cross-sectional view showing the structure of the terminal part according to the modified example, and (d) is the structure of the terminal part seen from the direction perpendicular to (c). The cross-sectional view shown, (e) is a top view showing an example of a multi-row semiconductor element mounting substrate in which the semiconductor element mounting substrates of (a) are arranged in multiple rows, and (f) is a top view showing an example of the semiconductor element mounting substrate of (a). It is explanatory drawing which shows one aspect which mounts a semiconductor element on a substrate. It is explanatory drawing which shows an example of the manufacturing procedure of the substrate for mounting a semiconductor element of FIG. 1A and FIG. 1B. It is explanatory drawing which shows an example of the manufacturing procedure of the substrate for mounting a semiconductor element of FIG. 1C and FIG. 1D. It is explanatory drawing which shows an example of the manufacturing procedure of the semiconductor package using the substrate for mounting a semiconductor element manufactured by the manufacturing procedure of FIG. It is explanatory drawing which shows the state when the semiconductor package manufactured using the semiconductor element mounting substrate of this invention is connected to an external substrate through solder step by step, and (a) shows the state before connection. The figure shown, (b) is a figure showing a state of being connected to solder, and (c) is a figure showing a state in which a semiconductor package is further crimped from the state of (b) and the solder reflowed by heating is wet and spread. d) is a view of the semiconductor package in the state of (c) viewed from the direction perpendicular to (c). It is an explanatory view which shows an example of the prior art for making the solder connection part of a semiconductor package visible, (a) is a view from the side which connects with the external device of the lead frame used for a semiconductor package, and (b) is (a). (A) AA cross-sectional view of a semiconductor package assembled using the lead frame of (), (c) is a diagram showing a state in which the external connection terminal of the semiconductor package of (b) is solder-connected to an external device, (. d) is a cross-sectional view taken along the line BB showing a terminal portion serving as an external connection terminal in the lead frame of (a).

Prior to the description of the embodiment, the background leading to the derivation of the present invention and the action and effect of the present invention will be described.
First, the present inventor examined and considered the technique described in Patent Document 1, which is a conventional technique for making a solder connection portion of a semiconductor package visible.
The technique described in Patent Document 1 will be described with reference to FIG. In FIG. 7, (a) is a view from the side where the lead frame used for the semiconductor package is connected to an external device, and (b) is AA of (a) in the semiconductor package assembled using the lead frame of (a). A cross-sectional view, (c) is a diagram showing a state in which the external connection terminal of the semiconductor package of (b) is solder-connected to an external device, and (d) is a terminal portion that is an external connection terminal in the lead frame of (a). It is a cross-sectional view of BB shown.

The lead frame used for the semiconductor package shown in FIG. 7 (a) is located at the cutting position (position on the one-point chain line in FIG. 7 (a)) of the terminal portion 51 which is the terminal for external connection on the back surface side of the lead in the lead frame. The groove 51b that crosses the lead is formed by etching or pressing a lead frame made of a metal plate such as an Fe—Ni alloy or a Cu alloy. In FIG. 7A, 52 is a pad portion on which a semiconductor element is mounted, and 60 is a semiconductor element.
Then, the semiconductor element 60 is mounted on the pad portion 52 of the lead frame, the terminal portion serving as the internal connection terminal on the mounting side of the semiconductor element 60 in the lead and the semiconductor element 60 are connected by the bonding wire 61, and the semiconductor element mounting side is sealed. As shown in FIG. 7 (b), by cutting the semiconductor package sealed with the stop resin 70 along the cutting position, the external connection terminals of the leads exposed on the back surface of the individually cut semiconductor package. A space portion 51a is provided in the 51 over the edge portion.
As shown in FIG. 7C, in the state where the semiconductor package thus formed is solder-connected to the terminal 81 of the external device 80, the solder 90 is formed from the back surface to the edge portion of the external connection terminal 51. It intervenes in the space portion 51a. Therefore, the solder connection portion of the external connection terminal 51 exposed on the side surface of the semiconductor package can be visually confirmed, and the quality or defect of the solder connection state of the semiconductor package with the external device 80 can be visually inspected.

By the way, in the technique described in Patent Document 1, a groove 51b crossing a lead for making a solder connection portion visible is etched or pressed on a lead frame made of a metal plate such as an Fe—Ni alloy or a Cu alloy. It is formed by processing.
However, in the case of a substrate for mounting a semiconductor element for manufacturing a semiconductor package of a type in which a plating layer exposed on the back surface by removing a metal plate constitutes a terminal portion that functions as an external connection terminal, etching is performed on the plating layer. It is very difficult to form a groove by processing or pressing.
Further, as in the technique described in Patent Document 1, if a groove 51b that crosses the lead is formed at the cutting position of the terminal portion that becomes the external connection terminal 51 on the back surface side of the lead in the lead frame, the groove 51b that crosses the lead is formed in the assembly of the semiconductor package. At the time of resin sealing, there is a possibility that the resin enters the groove 51b of the terminal portion and the space portion 51a for making the solder connection portion visible is not formed.
That is, when a groove 51b that crosses the lead is formed in the terminal portion 51 that serves as the external connection terminal on the back surface side of the lead in the lead frame, the terminal portion 51 that serves as the external connection terminal is located at the cutting position in FIG. 7 (d). As shown in the above, the width direction of the lead is formed to be thin throughout. Generally, when the semiconductor element mounting side of the lead frame is resin-sealed, a sheet-shaped tape is attached to the back surface of the lead frame to prevent the resin from entering the groove on the back surface of the lead frame. However, since the outer portion of the groove 51b along the width direction of the lead does not have a surface in close contact with the sheet-shaped tape, the outer portion of the groove 51b along the width direction of the lead is separated from the sheet-shaped tape. Here, even if an attempt is made to bring the sheet-shaped tape into close contact with the surface of the groove 51b, the sheet-shaped tape is greatly deformed, and it is difficult to completely bring the sheet-shaped tape into close contact with the groove 51b. Gap is likely to occur on the surface. As a result, when the resin is sealed, the resin wraps around from the gap between the sheet-shaped tape and the surface of the groove 51b, and the resin enters the groove 51b of the terminal portion 51, so that the solder connection portion can be visually inspected. Spaces are not formed, and the yield of semiconductor package products may deteriorate.

Next, the technique described in Patent Document 2 is also a step before forming through holes and slits in order to make the solder connection portion visible by pressing a lead frame made of a patterned metal plate. In the case of a substrate for mounting a semiconductor element for manufacturing a semiconductor device of the type in which the concave portion of the above is formed, but the metal plate is removed and the plating layer exposed on the back surface side serves as a terminal for external connection. , It is very difficult to form a recess by pressing the plating layer.
Further, after sealing the resin, two cutting steps of half-cut and full-cut using a blade are required, which results in poor production efficiency and an increase in cost. Moreover, since the external connection terminal protrudes in the lateral direction, it is difficult to miniaturize the semiconductor package product.

Further, the one described in Patent Document 1 is a space for making the solder connection portion of the terminal portion 51, which is the terminal for external connection, visible in the final form of the semiconductor device, as shown in FIG. 7 (b). The surface forming the portion 51b is flush with the surface of the space portion 51b of the adjacent terminal portions and the surface of the sealing resin 70 filled between them. Further, in the semiconductor device of the final form, the surface provided with the through hole or the slit is the surface of the adjacent terminals and the surface of the sealing resin filled between the adjacent terminals. It will be flush. For this reason, when the solder is connected to an external device, the solder easily wets and spreads beyond the terminal portion, and there is a concern that an electrical short circuit may occur due to solder bleeding at the solder connection portion between adjacent terminals.

Therefore, the present inventor is an external connection terminal made of a plating layer exposed on the back surface side, which is manufactured by removing a metal plate from a resin encapsulant in which a region on which a semiconductor element is mounted is sealed with a sealing resin. Is used for manufacturing semiconductor device mounting substrates that are connected to external devices such as printed circuit boards. The yield and production efficiency of semiconductor package products are improved, and miniaturization is possible. In order to make the parts visible and to prevent electrical short circuits due to solder bleeding at the solder connection parts between adjacent terminals, trial and error are repeated to manufacture the semiconductor element mounting substrate of the present invention and its manufacture. We have come up with a method.

The substrate for mounting a semiconductor element according to one aspect of the present invention has a plurality of convex portions on one side of the metal plate, which are smaller than the terminal size exposed on the back surface of the semiconductor package, and the top surface to the side surface and the convex portion of each convex portion. It has a plurality of terminal portions made of a plating layer formed by forming a step at a predetermined position over the outer surface of the portion.
Further, the substrate for mounting a semiconductor element according to another aspect of the present invention is formed on one side of a metal plate with a plurality of convex portions exposed on the back surface of the semiconductor package, which are smaller than the terminal size, and a plating layer in the central portion. It has a pad portion and a plurality of terminal portions made of a plating layer formed by stepping at predetermined positions from the top surface of each convex portion to the side surface and the outer surface of the convex portion around the pad portion. ..

Like the substrate for mounting a semiconductor element of the present invention, on one side of the metal plate, a plurality of convex portions smaller than the terminal size exposed on the back surface of the semiconductor package, and the top surface to the side surface and the side surface of each of the convex portions. A semiconductor package can be manufactured using the substrate for mounting a semiconductor element of the present invention if it is configured to have a plurality of terminal portions made of a plating layer formed by forming a step at a predetermined position over the outer surface of the convex portion. In this case, the external connection terminal portion on the back surface of the terminal portion made of a plating layer exposed by removing the metal plate from the resin encapsulant in which the region where the semiconductor element is mounted is sealed with a sealing resin is a semiconductor package. It is formed in a shape having a step from the bottom surface to the side surface, and a space portion is provided in the step portion on the side surface side. Therefore, when the semiconductor package is connected to the external substrate via solder, the solder melted by the reflow wets and spreads in the space provided by forming the step of the external connection terminal portion. As a result, it is manufactured by removing the metal plate from the resin encapsulant in which the region where the semiconductor element is mounted is sealed with the encapsulating resin, and the external connection terminal composed of the plating layer exposed on the back surface side is a printed circuit board or the like. Even if it is a substrate for mounting a semiconductor element used for manufacturing a semiconductor package of a type that is connected to an external device, the state of solder connection when the semiconductor package is connected to the external substrate via solder is shown on the side surface of the semiconductor package. It can be visually confirmed from the side of the edge portion of the external connection terminal composed of the plating layer exposed to the surface.

Further, if it is configured like the substrate for mounting a semiconductor element of the present invention, a plurality of terminal portions composed of plated layers formed with steps are formed from the top surface of the convex portion of the metal plate to the side surface and the outer side of the convex portion. Adhere without gaps over the surface. Therefore, unlike the groove portion in the technique described in Patent Document 1, there is no possibility that the resin enters the groove portion of the terminal portion during resin sealing and the yield of the semiconductor package product is deteriorated.

Further, if it is configured like the substrate for mounting a semiconductor element of the present invention, unlike the technique described in Patent Document 2, it is not necessary to perform two cutting steps of half-cut and full-cut using a blade after resin sealing. Therefore, the production efficiency is good and the cost can be reduced. Further, since the external connection terminal does not protrude sideways, the semiconductor package product can be easily miniaturized.

Further, in the semiconductor element mounting substrate of the present invention, when a semiconductor package is manufactured using the semiconductor element mounting substrate of the present invention by forming each terminal portion so as to surround the convex portion, the semiconductor element is formed. External connection on the back surface of the terminal portion consisting of a plating layer exposed by removing the metal plate (or the metal forming the metal plate and the convex portion) from the resin encapsulant in which the mounted region is sealed with the sealing resin. The cross-sectional shape of the space portion of the terminal when cut to the dimensions of each semiconductor package is the gate shape. Then, when the semiconductor package is solder-connected to an external device, the wall surface surrounding the space portion forming the gate shape causes the solder spread wet from the back surface of the external connection terminal to the space portion to the adjacent external connection terminal side. It becomes easier to prevent the spread of wetness. As a result, it is possible to prevent an electrical short circuit due to solder bleeding at the solder connection portion between adjacent terminals.

In the semiconductor element mounting substrate of the present invention, the surface on the semiconductor element mounting side of each terminal portion formed of a plated layer formed with a step is an internal connection terminal portion connected to the electrode of the semiconductor element. However, both the upper and lower regions of the respective terminal portions made of the stepped plating layer can be connected to the electrodes of the semiconductor element.
For example, a semiconductor element can be flip-chip mounted on both the lower and upper surfaces of each terminal portion composed of a stepped plating layer.
When a semiconductor element is flip-chip mounted on the lower surface of each terminal portion composed of a plated layer having a step, the thickness of the semiconductor package can be reduced by the step of the plating layer.
Further, when the semiconductor element is flip-chip mounted on the upper surface of each terminal portion composed of the plated layer having a step, in the case of the configuration provided with the pad portion, the space between the surface of the pad portion and the semiconductor element is created. It can be sufficiently secured, and when sealed with the sealing resin, a thick layer of the sealing resin that wraps around the back surface side of the semiconductor element can be formed, and a wide adhesion area between the sealing resin and the plating layer can be secured. The connection strength between the sealing resin and the terminal portion can be kept high. As a result, the insulation is improved and it becomes difficult to pick up noise.
Further, in the semiconductor device mounting substrate of the present invention, for example, a pad portion formed of a plating layer is provided in the central portion, and extends from the top surface of the convex portion to the side surface and the outer surface of the convex portion around the pad portion. A plurality of terminal portions composed of plating layers formed with steps are provided at predetermined positions, a semiconductor element is mounted on the surface of the pad portion, and the electrodes of the semiconductor element and the upper surface of each terminal portion are wire-bonded. It may be possible to connect by.

Further, in the substrate for mounting a semiconductor element of the present invention, the height of the convex portion is preferably 0.005 mm to 0.11 mm.

For example, if the height of the convex portion is formed to be about 0.005 mm to 0.025 mm, the plating layer such as the terminal portion formed on the outer surface of the convex portion greatly protrudes from the back surface of the semiconductor package. Therefore, in the manufacture of the semiconductor package, when the metal plate is peeled off and removed from the sealing resin body, it is possible to prevent the plating layer formed on the outer surface of the convex portion from being caught on the metal plate, and the metal plate is pulled. It becomes easy to peel off.

Further, for example, if the height of the convex portion is formed to be about 0.03 mm to 0.06 mm, the space with the surface such as the pad portion on the back surface side of the semiconductor element after mounting the semiconductor element can be prevented from noise. Improves insulation to make it difficult to pick up noise) and measures against solder bleeding (when a semiconductor element is solder-connected to a plating layer such as a terminal formed on the top surface of a convex portion, the surface of the plating layer and the semiconductor element When the semiconductor package is solder-connected to an external device, it prevents the solder from spreading to the entire area of the plating layer other than the bonding point, prevents the adhesion between the plating layer surface and the sealing resin from being hindered, and when the semiconductor package is solder-connected to an external device. , Prevent the spread of solder wet to the adjacent terminal side and prevent electrical short circuit) can be secured to the extent possible.

Further, for example, if the height of the convex portion is formed to be about 0.08 mm to 0.11 mm, the external connection terminal on the back surface of the terminal portion having a step is provided on the step portion on the side surface side of the semiconductor package. , The area of the space where the solder can intervene increases in the thickness direction of the semiconductor package. As a result, it becomes easier to observe the solder connection state between the external connection terminal and the external device after the semiconductor package is manufactured.
Further, if the height of the convex portion is formed to be about 0.08 mm to 0.11 mm by half-etching the metal plate, the depth of the half-etching performed to form the convex portion is obtained. The volume of the metal plate to be dissolved becomes larger when the metal plate forming the base material is removed by dissolving the chemical solution after mounting the semiconductor element in the manufacturing process of the semiconductor package and sealing with the sealing resin. Less. As a result, it is possible to suppress an increase in the concentration of the metal plate component dissolved in the chemical solution and maintain a stable dissolved state, and to adjust the chemical solution (pumping out a solution having a high concentration of the metal plate component and replenishing a new solution). Can be reduced.

Further, the substrate for mounting a semiconductor element of the present invention may have a plurality of convex portions having different heights in one semiconductor package region.
Further, in the substrate for mounting a semiconductor element of the present invention, the top surface of the convex portion may have a step, and the terminal portion may have three or more surfaces having different heights.
If the terminal portion has three or more surfaces having different heights, when the semiconductor package is solder-connected to an external device, the solder is guided to the widest space area through the surface having a plurality of steps, and the most. It becomes easy to keep the solder intervened in a wide space area. As a result, measures against solder bleeding (when the semiconductor element is solder-connected to the plating layer serving as the terminal portion, the wet spread of the solder over the entire plating layer other than the bonding point between the plating layer surface and the semiconductor element is stopped, and the plating layer surface Prevents the adhesion between the and the sealing resin from being hindered, and prevents the solder from spreading to the adjacent terminals when the semiconductor package is soldered to an external device, preventing an electrical short circuit. To).

The substrate for mounting a semiconductor element according to one aspect of the present invention has a predetermined size smaller than the terminal size at a portion corresponding to each terminal exposed on the back surface of the semiconductor package on one side surface of the metal plate. A step of forming an etching resist mask that covers a region and has an opening around the region, and forming an etching resist mask that covers the entire surface on the other side surface of the metal plate, and one side of the metal plate. Half-etching from the top to form a convex portion, a step of removing the resist mask for etching formed on one side surface of the metal plate, and a convex portion on one side surface of the metal plate. A step of forming a resist mask for plating having openings in a plurality of regions corresponding to predetermined positions surrounding the protrusion, and a plating process is performed on the openings of the resist mask for plating, from the top surface of the convex portion to the side surface and the outside of the convex portion. It can be manufactured by having a step of forming a plurality of terminal portions having a step at a predetermined position over the surface of the metal plate and a step of removing a resist mask formed on both sides of the metal plate.

Further, the substrate for mounting a semiconductor element according to another aspect of the present invention has a predetermined region smaller than the terminal size in a portion corresponding to each terminal exposed on the back surface of the semiconductor package on one side surface of the metal plate. A step of forming a plating resist mask having an opening and forming a plating resist mask covering the entire surface on the other side surface of the metal plate, and a step of forming the same metal as the metal plate from one side of the metal plate. A step of performing plating to form a convex portion, a step of removing a plating resist mask formed on one side surface of the metal plate, and a step of surrounding the convex portion on one side surface of the metal plate. A process of forming a plating resist mask having openings in a plurality of regions corresponding to predetermined positions and a metal plating process different from that of a metal plate are applied to the openings of the plating resist mask, from the top surface to the side surface of the convex portion. It can be manufactured by having a step of forming a plurality of terminal portions having a step at a predetermined position over the outer surface of the convex portion, and a step of removing the resist mask formed on both surfaces of the metal plate.

Therefore, according to the present invention, it is manufactured by removing a metal plate from a resin sealing body in which a region on which a semiconductor element is mounted is sealed with a sealing resin, and is for external connection composed of a plating layer exposed on the back surface side. In a substrate for mounting a semiconductor element used for manufacturing a semiconductor package in which terminals are connected to an external device such as a printed circuit board, the yield of semiconductor package products, production efficiency are improved, miniaturization is possible, and soldering is possible. A substrate for mounting a semiconductor element and a method for manufacturing the same can be obtained, in which the connection portion can be visually observed, and further, electrical short circuit due to solder bleeding at the solder connection portion between adjacent terminals can be prevented.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.

FIG. 1 is an explanatory view showing an example of a configuration of a main part of a semiconductor device mounting substrate according to an embodiment of the present invention, (a) is a cross-sectional view showing a structure of a terminal portion, and (b) is a cross-sectional view with respect to (a). A cross-sectional view showing the structure of the terminal part seen from the direction perpendicular to the vertical direction, (c) is a cross-sectional view showing the structure of the terminal part according to the modified example, and (d) is a cross-sectional view showing the structure of the terminal part seen from the direction perpendicular to (c). A cross-sectional view showing the structure, (e) is a top view showing an example of a multi-row semiconductor device mounting substrate in which the semiconductor element mounting substrates of (a) are arranged in multiple rows, and (f) is a top view showing an example of the semiconductor element mounting substrate of (a). An explanatory view showing one mode in which a semiconductor element is mounted on a mounting substrate, and (g) is an explanatory diagram showing another mode in which a semiconductor element is mounted on the mounting substrate for a semiconductor element in (a). 2A and 2B are explanatory views showing an example of a configuration of a main part of a semiconductor device mounting substrate according to another embodiment of the present invention, in which FIG. 2A is a cross-sectional view showing the structure of a terminal portion, and FIG. 2B is shown in FIG. A cross-sectional view showing the structure of the terminal portion viewed from a direction perpendicular to the direction, (c) is a cross-sectional view showing the structure of the terminal portion according to the modified example, and (d) is a cross-sectional view showing the structure of the terminal portion viewed from a direction perpendicular to (c). (E) is a top view showing an example of a multi-row semiconductor device mounting substrate in which the semiconductor element mounting substrates of (a) are arranged in multiple rows, and (f) is a top view showing an example of the semiconductor element mounting substrate of (a). It is explanatory drawing which shows one mode which mounts a semiconductor element on the element mounting substrate.

The semiconductor element mounting substrate 1 of the present embodiment has, for example, a plurality of convex portions 11 and a plurality of terminal portions 12, as shown in FIGS. 1 (a) and 1 (b), and has a plurality of terminal portions 12 and is shown in FIG. 1 (e). ), It is arranged in multiple columns.
The convex portion 11 is formed on one side surface 10a of the metal plate 10 and has a size smaller than the terminal size exposed on the back surface of the semiconductor package manufactured by using the semiconductor element mounting substrate 1.
Further, in the examples of FIGS. 1A and 1B, the convex portion 11 is formed by half-etching the surface 10a on one side of the metal plate 10.
As shown in FIGS. 1 (c) and 1 (d), the convex portion is plated with the same metal 13 (for example, Cu) as the metal plate 10 on the surface 10a on one side of the metal plate 10. It may be configured as a convex portion 11'formed by applying.
The terminal portion 12 surrounds the convex portion 11 by providing a step at a predetermined position from the top surface 11a of the convex portion 11 to the side surface 11b and the outer surface of the convex portion 11 (that is, the surface 10a on one side of the metal plate 10). It is composed of a plating layer formed as described above.
Then, as shown in FIGS. 1 (f) and 1 (g), the plurality of terminal portions 12 are connected to the lower stage of the terminal portions 12 (example of FIG. 1 (f)) or through connecting members such as solder 15. The semiconductor element 20 can be flip-chip mounted on the upper stage of the terminal portion 12 (example of FIG. 1 (g)).

In the example of FIG. 1, the semiconductor element mounting substrate 1 of the present embodiment is arranged in such a manner that the terminal portions 12 of the adjacent semiconductor package regions (regions surrounded by broken lines in FIG. 1 (e)) are separated from each other. However, it may be arranged in such a manner that the terminal portions of the adjacent semiconductor package regions are connected to each other.
Further, as shown in FIGS. 2 (a) and 2 (b) (or FIGS. 2 (c) and 2 (d)), the substrate for mounting the semiconductor element according to the embodiment of the present invention is located at the center of. From the top surface 11a (or top surface 11a') to the side surface 11b (or side surface 11b') of the pad portion 14 formed of the plating layer and the convex portion 11 (or the convex portion 11') around the pad portion 14 and each of the convex portions 11 (or the convex portion 11'). ) And the convex portion 11 (or the convex portion 11') over the outer surface (that is, the surface 10a on one side of the metal plate 10). It has terminal portions 12 and is arranged in multiple rows as shown in FIG. 2 (e). As shown in FIG. 2 (f), a semiconductor element 20 is mounted on a pad portion 14, and a connecting member such as a bonding wire 16 is mounted. It may be configured so that the upper stage of the terminal portion 12 and the semiconductor element 20 can be wire-bonded via the above.

In addition, in the semiconductor element mounting substrate 1 of the present embodiment, the height of the convex portion 11 is preferably formed to be 0.005 to 0.11 mm.
Further, the semiconductor element mounting substrate 1 of the present embodiment may have a plurality of convex portions 11 having different heights in one semiconductor package region.
Further, in the semiconductor element mounting substrate 1 of the present embodiment, the top surface 11a of the convex portion 11 has a step, and the terminal portion 12 has three or more surfaces having different heights. There may be.

Next, FIG. 3 shows an example of a manufacturing process of the semiconductor device mounting substrate 1 of the present embodiment, which is configured as shown in FIGS. 1 (a), 1 (b), 1 (c), and 1 (d). (One example) and FIG. 4 (another example) will be described respectively. For convenience, the description of pretreatment and posttreatment including chemical washing and washing with water, which are carried out in each manufacturing process, will be omitted.
In the manufacturing process of the example of FIG. 3, first, a copper or copper alloy metal plate 10 is prepared as a lead frame material (see FIG. 3A).
Next, the metal plate 10 is half-etched to form the convex portion 11. Specifically, a first resist layer R1 such as a dry film resist is formed on both surfaces of the metal plate 10 (see FIG. 3B). Next, using a glass mask on which a predetermined pattern corresponding to the convex portion 11 shown in FIGS. 1 (a) and 1 (b) is drawn, the first resist layer R1 on one side of the metal plate 10 is formed. Upon exposure, the first resist layer R1 on the other side of the metal plate 10 is exposed over the entire surface, and each first resist layer R1 is developed after the exposure. Then, on one side surface of the metal plate 10, a predetermined region smaller than the terminal size in the portion corresponding to each terminal exposed on the back surface of the semiconductor package is covered, and an etching resist mask having an opening around the predetermined region is covered. 31 is formed, and an etching resist mask 31 covering the entire surface is formed on the other side surface of the metal plate 10 (see FIG. 3C). Next, half-etching is performed from one side of the metal plate 10 to form the convex portion 11 (see FIG. 3D). Next, the etching resist mask 31 formed on one side surface of the metal plate 10 is removed (see FIG. 3 (e)).

Next, on one side of the metal plate 10, the plating layer is formed at a predetermined position from the top surface 11a of the convex portion 11 to the side surface 11b and the outer surface of the convex portion 11 (the surface 10a on one side of the metal plate 10). A plurality of terminal portions 12 are formed. Specifically, a second resist layer R2 such as a dry film resist is formed on one side surface of the metal plate 10 (see FIG. 3 (f)). Next, using a glass mask on which a predetermined pattern corresponding to the terminal portion 12 shown in FIGS. 1 (a) and 1 (b) is drawn, the second resist layer R2 on one side of the metal plate 10 is formed. It is exposed and the second resist layer R2 is developed after the exposure. Then, on one side surface of the metal plate 10, the convex portion 11 is surrounded, and from the top surface 11a of the convex portion 11 to the side surface 11b and the outer surface of the convex portion 11 (one side surface 10a of the metal plate 10). A plating resist mask 32 having openings in a plurality of regions corresponding to the respective terminal portions 12 is formed (see FIG. 3 (g)). Next, the opening of the resist mask 32 for plating is plated in the order of, for example, Au, Pd, Ni, and Pd, from the top surface 11a to the side surface 11b of the convex portion 11 and the outer surface (metal plate) of the convex portion 11. A plurality of terminal portions 12 having a step at a predetermined position over the surface 10a) on one side of the 10 are formed (see FIG. 3 (h)).
The surface of the plating layer should be roughened. When the surface of the plating layer is roughened, for example, the formation of the plating layer may be completed by Ni plating, and the Ni plating layer may be formed by rough plating. Further, for example, after forming a smooth Ni plating layer, the surface of the Ni plating layer may be roughened by etching. Further, for example, the formation of the plating layer may be completed by Cu plating, and the surface of the Cu plating layer may be roughened by anodizing treatment or etching. Further, for example, the Pd / Au plating layer may be laminated in order after the roughened plating layer is formed.
Next, the resist masks 31 and 32 formed on both sides of the metal plate 10 are removed (see FIG. 3 (i)).
As a result, the semiconductor element mounting substrate 1 of the present embodiment shown in the examples of FIGS. 1A and 1B is completed.

In the manufacturing process of the example of FIG. 4, the metal plate 10 is prepared as the lead frame material as in the example of FIG. 3 (see FIG. 4A), and then the metal plate 10 is plated to form the convex portion 11'. Form. Specifically, a first resist layer R1 such as a dry film resist is formed on both surfaces of the metal plate 10 (see FIG. 4B). Next, using a glass mask on which a predetermined pattern corresponding to the convex portion 11'shown in FIGS. 1 (c) and 1 (d) is drawn, the first resist layer R1 on one side of the metal plate 10 is used. The first resist layer R1 on the other side of the metal plate 10 is exposed over the entire surface, and each first resist layer R1 is developed after the exposure. Then, a resist mask 31'for plating having an opening in a predetermined region smaller than the terminal size in the portion corresponding to each terminal exposed on the back surface of the semiconductor package is formed on one side surface of the metal plate 10. At the same time, a resist mask 31'for plating covering the entire surface is formed on the other side surface of the metal plate 10 (see FIG. 4 (c)). Next, the same metal 13 (here, Cu) as the metal plate 10 is plated from one side of the metal plate 10 to form a convex portion 11'(see FIG. 4D). Next, the plating resist mask 31'formed on one side surface of the metal plate 10 is removed (see FIG. 4 (e)).
After that, the terminal portion 12 is formed by substantially the same procedure as the example of FIG. 3 (see FIGS. 4 (f) to 4 (h)), and then the resist mask 31', which is formed on both sides of the metal plate 10. 32 is removed (see FIG. 4 (i)).
As a result, the semiconductor element mounting substrate 1 of the present embodiment shown in the examples of FIGS. 1 (c) and 1 (d) is completed.

Next, a procedure for manufacturing a semiconductor package using the semiconductor element mounting substrate 1 of the present embodiment will be described with reference to FIG. Here, for convenience, the semiconductor element mounting substrate 1 shown in the examples of FIGS. 1 (a) and 1 (b) will be used for description.
First, the semiconductor element 20 is flip-chip connected to the internal connection terminal portion on the surface of the terminal portion 12 via a solder 15 or the like (see FIG. 5A).
Next, a mold mold (not shown) is set, and the semiconductor element mounting side is sealed with the sealing resin 21 (see FIG. 5 (b)).
Next, the metal plate 10 is removed (see FIG. 5 (c)) and cut to the dimensions of a predetermined semiconductor package (see FIG. 5 (d)). As a result, the semiconductor package 40 using the semiconductor element mounting substrate 1 of the present embodiment is completed (see FIG. 5 (e)). At this time, a space is formed in the stepped portion on the side surface of the external connection terminal. Further, the cross-sectional shape of the space portion when cut to the dimensions of each semiconductor package 40 is a gate shape (see FIG. 5 (f)).

According to the semiconductor element mounting substrate 1 of the present embodiment, on one side of the metal plate 10, a plurality of convex portions 11 smaller than the terminal size exposed on the back surface of the semiconductor package 40, and the apex of each convex portion 11 It has a plurality of terminal portions 12 made of a plating layer formed by forming a step at a predetermined position from the surface 11a to the side surface 11b and the outer surface of the convex portion (that is, the surface 10a on one side of the metal plate 10). For external connection of the back surface of the terminal portion 12 composed of a plating layer exposed by removing the metal plate 10 from the resin encapsulant in which the region on which the semiconductor element 20 is mounted is sealed with the encapsulating resin 21. The terminals are formed in a shape having a step from the bottom surface to the side surface of the semiconductor package 40, and a space portion is provided in the step portion on the side surface side. Therefore, when the semiconductor package 40 is manufactured using the semiconductor element mounting substrate 1 of the present embodiment, for example, as shown in FIGS. 6A to 6C, the semiconductor package 40 is used as an external device (for example,). , When the solder is connected to the printed circuit board 80) via the solder 90, the solder melted by the reflow wets and spreads in the space provided by forming a step in the external connection terminal portion on the back surface of the terminal portion 12. .. As a result, an external connection terminal made of a plating layer exposed on the back surface side, which is manufactured by removing the metal plate 10 from the resin encapsulant in which the region on which the semiconductor element 20 is mounted is sealed with the encapsulating resin 21, is formed. Even if it is a substrate for mounting a semiconductor element used for manufacturing a semiconductor package of a type connected to an external device such as a printed circuit board, the semiconductor package 40 is connected to the external device (for example, a printed circuit board 80) via a solder 90. The solder connection state at that time can be visually confirmed from the side of the edge portion of the external connection terminal made of the plating layer exposed on the side surface of the semiconductor package 40.

Further, according to the semiconductor element mounting substrate 1 of the present embodiment, the plurality of terminal portions 12 formed of the plated layers formed with steps are the top surface 11a to the side surface 11b and the convex surface 11b of the convex portion 11 of the metal plate 10. It adheres to the outer surface of the portion 11 without a gap. Therefore, unlike the groove portion in the technique described in Patent Document 1, there is no possibility that the sealing resin gets into the groove of the terminal portion and the yield of the semiconductor package product is deteriorated at the time of resin sealing.

Further, according to the semiconductor element mounting substrate 1 of the present embodiment, unlike the technique described in Patent Document 2, two cutting steps of half-cut and full-cut using a blade are not required after resin sealing. Yes, the production efficiency is good, and the cost can be reduced. Further, since the external connection terminal does not protrude sideways, the semiconductor package product can be easily miniaturized.

Further, according to the semiconductor element mounting substrate 1 of the present embodiment, since each terminal portion 12 is formed so as to surround the convex portion 11, the semiconductor package can be assembled by using the semiconductor element mounting substrate 1 of the present embodiment. In the case of manufacturing, the metal plate 10 (or the metal 13 forming the metal plate 10 and the convex portion 11') is removed from the resin encapsulant in which the region on which the semiconductor element 20 is mounted is sealed with the encapsulating resin 21. The cross-sectional shape of the space portion of the external connection terminal on the back surface of the terminal portion 12 made of the plating layer exposed by the above, when cut into individual package regions, is a gate shape. Then, when the semiconductor package 40 is solder-connected to an external device (for example, the printed circuit board 80), the external connection terminal is formed by the wall surface surrounding the space portion forming the gate shape, for example, as shown in FIG. 6 (d). It becomes easy to prevent the solder that has spread from the back surface of the solder to the adjacent external connection terminal side. As a result, it is possible to prevent an electrical short circuit due to solder bleeding at the solder connection portion between adjacent terminals.

Further, in the semiconductor element mounting substrate 1 of the present embodiment, as shown in FIG. 1 (f), the semiconductor element 20 is flip-chip mounted on the lower surface of each terminal portion 12 composed of a stepped plating layer. Then, the thickness of the semiconductor package can be reduced by the step difference of the plating layer.

Further, in the semiconductor element mounting substrate 1 of the present embodiment, as shown in FIG. 1 (g), the semiconductor element 20 is flip-chip mounted on the upper surface of each terminal portion 12 composed of a plated layer having a step. Therefore, when sealed with the sealing resin 21, the layer of the sealing resin 21 that wraps around the back surface side of the semiconductor element 20 can be formed thickly, and the adhesion area between the sealing resin 21 and the plating layer can be secured widely. The connection strength between the sealing resin 21 and the terminal portion 12 can be kept high. Further, in the case of the configuration including the pad portion 14, a sufficient space can be secured between the surface of the pad portion 14 and the semiconductor element 20. Further, when sealed with the sealing resin 21, the layer of the sealing resin 21 that wraps around the back surface side of the semiconductor element 20 can be formed thick, and the contact area between the sealing resin 21 and the plating layer can be secured widely. The connection strength between the resin 21 and the terminal portion 12 can be kept high. As a result, the insulation is improved and it becomes difficult to pick up noise.

Further, in the semiconductor element mounting substrate 1 of the present embodiment, if the height of the convex portion 11 is formed to be about 0.005 mm to 0.025 mm, the terminal portion formed on the outer surface of the convex portion 11 is formed. Since the plating layer of 12 mag does not protrude significantly from the back surface of the semiconductor package 40, it is formed on the outer surface of the convex portion 11 when the metal plate 10 is peeled off from the sealing resin body in the manufacture of the semiconductor package 40. It is possible to prevent the formed plating layer from being caught on the metal plate, and the metal plate 10 can be easily peeled off.

Further, in the semiconductor element mounting substrate 1 of the present embodiment, if the height of the convex portion 11 is formed to be about 0.03 mm to 0.06 mm, the pad on the back surface side of the semiconductor element 20 after the semiconductor element is mounted. Plating to prevent noise (improve insulation and make it difficult to pick up noise) and solder bleed (semiconductor element 20 is a terminal portion 12 formed on the top surface of the convex portion 11) to create a space with a surface such as a portion. When the solder is connected to the layer, the wet spread of the solder over the entire area of the plating layer other than the bonding point between the surface of the plating layer and the semiconductor element 20 is prevented, and the adhesion between the surface of the plating layer and the sealing resin is hindered. In addition, when the semiconductor package is solder-connected to an external device, it is possible to prevent the solder from spreading to the adjacent terminal side and prevent an electrical short circuit).

Further, in the semiconductor element mounting substrate 1 of the present embodiment, if the height of the convex portion 11 is formed to be about 0.08 mm to 0.11 mm, the external connection terminal on the back surface of the terminal portion 12 having a step is formed. In the above, the region of the space where the solder can be interposed, which is provided in the stepped portion on the side surface side of the semiconductor package 40, increases in the thickness direction of the semiconductor package 40. As a result, it becomes easier to observe the solder connection state between the external connection terminal and the external device after the semiconductor package is manufactured.
Further, if the height of the convex portion 11 is formed to be about 0.08 mm to 0.11 mm by performing the half-etching process on the metal plate, the half-etching process performed to form the convex portion 11 can be performed. The metal to be dissolved when the semiconductor element 20 is mounted in the manufacturing process of the semiconductor package and the metal plate 10 forming the base material is removed by dissolving the chemical solution after sealing with the sealing resin 21 due to the increased depth. The volume of the plate 10 becomes smaller. As a result, the increase in the concentration of the 10 metal plate components dissolved in the chemical solution can be suppressed, and a stable dissolved state can be maintained. ) Can be reduced.

Further, in the semiconductor element mounting substrate 1 of the present embodiment, if the top surface 11a of the convex portion 11 has a step and the terminal portion 12 has three or more surfaces having different heights, the semiconductor package 40 When the solder is connected to an external device by soldering, the solder is guided to the widest space area through the surface having a plurality of steps, and it becomes easy to keep the solder interposed in the widest space area. As a result, measures against solder bleeding (when the semiconductor element 20 is solder-connected to the plating layer to be the terminal portion 12, the wet spread of the solder over the entire plating layer other than the bonding point between the plating layer surface and the semiconductor element 20 is stopped. It prevents the adhesion between the surface of the plating layer and the sealing resin from being hindered, and also prevents the spread of solder wetness to the adjacent terminal side when the semiconductor package is soldered to an external device, and is electrical. It leads to (prevent short circuit).

Therefore, according to the present embodiment, an external connection composed of a plating layer that is manufactured by removing a metal plate from a resin sealing body in which a region on which a semiconductor element is mounted is sealed with a sealing resin and is exposed on the back surface side. In a substrate for mounting a semiconductor element used for manufacturing a semiconductor package of a type in which a terminal is connected to an external device such as a printed circuit board, the yield and production efficiency of the semiconductor package product are improved, and it is possible to cope with miniaturization. A substrate for mounting a semiconductor element and a method for manufacturing the same can be obtained, in which the solder connection portion can be visually observed, and further, electrical short circuit due to solder bleeding at the solder connection portion between adjacent terminals can be prevented.

Next, examples of the lead frame of the present invention and the method for manufacturing the same will be described.
Example 1
First, a copper-based material having a thickness of 0.20 mm was prepared as the metal plate 10 (see FIG. 3 (a)), and a dry film resist was laminated on both sides as the first resist layer R1 (FIG. 3 (b)). reference).

Next, the first resist layer R1 on one side of the metal plate 10 is formed by using a glass mask on which a predetermined pattern corresponding to the convex portion 11 shown in FIGS. 1 (a) and 1 (b) is drawn. Upon exposure, the first resist layer R1 on the other side of the metal plate 10 is exposed over the entire surface, and after the exposure, each first resist layer R1 is developed and placed on one side surface of the metal plate 10. , A predetermined region smaller than the terminal size in the portion corresponding to each terminal exposed on the back surface of the semiconductor package is covered to form an etching resist mask 31 having an opening around the predetermined region, and the other side of the metal plate 10 is formed. A resist mask 31 for etching was formed on the surface of the surface (see FIG. 3C).
Next, a half-etching process with a depth of 0.015 mm was performed from one side of the metal plate 10, and a convex portion 11 was formed at the depth of the half-etching process on the metal plate (see FIG. 3 (d)). A ferric chloride solution was used as the etching solution.
Next, the etching resist mask 31 formed on one side surface of the metal plate 10 was peeled off (see FIG. 3 (e)).

Next, a dry film resist was laminated as the second resist layer R2 on one side surface of the metal plate 10 (see FIG. 3 (f)).
Next, using a glass mask on which a predetermined pattern corresponding to the terminal portion 12 shown in FIGS. 1A and 1B is drawn, the second resist layer R2 on one side of the metal plate 10 is used. The second resist layer R2 is developed after the exposure to surround the convex portion 11 on one side surface of the metal plate 10, and the convex portion 11 has a top surface 11a to a side surface 11b and a convex portion 11. A plating resist mask 32 having openings in a plurality of regions corresponding to the respective terminal portions 12 over the outer surface (one side surface 10a of the metal plate 10) was formed (see FIG. 3 (g)).
Next, the opening of the resist mask 32 for plating is sequentially plated with a thickness of 0.01 μm for Au, 0.03 μm for Pd, 30.0 μm for Ni, and 0.03 μm for Pd, and the convex portion 11 is formed. A plurality of terminal portions 12 having steps at predetermined positions extending from the top surface 11a to the side surface 11b and the outer surface of the convex portion 11 (the surface 10a on one side of the metal plate 10) are formed (see FIG. 3 (h)). ..
Next, the resist masks 31 and 32 formed on both sides of the metal plate 10 were peeled off (see FIG. 3 (i)) to obtain the semiconductor element mounting substrate 1 of Example 1.

Next, the semiconductor element 20 is flip-chip connected to the internal terminal connection portion on the surface of the terminal portion 12 of the semiconductor element mounting substrate 1 of the first embodiment via solder 15 or the like (see FIG. 5A), which is not shown. The mold mold was set, and the semiconductor element mounting side was sealed with the sealing resin 21 (see FIG. 5 (b)).
Next, the metal plate 10 was removed (see FIG. 5 (c)).

At this time, the plating constituting the terminal portion 12 serving as the external connection terminal having a concavely formed region from the surface (back surface) opposite to the semiconductor element mounting side in the sealing resin body from which the metal plate 10 has been removed. Finished with the layers exposed.
Next, it was cut to the dimensions of a predetermined semiconductor package (see FIG. 5 (d)). As a result, a semiconductor package 40 using the semiconductor element mounting substrate 1 of Example 1 was obtained (see FIG. 5 (e)).
Next, the external connection terminal of the semiconductor package 40 using the semiconductor element mounting substrate 1 of Example 1 was solder-connected to the terminal of the printed circuit board 80, which is an external device, and mounted on the printed circuit board 80. At this time, the solder 90 melted by the reflow wets and spreads in the space provided by forming the step of the external connection terminal portion on the back surface of the terminal portion 12, and is exposed on the side surface of the semiconductor package 40 for external connection. The solder connection portion of the terminal 12 can be visually confirmed, and the quality and defect of the solder connection state with the printed circuit board 80, which is an external device of the semiconductor package 40, can be visually inspected (FIGS. 6 (a) to 6 (d)). )reference).

Comparative Example 1
In Comparative Example 1, the step of forming the convex portion 11 by the half-etching process in Example 1 was omitted, and other than that, a substrate for mounting a semiconductor element was manufactured under substantially the same conditions and procedures as in Example 1.
More specifically, a glass mask obtained by laminating a dry film resist as a first resist layer on both surfaces of a metal plate and drawing a predetermined pattern corresponding to the terminal portion 12 shown in FIG. 1 (b) is used. The first resist layer on one side of the metal plate is exposed, the first resist layer on the other side of the metal plate is exposed over the entire surface, and after the exposure, each first resist layer is developed to develop the metal. A resist mask for plating having openings in a plurality of regions corresponding to the terminal portion 12 shown in FIG. 1 (b) is formed on one side surface of the plate, and on the other side surface of the metal plate. A resist mask for plating was formed on the entire surface.
Next, the openings of the resist mask for plating are sequentially plated with a thickness of 0.01 μm for Au, 0.03 μm for Pd, 30.0 μm for Ni, and 0.03 μm for Pd, and a plurality of terminal portions are formed. Formed.
Next, the resist mask formed on both sides of the metal plate was peeled off to obtain a substrate for mounting a semiconductor element of Comparative Example 1.

Next, as in the first embodiment, the semiconductor element is flip-chip connected to the internal terminal connection portion on the surface of the terminal portion of the semiconductor element mounting substrate of Comparative Example 1 via solder or the like, and a mold mold (not shown) is set. , The semiconductor element mounting side was sealed with a sealing resin, and then the metal plate was removed.
At this time, the surface of the encapsulating resin body from which the metal plate has been removed opposite to the semiconductor element mounting side is formed flat, and the terminal portion serving as the external connection terminal is formed from the flatly formed surface of the encapsulating resin body. The resulting plating layer was finished in an exposed state.
Next, it was cut to the dimensions of a predetermined semiconductor package. As a result, a semiconductor package using the semiconductor element mounting substrate of Comparative Example 1 was obtained.
Next, the external connection terminal of the semiconductor package using the semiconductor element mounting substrate of Comparative Example 1 was solder-connected to the terminal of the printed circuit board, which is an external device, and mounted on the printed circuit board.

Comparison of ease of observing the appearance of the solder connection state after connecting to an external device Each semiconductor package manufactured using the respective semiconductor element mounting substrates of Example 1 and Comparative Example 1 is transferred to an external device via solder. We compared the ease of observing the appearance of the solder connection state after connecting to the terminals of a certain printed circuit board.
When the semiconductor package manufactured using the semiconductor element mounting substrate of Comparative Example 1 is connected to the terminal of the printed circuit board which is an external device, the solder does not protrude from the side surface of the semiconductor package, and the external connection terminal and the external device It was difficult to visually check the solder connection state with the terminals of the printed circuit board.
On the other hand, when the semiconductor package 40 manufactured by using the semiconductor element mounting substrate 1 of the first embodiment is connected to the terminals of the printed circuit board 80 which is an external device, the outside of all the terminal portions 12 is on the side surface of the semiconductor package 40. From the side of the edge of the external connection terminal made of the plating layer exposed on the side surface of the semiconductor package 40 that the solder is filled between the surface on the device side and the terminal of the printed circuit board 80 which is an external device. It could be confirmed visually. In addition, it was confirmed that there was no problem of solder bleeding between adjacent terminals, and that solder remained on the wall surface of the space portion formed in the shape of a gate at the edge of the external connection terminal.

Although the preferred embodiments and examples of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments and examples, and does not deviate from the scope of the present invention. Various modifications and substitutions can be made to the examples.

The semiconductor element mounting substrate and the manufacturing method thereof of the present invention are used for a semiconductor package of a type in which the terminal portion is formed of a plating layer and the external connection terminal on the back surface of the terminal portion exposed on the back surface side is connected to a printed circuit board or the like. It is useful in fields where it is required to be.

1 Substrate for mounting semiconductor elements 10 Metal plate 10a One side surface of metal plate 11, 11'Convex part 11a, 11a'Top surface 11b, 11b' Side surface 12 Terminal part 13 Same metal as plated metal plate 14 Pad Part 15 Solder 16 Bonding wire 20, 60 Semiconductor element 21, 70 Encapsulating resin 31 Etching resist mask 31', 32 Plating resist mask 40 Semiconductor package 51 Terminal part (external connection terminal)
51a Space part 51b Groove 52 Pad part 61 Bonding wire 80 External device (printed circuit board)
81 Terminal 90 Solder R1 First resist layer R2 Second resist layer

Claims (6)

On one side of the metal plate, a plurality of convex portions smaller than the terminal size exposed on the back surface of the semiconductor package, and a step at a predetermined position extending from the top surface to the side surface of each of the convex portions and the outer surface of the convex portion. A substrate for mounting a semiconductor element, which is formed by attaching and has a plurality of terminal portions made of a plating layer. On one side of the metal plate, a plurality of convex portions smaller than the terminal size exposed on the back surface of the semiconductor package, a pad portion formed of a plating layer in the central portion, and the periphery of the pad portion and described above. A substrate for mounting a semiconductor element, which has a plurality of terminal portions made of a plating layer formed by forming a step at a predetermined position from the top surface of the convex portion to the side surface and the outer surface of the convex portion. The semiconductor device mounting substrate according to claim 1 or 2, wherein each of the terminal portions is formed so as to surround the convex portion. The substrate for mounting a semiconductor element according to any one of claims 1 to 3, wherein the height of the convex portion is 0.005 mm to 0.11 mm. On the surface of one side of the metal plate, covering the small predetermined area than the terminal size at the site corresponding to the end terminal of each exposed on the back surface of the semiconductor package, an etching resist mask having openings around its periphery In addition to forming, a step of forming an etching resist mask covering the entire surface on the other side surface of the metal plate, and
A step of half-etching from one side of the metal plate to form a convex portion, and
A step of removing the etching resist mask formed on one side surface of the metal plate, and
A step of forming a resist mask for plating having openings in a plurality of regions corresponding to predetermined positions surrounding the convex portion on one side surface of the metal plate.
A step of plating the opening of the resist mask for plating to form a plurality of terminal portions having steps at predetermined positions extending from the top surface of the convex portion to the side surface and the outer surface of the convex portion.
A step of removing the resist mask formed on both sides of the metal plate and
A method for manufacturing a substrate for mounting a semiconductor element. On the surface of one side of the metal plate, to form a plating resist mask having an opening to a small predetermined region than the terminal size at the site corresponding to the end terminal of each exposed on the back surface of the semiconductor package, wherein A process of forming a resist mask for plating that covers the entire surface on the other side surface of the metal plate, and
A process of forming a convex portion by plating the same metal as the metal plate from one side of the metal plate, and
A step of removing the plating resist mask formed on one side surface of the metal plate, and
A step of forming a resist mask for plating having openings in a plurality of regions corresponding to predetermined positions surrounding the convex portion on one side surface of the metal plate.
The opening of the resist mask for plating is plated with a metal different from that of the metal plate, and a plurality of terminal portions having a step at a predetermined position extending from the top surface of the convex portion to the side surface and the outer surface of the convex portion. And the process of forming
A step of removing the resist mask formed on both sides of the metal plate and
A method for manufacturing a substrate for mounting a semiconductor element.

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