JP6738718B2 - 配線基板の製造方法 - Google Patents
配線基板の製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 34
- 239000002184 metal Substances 0.000 claims description 202
- 229910052751 metal Inorganic materials 0.000 claims description 202
- 238000005530 etching Methods 0.000 claims description 37
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical group [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 33
- 239000010949 copper Substances 0.000 claims description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 26
- 229910052802 copper Inorganic materials 0.000 claims description 25
- 238000000034 method Methods 0.000 claims description 20
- 229910052759 nickel Inorganic materials 0.000 claims description 13
- 238000009713 electroplating Methods 0.000 claims description 7
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 239000002245 particle Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 585
- 239000011888 foil Substances 0.000 description 40
- 229920005989 resin Polymers 0.000 description 24
- 239000011347 resin Substances 0.000 description 24
- 239000000463 material Substances 0.000 description 13
- 230000003746 surface roughness Effects 0.000 description 13
- 239000000243 solution Substances 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 10
- 239000004593 Epoxy Substances 0.000 description 7
- 239000007864 aqueous solution Substances 0.000 description 7
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 6
- 238000007788 roughening Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 6
- 238000007747 plating Methods 0.000 description 5
- 239000011164 primary particle Substances 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 4
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000011163 secondary particle Substances 0.000 description 4
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 3
- 239000003963 antioxidant agent Substances 0.000 description 3
- 230000003078 antioxidant effect Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 238000010030 laminating Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000003672 processing method Methods 0.000 description 3
- LCPVQAHEFVXVKT-UHFFFAOYSA-N 2-(2,4-difluorophenoxy)pyridin-3-amine Chemical compound NC1=CC=CN=C1OC1=CC=C(F)C=C1F LCPVQAHEFVXVKT-UHFFFAOYSA-N 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 2
- -1 azole compound Chemical class 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- CHQMHPLRPQMAMX-UHFFFAOYSA-L sodium persulfate Substances [Na+].[Na+].[O-]S(=O)(=O)OOS([O-])(=O)=O CHQMHPLRPQMAMX-UHFFFAOYSA-L 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- KAESVJOAVNADME-UHFFFAOYSA-N 1H-pyrrole Natural products C=1C=CNC=1 KAESVJOAVNADME-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229920006231 aramid fiber Polymers 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 229910000365 copper sulfate Inorganic materials 0.000 description 1
- ARUVKPQLZAKDPS-UHFFFAOYSA-L copper(II) sulfate Chemical compound [Cu+2].[O-][S+2]([O-])([O-])[O-] ARUVKPQLZAKDPS-UHFFFAOYSA-L 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000003755 preservative agent Substances 0.000 description 1
- 230000002335 preservative effect Effects 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000002335 surface treatment layer Substances 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4864—Cleaning, e.g. removing of solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
[第1の実施の形態に係る配線基板の構造]
まず、第1の実施の形態に係る配線基板の構造について説明する。図1は、第1の実施の形態に係る配線基板を例示する断面図である。
次に、第1の実施の形態に係る配線基板の製造方法について説明する。図2及び図3は、第1の実施の形態に係る配線基板の製造工程を例示する図である。本実施の形態では、支持体上に複数の配線基板となる部分を作製し支持体を除去後個片化して各配線基板とする工程の例を示すが、支持体上に1個ずつ配線基板を作製し支持体を除去する工程としてもよい。
第2の実施の形態では、3層構造の配線基板の例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
まず、第2の実施の形態に係る配線基板の構造について説明する。図4は、第2の実施の形態に係る配線基板を例示する断面図である。図4を参照するに、第2の実施の形態に係る配線基板2は、絶縁層20、配線層30、絶縁層40、配線層50、及び絶縁層70が追加された点が配線基板1(図1参照)と相違する。
次に、第2の実施の形態に係る配線基板の製造方法について説明する。図5〜図7は、第2の実施の形態に係る配線基板の製造工程を例示する図である。本実施の形態では、支持体上に複数の配線基板となる部分を作製し支持体を除去後個片化して各配線基板とする工程の例を示すが、支持体上に1個ずつ配線基板を作製し支持体を除去する工程としてもよい。
ここでは、支持体の変形例を示す。なお、支持体の変形例において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
10 配線層
11、31、51 第1層
12、32、52 第2層
20、40、60、70 絶縁層
20x、40x ビアホール
33、53 第3層
60x、70x 開口部
100、100A、100B 支持体
110、110A、120、130、130A、150、320 金属層
111 1次粒子
112 2次粒子
140 支持基板
310 金属箔
Claims (8)
- 支持基板上に第1の金属層と、上面が粗化面である、若しくは粒子からなる、第2の金属層とが順次積層され、前記第2の金属層は前記第1の金属層に対して選択的にエッチング可能な支持体を準備する工程と、
前記第2の金属層の上面に、第3の金属層を選択的に形成する工程と、
エッチング液により前記第3の金属層を粗化すると同時に前記第3の金属層に被覆されていない前記第2の金属層を溶解し、前記第2の金属層上に前記第3の金属層が積層された第1の配線層を形成する工程と、
前記第1の金属層上に、前記第1の配線層を被覆する絶縁層を形成する工程と、
前記支持基板を除去し、更に前記第1の金属層をエッチングにより除去する工程と、を有し、
前記第1の金属層をエッチングにより除去する工程の後、前記第2の金属層の残渣を除去するエッチング工程を更に有する配線基板の製造方法。 - 前記絶縁層上に第2の配線層を形成する工程を含む請求項1に記載の配線基板の製造方法。
- 前記第3の金属層を選択的に形成する工程では、前記第2の金属層と同一のエッチング液に可溶な第3の金属層を形成する請求項1又は2に記載の配線基板の製造方法。
- 前記第2の配線層を形成する工程では、前記絶縁層上にシード層を形成する工程と、
前記シード層上に、電解めっき層を選択的に形成する工程と、
前記電解めっき層に被覆されていない前記シード層をエッチングにより除去し、前記シード層上に前記電解めっき層が積層された第2の配線層を形成する請求項2に記載の配線基板の製造方法。 - 前記第1の金属層はニッケルであり、前記第2の金属層及び前記第3の金属層は銅である請求項1乃至4の何れか一項に記載の配線基板の製造方法。
- 前記支持体の前記第1の金属層と前記第2の金属層との間に、スパッタ法により形成された第4の金属層が積層された請求項1乃至5の何れか一項に記載の配線基板の製造方法。
- 前記支持体の前記支持基板と前記第1の金属層との間に、第5の金属層が積層された請求項1乃至6の何れか一項に記載の配線基板の製造方法。
- 前記第5の金属層の前記支持基板と接する面が粗化面とされた請求項7に記載の配線基板の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016232678A JP6738718B2 (ja) | 2016-11-30 | 2016-11-30 | 配線基板の製造方法 |
US15/810,578 US10811348B2 (en) | 2016-11-30 | 2017-11-13 | Method of manufacturing wiring substrate |
KR1020170152768A KR102361228B1 (ko) | 2016-11-30 | 2017-11-16 | 배선 기판 제조방법 |
TW106139672A TWI731195B (zh) | 2016-11-30 | 2017-11-16 | 配線基板的製造方法 |
JP2020081417A JP6935539B2 (ja) | 2016-11-30 | 2020-05-01 | 配線基板の製造方法 |
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JP2016232678A JP6738718B2 (ja) | 2016-11-30 | 2016-11-30 | 配線基板の製造方法 |
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JP2020081417A Division JP6935539B2 (ja) | 2016-11-30 | 2020-05-01 | 配線基板の製造方法 |
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JP2018092975A JP2018092975A (ja) | 2018-06-14 |
JP6738718B2 true JP6738718B2 (ja) | 2020-08-12 |
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US11145633B2 (en) * | 2019-08-28 | 2021-10-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and manufacturing method thereof |
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US12009315B2 (en) * | 2020-09-03 | 2024-06-11 | AT&SAustria Technologie & Systemtechnik AG | Component carrier structure connectable by electrically conductive connection medium in recess with cavity having surface profile |
TW202410319A (zh) * | 2022-08-26 | 2024-03-01 | 日商Mgc電子科技股份有限公司 | 積層體、及無芯基板之製造方法 |
CN118136516B (zh) * | 2024-03-20 | 2024-08-16 | 合肥沛顿存储科技有限公司 | 一种提升晶圆级封装芯片可靠性的方法 |
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EP0545328B1 (en) * | 1991-11-29 | 1997-03-19 | Hitachi Chemical Co., Ltd. | Printed circuit board manufacturing process |
US5504992A (en) * | 1991-11-29 | 1996-04-09 | Hitachi Chemical Company, Ltd. | Fabrication process of wiring board |
JP4691763B2 (ja) | 2000-08-25 | 2011-06-01 | イビデン株式会社 | プリント配線板の製造方法 |
JP2002374066A (ja) | 2001-06-14 | 2002-12-26 | Ibiden Co Ltd | 多層プリント配線板の製造方法 |
JP2003152341A (ja) | 2001-11-13 | 2003-05-23 | Mitsui Mining & Smelting Co Ltd | プリント配線板の導体形成に用いる多層複合材料及びその製造方法並びにその多層複合材料を用いたプリント配線板 |
JP4273895B2 (ja) | 2003-09-24 | 2009-06-03 | 日立化成工業株式会社 | 半導体素子搭載用パッケージ基板の製造方法 |
KR100776248B1 (ko) * | 2006-11-21 | 2007-11-16 | 삼성전기주식회사 | 인쇄회로기판 제조방법 |
TWI437938B (zh) * | 2007-03-01 | 2014-05-11 | Ajinomoto Kk | A method of manufacturing a circuit board, a subsequent thin film to which a metal film is attached, and a circuit board |
TWI634826B (zh) * | 2013-06-17 | 2018-09-01 | 味之素股份有限公司 | Manufacturing method of built-in component wiring board, built-in component insulating substrate, built-in component two-layer wiring substrate, and semiconductor device |
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