JP6679992B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device including a dynamic clamp circuit that limits a potential difference between output terminals of a switching element.

  Conventionally, for example, when a MOSFET is used as a switching element, the clamp voltage for the drain-source voltage Vds is set to be equal to or higher than a surge voltage typified by a load dump to keep the MOSFET off and prevent the element from being destroyed. Was being done.

  However, if Vds is clamped at a relatively high voltage equivalent to a surge voltage during a protection operation during overcurrent detection, the power consumption during the protection operation increases. Further, heat generation due to large power consumption may be a problem. Further, with the miniaturization of the element, the increase in the amount of heat generated due to the increase in Vds is more remarkable than that of the conventional element.

  Patent Document 1 discloses a semiconductor integrated circuit in which a clamp voltage is variable. In this semiconductor integrated circuit, the clamp voltage is set high when a high surge voltage is assumed, and the clamp voltage is set when it is necessary to absorb high energy in a short time as represented by load short circuit. Lower. As a result, it is possible to suppress the power consumption when the high energy is absorbed by the element and suppress the amount of heat generation.

JP 2001-85618 A

  By the way, there is a demand for arranging the load on the reference potential side, for example, the ground potential side, with respect to the switching element because there is a concern that an unintended current may flow through the switching element due to a ground fault of the load. That is, there is a demand for applying the dynamic clamp circuit to the high side driver.

  However, in the semiconductor integrated circuit described in Patent Document 1, the clamp voltage controlled by the dynamic clamp circuit needs to be based on the ground potential. Therefore, this dynamic clamp circuit can be applied only to the low-side driver in which the load is arranged on the power supply side of the switching element, and cannot meet the demand for application to the high-side driver.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device having a clamp circuit that has a simple circuit configuration and is applicable to both high-side and low-side drivers. To do.

  The invention disclosed herein employs the following technical means in order to achieve the above object. The reference numerals in parentheses in the claims and this section indicate the correspondence with the specific means described in the embodiments described later as one aspect, and limit the technical scope of the invention. Not something to do.

In order to achieve the above object, the present invention provides a series connection with a load (200) between a power supply node (T0) having a power supply potential and a first reference node (T1) having a predetermined reference potential. The switching element (300) connected to the power supply node is connected to a first terminal connected to the power supply node side and a second terminal connected to the first reference node side by a predetermined clamp voltage. The switching element has a control terminal (50) for controlling the current flowing between the first terminal and the second terminal, and the switching element has a control terminal (50) between the first terminal and the control terminal. It is connected between a first clamp circuit (20) that is connected and conducts at a voltage equal to or higher than the first clamp voltage, and a second reference node that is a reference potential of the control unit and charges the control terminal. Discharge and detect the potential difference between terminals A second clamp circuit (30) having a second clamp voltage lower than the voltage; and a third clamp circuit (40) connected between the control terminal and the second terminal to discharge the electric charge of the control terminal. The control unit has an overcurrent detection unit (50b) that detects a load current flowing through the load, and the control unit enables the second clamp circuit when the load current becomes equal to or more than a predetermined threshold value. The third clamp circuit is enabled a predetermined time after the second clamp circuit is enabled, and the predetermined time τ from when the second clamp circuit is enabled to when the third clamp circuit is enabled includes the load. The inductance L, the current value I flowing through the load, the second clamp voltage V _2, and the power supply potential VCC are used to satisfy the relationship of τ ≧ IL / (V ₂ −VCC).

  According to this, with respect to a surge voltage such as a load dump, the inter-terminal potential difference can be maintained at a voltage higher than the first clamp voltage, so that the switching element can be kept off.

  Further, with respect to an overcurrent caused by a load short circuit or the like, the second clamp circuit clamps the potential difference between the terminals to the second clamp voltage smaller than the first clamp voltage, so that the power consumption of the switching element is reduced. The amount of heat generation can be suppressed. Since the second clamp circuit realizes the second clamp voltage by charging / discharging the electric charge of the control terminal in the switching element with the second reference node as a reference, the connection relationship between the load and the switching element, that is, Regardless of whether the switching element is on the high side or the low side, the clamp function of the potential difference between the terminals can be achieved.

  Furthermore, the charge of the control terminal of the switching element is discharged by the third clamp circuit with reference to the second terminal. In other words, since the potential difference between the control terminal and the second terminal can be made substantially the same, the switching element can be more reliably maintained in the off state.

1 is a circuit diagram showing a schematic configuration of a semiconductor device according to a first embodiment. It is a circuit diagram which shows the detail of a control part. 6 is a timing chart showing the operation of the second clamp circuit and the third clamp circuit. It is a circuit diagram which shows the modification of a 2nd clamp circuit. It is a circuit diagram showing a schematic structure of a semiconductor device concerning a 2nd embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. In each of the following drawings, the same or equivalent parts are designated by the same reference numerals. In the case where only a part of the configuration is described in each mode, the other parts of the configuration are the same as those described above. Not only the combination of the parts specifically described in the respective embodiments, but also the embodiments can be partially combined with each other as long as the combination does not cause any problems.

(First embodiment)
First, the schematic configuration of the semiconductor device according to the present embodiment will be described with reference to FIGS. 1 and 2.

  As shown in FIG. 1, the semiconductor device 100 according to the present embodiment is a drive device for applying a gate voltage to a gate electrode G that is a control terminal of a switching element 300 that controls a current flowing through a load 200. The load 200 is, for example, a resistor having a predetermined resistance value, and has a predetermined inductance including wiring. The switching element 300 is, for example, a MOSFET, and is a three-terminal element having a gate electrode G serving as a control terminal, a drain electrode D through which an output current flows, and a source electrode S. Here, the drain electrode D and the source electrode S correspond to the first terminal and the second terminal described in the claims, respectively. In the present embodiment, a MOSFET is exemplified as the switching element 300, but the type of the switching element 300 is not limited and may be, for example, an IGBT. When the switching element 300 is an IGBT, the drain electrode D serving as the first terminal can be restated as the collector electrode, and the source electrode serving as the second terminal can be restated as the emitter electrode.

  The switching 300 and the load 200 are connected in series between a power supply node T0 whose potential is set to the power supply potential VCC and a first reference node T1 whose potential is set to a predetermined reference potential GNDP. In the example shown in FIG. 1, the switching element 300 has a high-side arrangement in which the switching element 300 is arranged on the power supply potential VCC side with respect to the load 200. That is, the drain electrode D of the switching element 300 is connected to the power supply node T0, the source electrode S is connected to one end of the load 200, and the other end of the load 200 is connected to the first reference node T1.

  The semiconductor device 100 is a driving device for applying a gate electrode to the gate terminal G, and includes a driver 10 that outputs a gate voltage, a first clamp circuit 20, a second clamp circuit 30, and a third clamp circuit. 40 and a control unit 50.

  The driver 10 can employ a drive circuit generally used in a gate drive circuit. It suffices that a drive circuit exhibiting an appropriate drive capability is selected according to the gate capacitance of the switching element 300 and the output current to be passed, and detailed description thereof will be omitted here.

  As shown in FIG. 1, the first clamp circuit 20 is connected between the gate electrode G and the drain electrode D. The first clamp circuit 20 is configured by connecting a plurality of Zener diodes 21 in series so that the cathode is connected to the drain electrode D. The first clamp circuit 20 also has a diode 22 that limits the current flowing from the gate electrode G to the drain electrode D.

  Further, the semiconductor device 100 includes a gate resistor 60 interposed between the gate electrode G and the source electrode S. When the second clamp circuit 30 and the third clamp circuit 40, which will be described later, are ineffective, the drain-source voltage Vds with the source electrode S as the reference is clamped to VZe + Vt on the basis of VCC. Here, VZe is a voltage defined by the Zener diode 21, and is variable depending on the number of Zener diode elements connected in series. Vt is the threshold voltage of the switching element 300. The clamp voltage Vds≈VZe + Vt here corresponds to the first clamp voltage described in the claims. It should be noted that the value obtained by adding the forward voltage VF of the diode 22 is properly the clamp voltage, but in the following description, the clamp voltage is approximated to VZe + Vt to simplify the description.

  As shown in FIG. 1, the second clamp circuit 30 is inserted between the gate electrode G serving as a control terminal and the second reference node T2 having a predetermined reference potential GNDX. The second clamp circuit 30 has a resistor 31 having a predetermined resistance value R2, and a switch 32 provided between the resistor 31 and the second reference node T2. In the claims, that the second clamp circuit is valid means that the switch 32 is turned on (closed) so that the gate electrode G is connected to the second reference node T2 via the second clamp circuit 30. Equivalent to that. The switch 32 is turned on when an enable signal is input from the control unit 50 described later, and a MOSFET, for example, can be adopted.

  When the second clamp circuit 30 is enabled while the third clamp circuit 40, which will be described later, is disabled, the gate electrode G is clamped at a voltage near the reference potential GNDX, and thus Vds is clamped to VCC + Vt with reference to GNDX. . The clamp voltage Vds≈VCC + Vt here corresponds to the second clamp voltage described in the claims.

  As shown in FIG. 1, the third clamp circuit 40 is inserted between the gate electrode G, which is a control terminal, and the source electrode S. That is, it is connected in parallel with the gate resistor 60. The third clamp circuit 40 has a resistor 41 having a predetermined resistance value R3, and a switch 42 provided between the resistor 41 and the source electrode S. In the claims, that the third clamp circuit is effective means that the gate electrode G is connected to the source electrode S via the third clamp circuit 40 when the switch 42 is turned on (closed). Equivalent to. The switch 42 is turned on when an enable signal is input from the control unit 50 described later, and for example, a MOSFET can be adopted.

  When the third clamp circuit 40 is activated, the gate electrode G has substantially the same potential as the source electrode S, so that the switching element 300 can be more reliably turned off.

  The control unit 50 controls ON / OFF of the switch 32 in the second clamp circuit 30 and the switch 42 in the third clamp circuit 40. As shown in FIG. 2, the control unit 50 in the present embodiment has an overheat detection unit 50a and an overcurrent detection unit 50b.

  The overheat detection unit 50 a includes a temperature sensitive diode 51, a constant current source 52 that supplies a constant current to the temperature sensitive diode 51, a comparator 53, and a reference power supply 54 that supplies a reference voltage to the comparator 53. The comparator 53 is configured with VCC as a power supply potential and GNDX as a reference potential. The temperature sensitive diode 51 is arranged near the switching element 300, for example. The temperature-sensitive diode 51 inputs to the comparator 53 a voltage value based on the temperature of the environment in which it is placed and a current value defined by the constant current source 52. The reference voltage defined by the reference power supply 54 is set to a voltage corresponding to the threshold temperature at which the switching element 300 is determined to be overheated. The comparator 53 compares the voltage based on the temperature with the reference voltage, and outputs a signal that is enabled when the temperature of the switching element 300 is higher than the threshold temperature.

  The overcurrent detection unit 50b includes a comparator 55 and a reference power supply 56 that supplies a reference voltage to the comparator 55. Similar to the comparator 53 in the overheat detection unit 50a, the comparator 55 is configured with VCC as a power supply potential and GNDX as a reference potential. The reference voltage defined by the reference power supply 56 is set to a voltage corresponding to the threshold current at which the output current flowing through the switching element 300 is determined to be an overcurrent. The source voltage (VOUT) corresponding to the current flowing through the switching element 300 is input to the comparator 55. The comparator 55 compares the source voltage based on the output current with the reference voltage, and outputs a signal that is enabled when the output current of the switching element 300 is larger than the threshold current. The overcurrent detection unit 50b corresponds to the current detection unit described in the claims.

  The outputs of the comparator 53 in the overheat detection unit 50a and the comparator 55 in the overcurrent detection unit 50b are input to the OR circuit 57. The OR circuit 57 outputs a signal that enables if the output of at least one of the comparators 53 and 55 is enabled.

  The output signal of the OR circuit 57 is output to the switch 32 in the second clamp circuit 30 and also input to the timer 58. The timer 58 is connected to the oscillator 59 and outputs the enable signal after a predetermined time has elapsed since the enable signal from the OR circuit 57 was input. The enable signal from the timer 58 is input to the switch 42 in the third clamp circuit 40.

  As described above, when the overheat detection unit 50a detects overheat or the overcurrent detection unit 50b detects overcurrent, the control unit 50 outputs the enable signal to the switch 32 to enable the second clamp circuit 30. To Then, after a predetermined time, an enable signal is output to the switch 42 to enable the third clamp circuit 40.

The predetermined time τ from the input of the enable signal to the timer 58 to the output of the enable signal from the timer 58 can be set arbitrarily, but the energy stored in the inductance L including the load 200 and the wiring is switched. It is preferable to set it so that the element 300 can absorb it. The time t required for the switching element 300 to absorb the energy stored in the inductance is t = IL / (V ₂ −VCC) using the load current I and the second clamp voltage V ₂ .

Here, the predetermined time τ from the input of the enable signal to the timer 58 to the output of the enable signal from the timer 58 is preferably set to a time at which the energy accumulated in the inductance L can be absorbed by the switching element 300. , Τ ≧ t = IL / (V ₂ −VCC).

  Next, with reference to FIG. 3, the operation of the semiconductor device 100 according to the present embodiment will be described by taking a short circuit of the load 200 as an example.

  First, at a time t1 shown in FIG. 3, when an unillustrated ECU or the like instructs the load 200 to be energized, the driver 10 is turned on and application of a gate voltage is started. As the gate voltage rises, VOUT corresponding to the source voltage of the switching element 300 rises and an output current flows.

  It is assumed that the load 200 is short-circuited at time t2. When the output current rises and the control unit 50 detects an overcurrent at time t3, the driving of the driver 10 is turned off and the second clamp circuit 30 becomes effective. As a result, the gate electrode G of the switching element 300 is clamped with reference to GNDX, which is the reference potential of the control unit 50, and Vds is also clamped to the second clamp voltage of Vds≈Vt as described above. The VZe term appearing in the first clamp voltage is generally set to be sufficiently larger than VCC in order to cope with a high voltage such as a load dump, and the first clamp voltage is larger than the second clamp voltage. Conversely, since the second clamp voltage is sufficiently smaller than the first clamp voltage, it is possible to reduce the power consumption due to the overcurrent related to the short circuit and to suppress the heat generation amount.

  In the semiconductor device 100 of the present embodiment, the gate electrode G of the switching element 300 is clamped with GNDX as a reference, so that Vds can be clamped without employing a complicated circuit such as a level shift circuit. Then, this clamp can be realized in the high side driver as in the present embodiment.

  After the second clamp circuit 30 becomes valid at time t3, the third clamp circuit 40 becomes valid at time t4 after the elapse of the predetermined time τ. As a result, the gate electrode G and the source electrode S of the switching element 300 are substantially short-circuited, so that the switching element 300 can be more reliably turned off.

  Although the present embodiment describes the mode in which the gate electrode G of the switching element 300 is clamped with reference to GNDX, which is the reference potential of the control unit 50, when the second clamp circuit 30 is enabled. The connection destination of the gate electrode G may be the reference potential GNDP. That is, in the claims, it does not prevent that the second reference node is the same as the first reference node.

  However, since it is preferable that the potential of the connection destination of the gate electrode G when the second clamp circuit 30 becomes effective is stable, the potential is connected to a control system module such as the control unit 50 or the ECU and more stable is required. It is preferably connected to the reference potential.

(Modification 1)
As shown in FIG. 4, between the second clamp circuit 30 and the second reference node T2, the second clamp circuit 30 is boosted to a potential higher than GNDX, which is the potential set at the second reference node T2. It is more preferable to include the portion 33.

  When the switch 42 of the third clamp circuit 40 is an NMOS and the second clamp circuit 30 is enabled and the gate electrode G of the switching element 300 is clamped at a potential close to the reference potential GNDX, Depending on the voltage, the switch 42 may be turned on by mistake. In the semiconductor device 100 according to this modification, the gate voltage when the second clamp circuit 30 is turned on can be made higher than that in the configuration in which the booster 33 is not inserted, so that the unintentional activation of the third clamp circuit 40 is prevented. can do.

  The booster 33 is not limited to the power supply circuit shown in FIG. 4 as long as the second clamp circuit 30 can be set to a potential higher than GNDX. For example, a diode or an NMOS with a gate-drain short circuit may be used.

(Second embodiment)
In the first embodiment, the example in which the semiconductor device 100 is applied to the high-side driver in which the switching element 300 is arranged on the power supply potential VCC side with respect to the load 200 has been described. On the other hand, in the second embodiment, an example in which the semiconductor device 100 is applied to a low side driver will be described.

  The constituent elements of the semiconductor device 100 are the same as those in the first embodiment. In the present embodiment, the drain electrode D of the switching element 300 is connected to the power supply node T0 via the load 200 as shown in FIG. On the other hand, the source electrode S is directly connected to the first reference node T1. In the first clamp circuit 20 of the semiconductor device 100, one end is connected to an intermediate point between the drain electrode D and the load 200, and the other end is connected to the gate electrode G.

  As described above, the semiconductor device 100 can be applied to both the high-side driver and the low-side driver without changing the circuit configuration.

(Other embodiments)
Although the preferred embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention.

  The resistor 31 of the second clamp circuit 30 in each of the above-described embodiments can be replaced with a constant current source or a Zener diode capable of charging and discharging the gate electrode of the switching element 300.

  Further, the resistor 41 of the third clamp circuit 40 in each of the above-described embodiments can be replaced with a constant current source or a Zener diode capable of discharging the gate electrode of the switching element 300.

  When replacing the resistors 31 and 41 with a constant current source, the current value of the third clamp circuit 40 is set to be larger. As a result, after the clamp operation by the second clamp circuit 30, the potential Vg of the gate electrode G becomes dependent on the constant current caused by the third clamp circuit 40, and thus the reliable switching element 300 by the third clamp circuit 40. Can be turned off.

  Further, the switches 32 and 42 may simply be replaced by diodes. In this case, the relation between the resistance value R2 of the resistor 31 and the resistance value R3 of the resistor 41 satisfies R2> R3. As a result, after the clamping operation by the second clamp circuit 30, the potential Vg of the gate electrode G depends on the resistance value R3, so that the switching element 300 can be reliably turned off by the third clamp circuit 40. it can.

  In each of the above-described embodiments, the configuration of the control unit 50 is not limited to that shown in FIG. 2 and may be any configuration that can detect an abnormality in the output current of the switching element 300.

10 ... Driver, 20 ... 1st clamp circuit, 30 ... 2nd clamp circuit, 40 ... 3rd clamp circuit, 50 ... Control part, 100 ... Semiconductor device, 200 ... Load, 300 ... Switching element, VCC ... Power supply potential

Claims (2)

For the switching element (300) connected in series with the load (200) between the power supply node (T0) having the power supply potential and the first reference node (T1) having the predetermined reference potential. A control unit (50) for controlling a terminal-to-terminal potential difference between a first terminal connected to the power supply node side and a second terminal connected to the first reference node side to a predetermined clamp voltage. ,
The switching element has a control terminal for controlling a current flowing between the first terminal and the second terminal,
A first clamp circuit (20) connected between the first terminal and the control terminal and energized at a voltage equal to or higher than a first clamp voltage;
A second clamp voltage, which is connected between the control terminal and a second reference node serving as a reference potential of the control unit, charges and discharges the control terminal to reduce the inter-terminal potential difference to be lower than the first clamp voltage. A second clamp circuit (30)
A third clamp circuit (40) connected between the control terminal and the second terminal, for discharging the electric charge of the control terminal,
The control unit includes an overcurrent detection unit (50b) that detects a load current flowing through the load,
The control unit activates the second clamp circuit when the load current becomes equal to or higher than a predetermined threshold value, and activates the third clamp circuit after a predetermined time has elapsed since the second clamp circuit was activated. to,
The predetermined time τ from the activation of the second clamp circuit to the activation of the third clamp circuit is the inductance L including the load, the current value I flowing through the load, and the second clamp voltage. A semiconductor device which satisfies the relationship of τ ≧ IL / (V ₂ −VCC) by using V ₂ and a power supply potential VCC .   The semiconductor device according to claim 1, further comprising: a booster unit (33) for increasing a potential of the second clamp circuit with respect to a reference potential of the control unit, between the second clamp circuit and the second reference node.

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