JP6635681B2 - Image forming device - Google Patents

Description

  The present invention relates to an image forming apparatus, and more particularly, to an image forming apparatus as an example of an electronic apparatus having an operation state for suppressing power consumption, and to an image forming apparatus including a power supply apparatus that performs a power supply switching method.

  Conventionally, the following power supply devices have been provided as power supply devices for electronic devices having a driving unit. For example, a first DC power supply for supplying a relatively low voltage to control means such as a CPU and an ASIC, and a second DC power supply for supplying a relatively high voltage to drive system means such as a motor, a solenoid, and a cooling fan. 2. Description of the Related Art A power supply device that outputs a voltage of two systems of a power supply and a power supply is provided. In such a power supply device, an AC / DC converter into which a DC voltage obtained by rectifying and smoothing an AC voltage of a commercial power supply is supplied with a first DC voltage from a first DC power supply and a second DC power supply with a second DC power supply. , Respectively. In a power supply device for an electronic device provided with such a driving unit, since heat is easily stored in the electronic device, a stable power supply is maintained by cooling the power supply device with a cooling fan.

  On the other hand, in recent years, demands for energy saving in electronic devices have increased, and there has been a demand for lower power consumption of electronic devices including cooling fans and higher efficiency of power supply devices themselves. For this reason, a configuration has been proposed in which the second DC power supply and the cooling fan are stopped to reduce power consumption when the electronic device is on standby or in a power saving operation (for example, see Patent Document 1). Here, the electronic device does not need to drive the driving means during standby, power saving operation, and the like, so that the temperature of the power supply device is low and the cooling fan does not need to operate.

  In recent years, there are many electronic apparatuses provided with a plurality of communication units and power supply units for communication with external devices typified by the USB standard. Communication with an external device and power supply are also performed during the above-described power saving operation. Some connected external devices consume relatively large power. In a power supply device of an electronic device to which an external device having a large power consumption is connected, the first DC power supply for supplying power to the control system includes not only the electronic device but also the power consumed by the external device. Requires a relatively large power supply. For example, in Patent Literature 1, when a high temperature state is detected by a temperature detecting unit during a power saving operation, a second DC power supply is driven to supply relatively large power to perform cooling by a cooling fan. Have been.

JP 2007-079178 A

  However, in the conventional power supply device, a time delay occurs until the heat is transmitted from the element that generates heat in the power supply device to the temperature detecting unit. Therefore, it is necessary to set a threshold value for determining whether or not to operate the cooling fan according to the detection result of the temperature detection unit, in consideration of the above-described rapid change in the power supplied to the external device and the like. However, when the threshold value is set in this manner, there is a possibility that the effect of power saving may be reduced under a load condition that is stable enough to ignore the time delay of heat transfer. Further, when the cooling fan operates during the power saving operation in which the drive system does not operate, the operation sound of the electronic device due to the operation sound of the cooling fan is heard.

  The present invention has been made under such a situation. In the power saving state, when no power change occurs, the power saving effect is not reduced, and when the power change occurs, the electronic device is not affected. An object is to change a power state while suppressing an operation sound.

  In order to solve the above-described problem, the present invention has the following configuration.

(1) A first power supply that supplies power to a first load, a second power supply that supplies power to a second load, and power is supplied from the first power supply to the first load. wherein and the first load is driven, a first state in which said second load from said second power source power is supplied to the second load is driven, from the first power supply The power is supplied to the first load, the first load is driven, the supply of power from the second power supply to the second load is stopped, and the second load is stopped. An image forming apparatus operable in a second state, wherein the cooling unit is driven by being supplied with power from the second power supply, and the cooling unit cools the first power supply. When a detection means for detecting a current supplied to the first load from the first power source, to the second state There are, and a control means for controlling the operation of the cooling means based on a detection result of said detecting means, and a connecting portion which an external device is connected, wherein the control means is in said second state, said connection When the external device is connected to the unit and power from the first power supply is supplied to the external device, power is supplied from the second power supply to the cooling unit based on a detection result of the detection unit. An image forming apparatus configured to cool the first power supply by the cooling unit .

  According to the present invention, when no power change occurs in the power saving state, the power saving effect is not reduced, and when the power change occurs, the power state is changed while suppressing the operation sound of the electronic device. be able to.

1 is a block diagram illustrating a configuration of a power supply device and an image forming apparatus according to a first embodiment. FIG. 1 is a diagram illustrating a configuration of an image forming apparatus according to first to third embodiments. Circuit diagram of the power supply device according to the first embodiment FIG. 4 is a view for explaining a method of setting a drive voltage of a cooling fan according to the first embodiment. FIG. 7 is a diagram for explaining voltages and the like of respective units in each state of the first embodiment. FIG. 6 is a view for explaining transitions between respective states according to the first to third embodiments. FIG. 2 is a block diagram illustrating a configuration of a power supply device and an image forming apparatus according to a second embodiment. Circuit diagram of a power supply device according to a second embodiment FIG. 7 is a diagram for explaining voltages and the like of each part in each state of the third embodiment. 3 is a block diagram illustrating a configuration of a power supply device and an image forming apparatus according to a third embodiment, and a diagram illustrating details of switches. FIG. 7 is a diagram for explaining voltages and the like of each part in each state of the third embodiment.

  Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings by way of examples.

[Block diagram of image forming apparatus]
The first embodiment will be described using an image forming apparatus as an electronic apparatus including a power supply device. FIG. 1 is a diagram illustrating an entire configuration of a main part of a power supply system of a power supply device and an image forming apparatus according to the present embodiment. An AC voltage of an AC power supply 1 which is a commercial power supply is supplied to the image forming apparatus 100. The AC power supply 1 is input to a low voltage power supply 101 which is a power supply device. The low-voltage power supply 101 includes a rectifier 102, a DC power supply 103 that is a first power supply that outputs 3.3V, a DC power supply 104 that is a second power supply that outputs 24V, and an output current of the DC power supply 103. And a current detection unit 108 which is a detection unit for detection. The rectifier 102 includes a full-wave rectifier circuit and a primary smoothing capacitor, rectifies and smoothes an AC voltage input from the AC power supply 1, and outputs a primary DC voltage 105. The DC power supply 103 generates an output voltage 106 of 3.3 V from the primary DC voltage 105 input from the rectifier 102. The DC power supply 104 generates an output voltage 107 of 24 V from the primary DC voltage 105 input from the rectifier 102.

  The output voltage 106 generated by the DC power supply 103 is supplied as a power supply voltage to a CPU 111 serving as a first load, an external connection circuit 112 serving as a connection unit, and an image controller 113. The current detection unit 108 outputs a detection result 114 obtained by converting the detected current value to a voltage value to the CPU 111 as a control unit. The CPU 111 controls the start (hereinafter, referred to as ON) or the stop (hereinafter, referred to as OFF) of the operation of the DC power supply 104 by the ON / OFF signal 115 based on the detection result 114 input from the current detection unit 108. .

  The output voltage 107 generated by the DC power supply 104 is supplied to an actuator 109 such as a motor, a solenoid, or a clutch, which is a second load necessary for the operation of the image forming apparatus 100. The output voltage 107 generated by the DC power supply 104 is also supplied to a DC power supply 116 as a third power supply. Here, the DC power supply 116 supplies a voltage for driving the low-voltage power supply 101 and a cooling fan 630 that is a cooling unit for cooling the inside of the image forming apparatus 100. The CPU 111 outputs a drive voltage setting signal (hereinafter, simply referred to as a setting signal) 119 to the voltage setting unit 118. Voltage setting section 118 sets the output voltage of DC power supply 116 such that DC power supply 116 outputs a voltage of 10 V to 24 V according to setting signal 119 input from CPU 111. DC power supply 116 outputs a driving voltage of 10 V to 24 V set by voltage setting unit 118 to cooling fan 630. Cooling fan 630 rotates at a rotation speed according to the drive voltage input from DC power supply 116. The rotation speed of the cooling fan 630 increases in proportion to the drive voltage input from the DC power supply 116. When the drive voltage is 24V, the rotation speed becomes the maximum rotation speed among the operable rotation speeds of the cooling fan 630.

  The control unit 110 has a CPU 111, an image controller 113, and an external connection circuit 112. The image controller 113 processes image data transmitted from a host computer or the like (not shown) connected to the external connection circuit 112 and outputs a signal to an image forming unit (not shown) controlled by the CPU 111. The CPU 111 executes various programs stored in the ROM 111a, and controls the image forming apparatus 100 using the electrophotographic process while using the RAM 111b as a work area. Further, the CPU 111 forms an image based on a signal corresponding to the image data input from the image controller 113. The external connection circuit 112 communicates with external devices such as a host computer and a plurality of external devices such as USB devices. Further, the external connection circuit 112 also has a function of supplying power generated by the low-voltage power supply 101 to a plurality of external devices, and thereafter, the external connection circuit 112 supplies power to the plurality of external devices. Is expressed as

[Configuration of Image Forming Apparatus]
Next, the configuration of the image forming apparatus will be described. FIG. 2 is a diagram illustrating an outline of the image forming apparatus 100 according to the present embodiment. The recording paper 619 loaded on the paper feed cassette 601 is fed from the paper feed cassette 601 to the conveyance path by the pickup roller 602, and is conveyed to the registration roller 604 by the paper feed roller 603. Further, the recording paper 619 is conveyed to the process cartridge 605 by the registration roller 604 at a predetermined timing. When the recording paper 619 is conveyed, an actuator 109 such as a motor or a solenoid operates.

  The process cartridge 605 is configured integrally with a charging roller 606, a developing roller 607 as a developing unit, a cleaner 608 as a cleaning unit, and a photosensitive drum 609 as an electrophotographic photosensitive member that rotates counterclockwise in the drawing. ing. After the surface of the photosensitive drum 609 is uniformly charged by the charging roller 606, exposure based on an image signal is performed by a scanner unit 611 as an exposure unit. The laser light emitted from the laser diode 612 in the scanner unit 611 is scanned in the direction of the rotation axis of the photosensitive drum 609 (hereinafter, referred to as the main scanning direction) via the rotating polygon mirror 613 and the reflection mirror 614. Further, the laser light is scanned in the rotation direction of the photosensitive drum 609 (hereinafter, referred to as a sub-scanning direction) by the rotation of the photosensitive drum 609. As a result, a two-dimensional latent image is formed on the surface of the photosensitive drum 609 (on the photoconductor). The latent image formed on the photosensitive drum 609 as described above is developed by the developing roller 607 and is visualized as a toner image. At the time of forming these images, a motor for rotating the rotary polygon mirror 613 and an actuator 109 such as a motor, a solenoid, and a clutch for rotating the photosensitive drum 609 and the developing roller 607 operate.

  The toner image formed on the photosensitive drum 609 is transferred by the transfer roller 610 onto the recording paper 619 conveyed from the registration roller 604. An unfixed toner image is formed on the recording paper 619 by a series of processes of the electrophotographic process. Subsequently, when the recording paper 619 onto which the toner image has been transferred is conveyed to a fixing device 615 serving as a fixing unit, the recording paper 619 is heated and pressed, and the unfixed toner image on the recording paper 619 is fixed on the recording paper 619. You. The recording paper 619 is further discharged out of the main body of the image forming apparatus 100 by the intermediate conveyance roller 616 and the paper discharge roller 617, and a series of printing operations is completed. A motor 618 (denoted by M in the figure) as a driving unit applies a driving force to each unit including the fixing unit 615. Further, the temperature inside the image forming apparatus 100 increases due to the fixing device 615 and the low-voltage power supply 101 shown in FIG. The CPU 111 rotates the cooling fan 630 (denoted by F in the figure) to lower the temperature inside the image forming apparatus 100 that has risen.

[Configuration of low-voltage power supply]
Next, the configuration of the low-voltage power supply 101 will be described. FIG. 3 is a diagram illustrating the configuration of the low-voltage power supply 101. In this embodiment, examples of a flyback type power supply and a current resonance type power supply will be described. The same components as those described in FIG. 1 are denoted by the same reference numerals. The rectifier 102 has a full-wave rectifier circuit 2 and a primary smoothing capacitor 3. The DC power supply 103 is a flyback type switching power supply, and the DC power supply 104 is a current resonance type switching power supply. Note that the DC power supply 103 may be a current resonance type power supply, and the DC power supply 104 may be a flyback type switching power supply. In this embodiment, any type of power supply may be used.

  The full-wave rectifier circuit 2 rectifies the AC voltage of the AC power supply 1 and outputs the full-wave rectified voltage to the primary smoothing capacitor 3. The primary smoothing capacitor 3 generates the primary DC voltage 105 by smoothing the full-wave rectified voltage. The primary DC voltage 105 is output to a DC power supply 103 which is a flyback type power supply and a DC power supply 104 which is a current resonance type power supply.

(DC power supply 103)
In the DC power supply 103, an insulating transformer 31 and a switching element 32 (hereinafter, referred to as an FET 32) of a MOS-FET arranged in series are connected in parallel to both ends of the primary smoothing capacitor 3. The insulating transformer 31 has a primary winding 31a and a secondary winding 31b. On / off of the FET 32 is controlled by a signal input to the control terminal from the control circuit 30. A rectifying / smoothing circuit including a diode 33 and a smoothing capacitor 34 is connected to the secondary winding 31 b of the insulating transformer 31. This rectifying and smoothing circuit half-wave rectifies and smoothes the voltage (on / off controlled pulse voltage) induced in the secondary winding 31b of the insulating transformer 31, and outputs an output voltage 106.

  The output voltage 106 is divided by the resistors 37 and 38, and the divided voltage is input to the reference terminal of the shunt regulator 39. The shunt regulator 39 changes the output of the cathode terminal supplied to the photocoupler 41 so that the reference terminal has a constant voltage (hereinafter, referred to as a reference voltage). The photocoupler 41 feeds back the output of the cathode terminal of the shunt regulator 39 from the secondary side to the primary side while maintaining the insulation between the primary side and the secondary side. Further, the resistor 40 is connected to limit a current flowing to the photodiode 41b which is a light emitting element of the photocoupler 41. When the reference voltage of the shunt regulator 39 is 1.25 V and the resistance values of the resistors 37 and 38 are 23 kΩ and 14 kΩ, respectively, the output voltage 106 is about 3.3 V.

  The control circuit 30 changes the switching frequency of the switching operation by the FET 32 according to the magnitude of the current flowing through the phototransistor 41a, which is the light receiving element of the photocoupler 41. When the switching frequency of the FET 32 changes, the amount of energy transmitted from the primary side to the secondary side via the insulating transformer 31 also changes. As a result, the output voltage 106 output from the DC power supply 103 is controlled to be constant.

(DC power supply 104)
To both ends of the primary smoothing capacitor 3, a series circuit of switching elements 8, 9 (hereinafter, referred to as FET8, FET9) of MOS-FET is connected. The control terminal of the FET 8 receives the signal VQ1gs from the control circuit 7, and the control terminal of the FET 9 receives the signal VQ2gs from the control circuit 7. An insulating transformer 11 is connected in parallel with the FET 9. The primary winding 11a of the insulating transformer 11 is equivalently represented by the exciting inductance 12 and the leakage inductance 13, and the leakage inductance 13 and the current resonance capacitor 14 form a series resonance circuit. Further, a voltage resonance capacitor 10 is connected in parallel with the FET 9.

  The secondary winding 11b of the insulating transformer 11 is wound in two phases, one is wound so as to generate a voltage having the same phase as the primary winding 11a, and the other is wound with a voltage having a phase opposite to that of the primary winding 11a. Wound to occur. A rectifying / smoothing circuit including diodes 15A and 15B and a smoothing capacitor 16 is connected to the secondary winding 11b of the insulating transformer 11. This rectifying and smoothing circuit performs full-wave rectification and smoothing on the voltage (on / off-controlled pulse voltage) induced in the secondary winding 11b of the insulating transformer 11, and outputs an output voltage 107. The output voltage 107 is divided by the resistors 51 and 52, and the divided voltage is input to the reference terminal of the shunt regulator 19. The shunt regulator 19 changes the output of the cathode terminal supplied to the photocoupler 21 so that the reference terminal has a constant voltage. The photocoupler 21 feeds back the output of the cathode terminal of the shunt regulator 19 from the secondary side to the primary side while maintaining the insulation between the primary side and the secondary side, and inputs the feedback voltage to the FB terminal of the control circuit. Is done. The resistor 20 is inserted to limit a current flowing to the photodiode 21b, which is a light emitting element of the photocoupler 21. When the reference voltage of the shunt regulator 19 is 2.5 V and the resistance values of the resistors 51 and 52 are 50 kΩ and 5.8 kΩ, respectively, the output voltage 107 becomes about 24 V.

  The control circuit 7 changes the switching frequency of the switching operation by the FET 8 and the FET 9 according to the magnitude of the current flowing through the phototransistor 21a as the light receiving element of the photocoupler 21. As the switching frequency of the FETs 8 and 9 changes, the amount of energy transmitted from the primary side to the secondary side of the insulating transformer 11 also changes. As a result, the output voltage 107 output from the DC power supply 104 is controlled to be constant.

[On or off of DC power supply 104]
Turning on or off of the DC power supply 104 will be described. The ON / OFF state of the DC power supply 104 is controlled by changing the state of the ON / OFF signal 115 by the CPU 111 of the control unit 110, thereby controlling the input level of the ON terminal of the control circuit 7. The control circuit 7 is turned on when the ON terminal goes high, and performs the switching operation of the FETs 8 and 9, and is turned off when the ON terminal goes low, and stops the switching operations of the FETs 8 and 9.

  When the DC power supply 104 is turned on, the CPU 111 outputs a high-level ON / OFF signal 115. When a high-level ON / OFF signal 115 is input to the base terminal of the transistor 62 via the resistor 60, a base current flows to the transistor 62, and the transistor 62 is turned on. The transistor 62 has a base terminal connected to the CPU 111, an emitter terminal grounded, and a collector terminal connected to the cathode terminal of the photodiode 63b of the photocoupler 63.

  The photocoupler 63 has a photodiode 63b on the secondary side. The cathode terminal of the photodiode 63 b is connected to the collector terminal of the transistor 62, and the anode terminal of the photodiode 63 b is a voltage of 3.3 V which is the output voltage 106 of the DC power supply 103 via the resistor 61 (hereinafter also referred to as 3.3 V power supply). Is entered. As a result, a current limited by the resistor 61 flows from the 3.3 V power supply to the photodiode 63b of the photocoupler 63, and a current corresponding to the current flows to the phototransistor 63a of the photocoupler 63. When a current flows through the phototransistor 63a of the photocoupler 63, a voltage obtained by dividing the voltage across the primary smoothing capacitor 3 by the resistors 64 and 65 is input to the ON terminal of the control circuit 7. As a result, the control circuit 7 is turned on, and the switching operation of the FETs 8 and 9 is started, so that the DC power supply 104 outputs the output voltage 107 of 24V.

  When the DC power supply 104 is turned off, the CPU 111 outputs a low-level ON / OFF signal 115 on the contrary. When a low-level ON / OFF signal 115 is input to the base terminal of the transistor 62 via the resistor 60, the transistor 62 is turned off. As a result, no current flows through the photodiode 63b of the photocoupler 63, and the phototransistor 63a of the photocoupler 63 is also turned off. As a result, the ON terminal of the control circuit 7 becomes low level, and the switching operation of the FETs 8 and 9 is stopped, so that the output voltage 107 of 24 V is not output from the DC power supply 104.

  The image forming apparatus 100 has two operation states, an operation state in which an actuator 109 such as a motor and a solenoid is driven by an image forming operation, and a standby state in which the actuator 109 is stopped until the next image forming operation is started. Have. The CPU 111 switches the on / off state of the DC power supply 104 according to two operation states (an operation state and a standby state). In the operating state, which is the first state, the actuator 109 such as a motor or a solenoid is driven, so that the DC power supply 104 is turned on. On the other hand, in the standby state, which is the second state, the DC power supply 104 is basically turned off in consideration of the fact that the actuator 109 is not driven and power saving. However, the CPU 111 switches the state of the DC power supply 104 from OFF to ON even in the standby state based on the detection result 114 of the current detection unit 108 that detects the current of the DC power supply 103 operating in the standby state. Is controlled.

[Current detection unit 108]
Here, the current detection unit 108 configured at the output terminal of the DC power supply 103 will be described. The current detection unit 108 includes a current detection resistor 42, a non-inverting amplifier circuit including an operational amplifier 43, resistors 44 and 45, and a capacitor 46. The current output from the output terminal of the DC power supply 103 is supplied to the CPU 111, the external connection circuit 112, and the image controller 113, passes through the GND1 line of the output terminal 47, passes through the current detection resistor 42, and connects to the two It returns to the next winding 31b. The two ends (GND1 to GND2) of the current detection resistor 42 generate a potential difference of “GND1> GND2” due to the returned current, and the generated potential difference increases as the feedback current increases. The reference voltage of the operational amplifier 43 is connected to GND2, and the output voltage of the operational amplifier 43 is a voltage amplified by the ratio of the resistors 44 and 45 to the non-inverting input terminal voltage.

Therefore, when the output of the current detection unit 108 is Io, the feedback current is Io, the resistance value of the current detection resistor 42 is R42, the resistance values of the resistors 44 and 45 are R44 and R45, and the output voltage of the current detection unit 108 is Vi. It is represented by equation (1). The output voltage Vi of the current detection unit 108 is a voltage that is proportional to the voltage between both ends (GND1 to GND2) of the current detection resistor 42 as represented by Expression (1).
Vi = ((R44 + R45) / R44) × Io × R42 (1)
The output voltage Vi of the current detection unit 108 is output from the output terminal of the operational amplifier 43 to the AD input terminal of the CPU 111 as a detection result 114. The CPU 111 compares a preset voltage (hereinafter, referred to as a cooling threshold (predetermined value)) with an output voltage Vi of the current detection unit 108, and determines an operation state (ON / OFF) of the DC power supply 104 and a cooling fan. The output voltage of DC power supply 116 used for driving 630 is determined.

  When the image forming apparatus 100 is in the standby state, the DC power supply 104 is basically in the off state. In this case, even when the cooling fan 630 is stopped, the temperature of the DC power supply 103 rises below the rated temperature. This is because the power of each unit supplied with power from the DC power supply 103 is set lower than the operating state in consideration of energy saving. Specifically, when the image forming apparatus 100 is in a standby state, the image controller 113 is in an operation stopped state in order not to perform an image forming process. Further, the external connection circuit 112 that performs communication and power supply with a USB device or the like (not shown) does not receive image data or the like in the standby state of the image forming apparatus 100, and the power supplied from the DC power supply 103 is low. Become.

Therefore, with respect to the output voltage Vi of the current detection unit 108 which detects the output current of the DC power supply 103, the relationship between the output voltage Vi in the operating state, the output voltage Vi in the standby state, and the cooling threshold is as follows.
Operating state output voltage Vi> cooling threshold> standby state output voltage Vi
Becomes In this way, the CPU 111 controls the temperature rise of the DC power supply 104 to be equal to or lower than the rated temperature even when the cooling fan 630 is stopped.

However, a plurality of external devices may be connected to the external connection circuit 112. In the image forming apparatus 100 according to the present embodiment, the external connection circuit 112 has a host controller function of a plurality of USB devices in addition to communication with a host computer. The host controller function of a USB device has a standardized power supply capability. For example, in the USB 3.0 standard, a supply capability of a maximum of 5.25 V / 900 mA from a USB host is standardized. When a plurality of USB devices are connected to the external connection circuit 112 having such a host controller function, the following situation occurs. That is, even when the image forming apparatus 100 is in the standby state, it is necessary to simultaneously supply power to an external USB device (not shown) or an external device connectable to host terminals of a plurality of USB devices. Therefore, when a plurality of external devices are connected at the same time, the output current of the DC power supply 103 increases, and the relationship between the output voltage Vi of the current detection unit 108 and the cooling threshold value becomes
The output voltage Vi in the standby state is greater than the cooling threshold. In such a state, the temperature of the semiconductor element such as the FET 32 and the diode 33 instantaneously rises. Therefore, it is necessary to immediately cool the DC power supply 103 by the cooling fan 630.

  In this embodiment, when the output voltage Vi of the current detection unit 108 of the DC power supply 103 input to the CPU 111 exceeds the cooling threshold, the DC power supply 104 is turned on. Thus, in the present embodiment, a predetermined voltage is supplied to the cooling fan 630 via the DC power supply 116 to cool the DC power supply 103. With such a configuration, the state in which the power consumption is reduced can be maintained until the state immediately before the load current of the DC power supply 103 increases, and when the load current increases, the power supply state is quickly changed. Can switch.

  When driving the cooling fan 630 in the standby state by connecting a plurality of external devices or the like, the CPU 111 sets the output voltage of the DC power supply 116 to be 10 V to 12 V. This is because the operating speed of the image forming apparatus 100 in the standby state is suppressed by lowering the rotation speed of the cooling fan 630. Furthermore, in the present embodiment, when the cooling fan 630 is driven while the image forming apparatus 100 is operating, the output voltage of the DC power supply 116 is set to be 24V.

[Drive voltage of cooling fan]
The drive voltage of the cooling fan 630 will be described with reference to FIGS. FIG. 4 is a diagram illustrating a method for setting the drive voltage of the cooling fan 630. FIG. 5 is a diagram illustrating the state of each unit related to the setting of the drive voltage of cooling fan 630. FIG. 5A illustrates the output voltage Vi of the current detection unit 108 and the operation state of the image forming apparatus 100, and the cooling threshold is indicated by a broken line. FIG. 5B shows the on / off state (shown as ON / OFF) of the DC power supply 104 and the operation state of the image forming apparatus 100. FIG. 5C shows the driving voltage of the cooling fan 630 output from the DC power supply 116 and the operation state of the image forming apparatus 100. FIG. 5D shows the setting signal 119 and the operation state of the image forming apparatus 100. The horizontal axis indicates time.

  The CPU 111 switches the level of the setting signal 119 shown in FIG. 4 based on the operation state of the image forming apparatus 100 and the output voltage Vi of the current detection unit 108. The setting signal 119 is input to a voltage setting unit 118 including a digital transistor 71 and a resistor 72. In the digital transistor 71, the setting signal 119 is input to the base terminal, the output voltage (24 V) of the DC power supply 104 is input to the collector terminal via the resistors 72 and 73, and the emitter terminal is grounded. The voltage setting unit 118 is connected to the DC power supply 116, and controls the base current of the transistor 74 together with the resistance 73 of the DC power supply 116.

  In the transistor 74, a voltage obtained by dividing the output voltage of the DC power supply 104 by the resistors 72 and 73 is input to a base terminal, and the output voltage of the DC power supply 104 is input to an emitter terminal. The transistor 74 has a collector terminal grounded via a current regeneration diode 77. The current regeneration diode 77 has a cathode terminal connected to the collector terminal of the transistor 74 and an anode terminal grounded. A protection diode 75 is connected between the emitter terminal and the collector terminal of the transistor 74. Specifically, the cathode terminal of the protection diode 75 is connected to the emitter terminal of the transistor 74, and the anode terminal is connected to the collector terminal of the transistor 74. Further, the collector terminal of the transistor 74 is connected to one end of the coil 76. The other end of the coil 76 is connected to one end of a capacitor 78. The other end of the capacitor 78 is grounded.

  The DC power supply 116 has a configuration in which the transistor 74 is turned on or off by the 24 V supplied from the DC power supply 104, the voltage setting unit 118, and the resistor 73. A smoothing circuit including a coil 76 and a capacitor 78 is connected to the collector terminal of the transistor 74. A current regeneration diode 77 is arranged between the transistor 74 and the smoothing circuit in parallel with the smoothing circuit, and a protection diode 75 for the transistor 74 is arranged in parallel with the transistor 74. The voltage output from the smoothing circuit including the coil 76 and the capacitor 78 is supplied to the cooling fan 630 as a drive voltage for the cooling fan 630.

[Operation of each part]
Next, the detailed operation of each unit will be described with reference to FIG. First, in the operating state of the image forming apparatus 100, it is necessary to drive the actuator 109 and the like necessary for the image forming operation. Therefore, as shown in FIG. 5B, the CPU 111 turns on the DC power supply 104. Further, in this state, the actuator 109 and the like are being driven, and the output voltage Vi of the current detecting unit 108 shown in FIG. 5A is larger than a predetermined value, that is, the relationship of “Vi> cooling threshold” is satisfied. , The DC power supply 104 and the DC power supply 103 need to be cooled. Therefore, the CPU 111 sets the setting signal 119 to a high level (shown as Hi) as shown in FIG. As a result, the digital transistor 71 of the voltage setting unit 118 is turned on, a voltage obtained by dividing the 24 V power supply by the resistor 72 and the resistor 73 is input to the base terminal of the transistor 74 of the DC power supply 116, and the transistor 74 is turned on. Necessary base current flows. Thus, the transistor 74 is turned on. While the setting signal 119 is at the high level, the transistor 74 holds the ON state. Therefore, as shown in FIG. 5C, the output of the DC power supply 116 via the smoothing circuit including the coil 76 and the capacitor 78 becomes 24 V, and is supplied to the cooling fan 630 as a driving voltage for the cooling fan 630. The cooling fan 630 to which the driving voltage of 24 V is supplied rotates at the maximum rotation speed (hereinafter referred to as full speed) among the rotation speeds at which the cooling fan 630 can rotate.

  Next, the image forming apparatus 100 shifts from the operating state to the standby state at the timing t1. In the standby state of the image forming apparatus 100, power consumption is suppressed as much as possible. Therefore, as shown in FIG. 5B, when the image forming apparatus 100 shifts to the standby state at the timing t1, the CPU 111 turns off the DC power supply 104. In this state, the output voltage Vi of the current detection unit 108 shown in FIG. 5A satisfies the relationship of a predetermined value or less, that is, “Vi ≦ cooling threshold”, and the DC power supply 103 needs to be cooled by the cooling fan 630. do not do. Therefore, the CPU 111 sets the setting signal 119 to a low level (illustrated as Lo) as shown in FIG. Thus, the digital transistor 71 of the voltage setting unit 118 is turned off, and the output of the transistor 74 of the DC power supply 116 from the DC power supply 104, which is a 24V power supply, is input to the base terminal via the resistor 73.

  At this time, as shown in FIG. 5B, since the DC power supply 104 is off and the output is stopped (zero V), the potential difference between the emitter and the base of the transistor 74 becomes almost zero V, and the digital transistor 71 is turned on. Therefore, it is impossible to supply a necessary base current. Thus, the transistor 74 is turned off. While the setting signal 119 is at the low level, the transistor 74 holds the off state. Therefore, the output of the DC power supply 116 via the smoothing circuit including the coil 76 and the capacitor 78 becomes zero V, and the cooling fan 630 stops.

  Here, in the standby state of the image forming apparatus 100, when a plurality of external devices such as USB devices are connected at the timing t2, the output voltage Vi of the current detection unit 108 illustrated in FIG. > Cooling threshold ”. The state in which a plurality of external devices are connected in the standby state is referred to as a plurality of external device connection states. The CPU 111 turns on the DC power supply 104 based on the detection result 114 of the current detection unit 108 (FIG. 5B). Further, as shown in FIG. 5D, the CPU 111 outputs a setting signal 119 which is a pulse signal (PWM signal) having a predetermined frequency and a predetermined ON width to the voltage setting unit 118. In this embodiment, the setting signal 119 output from the CPU 111 is a PWM signal having a frequency of 100 kHz and a duty ratio of 50%. As a result, the digital transistor 71 of the voltage setting unit 118 repeatedly turns on or off in synchronization with the setting signal 119, and the transistor 74 of the DC power supply 116 also repeats on or off in synchronization with the setting signal 119.

  While the setting signal 119 output from the CPU 111 is a PWM signal, the transistor 74 repeats the ON or OFF state. At this time, the collector voltage of the transistor 74 is a pulse voltage having an amplitude of 24 V, a frequency of 100 kHz, and a duty ratio of 50%. Here, the operation delay of the digital transistor 71 and the transistor 74, the ON resistance of the transistor 74, and the forward voltage of the current regeneration diode 77 are ignored. As a result, the output of the DC power supply 116 via the smoothing circuit including the coil 76 and the capacitor 78 becomes about 10 V to 12 V, and this voltage is supplied to the cooling fan 630 as a driving voltage for the cooling fan 630. The cooling fan 630 to which the driving voltage of 10 V to 12 V is supplied rotates at a rotation speed of about half of the second speed (hereinafter, referred to as half speed) with respect to the full speed of the first speed. .

[State transition]
FIG. 6 is a state transition diagram of the image forming apparatus 100 according to the present embodiment. Note that the state transition of FIG. 6 is also applied to the second and third embodiments described later. In the present embodiment, as described above, there are three states: an operating state, a standby state in which a plurality of external devices are not connected (illustrated as a plurality of external device unconnected states), and a standby state in which a plurality of external devices are connected. Exists. The state transition includes the following three transitions T1 to T3, and the state transitions from the current state to any state.
T1: Transition from the standby state to the operating state.
Transition condition: data related to image formation is transmitted from a host computer or the like. T2: From an operating state or a standby state in which a plurality of external devices are connected, to a standby state in which a plurality of external devices having the highest energy saving effect are not connected. Transition.
Transition condition: Vi ≦ cooling threshold T3: Transition from the operating state or the standby state in which a plurality of external devices are not connected to the standby state in which a plurality of external devices are connected.
Transition condition: Vi> cooling threshold

  Note that T2 or T3, which is a transition from the operating state to the standby state, is a condition for a transition to the standby state after the image forming operation is completed. When transitioning from the operating state to the standby state, if “Vi ≦ cooling threshold” is satisfied, the transition is T2, and the state transitions to a standby state in which a plurality of external devices are not connected. When transitioning from the operating state to the standby state, if “Vi> cooling threshold” is satisfied, the transition is T3, and the state transitions to the standby state in which a plurality of external devices are connected.

  In a standby state where a plurality of external devices are connected, the load current of the DC power supply 103 is larger than in the standby state and smaller than in the operating state. Also, the DC power supply 104 does not operate the actuator 109 or the like, and the load current is small. Therefore, both the DC power supply 103 and the DC power supply 104 can sufficiently cool the cooling fan 630 even at a half-speed rotation speed. Further, since the cooling fan 630 rotates at half speed, there is an effect that the operation sound level of the image forming apparatus 100 can be suppressed as compared with the case where the cooling fan 630 rotates at full speed. Therefore, in this embodiment, the rotation speed when operating the cooling fan 630 in the standby state is half speed. In this embodiment, the rotation speed of the cooling fan 630 in the standby state is set to about half of the rotation speed in the operation state. However, the rotation speed of the cooling fan 630 in the standby state is not limited to half speed because the rotation speed may be an operation sound smaller than the operation sound of the cooling fan 630 in the operation state. The same applies to the example.

  Conventionally, the determination when switching the power supply state has been performed according to the detection result of the temperature detection of the power supply device. Therefore, in the case of an electronic device in which a sudden change in power occurs due to power supplied to an external device or the like, a high power supply can be performed even from a relatively low power state in consideration of a time delay of heat conduction. It was necessary to be able to transition to a possible state. That is, even if a low temperature is detected by the temperature detecting means, it is necessary to quickly switch the power state to a state where high power can be supplied. On the other hand, in the present embodiment, the above-described configuration provides the following effects even in an electronic device in which a sudden change in power occurs due to power supplied to an external device or the like. That is, the power supply state can be immediately changed according to the detection result of the current detection unit 108 without sacrificing energy saving. Furthermore, the level of the operation sound of the electronic device in the standby state can be suppressed as compared with the related art.

  As described above, according to the present embodiment, when no power change occurs in the power saving state, the effect of the power saving is not reduced, and when the power change occurs, the operation state of the electronic device is suppressed while the power state is suppressed. Can be changed.

[Block diagram of image forming apparatus]
FIG. 7 illustrates an overall configuration of a main part of a power supply system of the low voltage power supply 101 and the image forming apparatus 100, which are power supply apparatuses according to the second embodiment. In FIG. 7, components denoted by the same reference numerals as the reference numerals assigned to the respective components of the circuit configuration of the first embodiment illustrated in FIG. 1 indicate components having the same functions. FIG. 7 is different from FIG. 1 shown in the first embodiment in that the voltage setting unit 118 and the DC power supply 116 are deleted, the voltage setting unit 117 is added to the low-voltage power supply 101, and the voltage is output from the CPU 111 to the voltage setting unit 117. A drive voltage setting signal (hereinafter, referred to as a setting signal) 120 is added. Further, in the present embodiment, the cooling fan 630 rotates by being supplied with a drive voltage from the DC power supply 104. Other configurations are the same as those of the first embodiment.

[Configuration of low-voltage power supply]
FIG. 8 shows the configuration of the low-voltage power supply 101 which is the power supply device in FIG. 8, the same components as those described in FIG. 3 are denoted by the same reference numerals, and description thereof will be omitted. 8, a setting signal 120 output from the CPU 111 is input to the gate terminal of the FET 54 of the voltage setting unit 117. In the present embodiment, switching of the output voltage 107 of the DC power supply 104 is realized by the on / off state of the FET 54. The voltage setting section 117 of this embodiment includes resistors 51 and 52 for inputting a divided voltage to the reference terminal of the shunt regulator 19. In this embodiment, a resistor 53 and an FET 54 connected in series are connected in parallel to the resistor 52.

When the setting signal 120 is at the high level, the gate terminal of the FET 54 becomes higher than the ON voltage, and the FET 54 is turned ON. As a result, the output voltage 107, which has been input to the reference terminal of the shunt regulator 19 and is divided by the resistors 51 and 52, becomes the following voltage. That is, the output voltage 107 is divided by the resistor 51 and the combined resistance of the resistors 52 and 53 connected in parallel, and the divided voltage is input to the reference terminal of the shunt regulator 19. Here, the on-resistance of the FET 54 is not considered. In this embodiment, the output voltage 107 of the DC power supply 104 is set to be 24 V in this state. That is, in this embodiment, the reference voltage of the shunt regulator 19 is 2.5 V, the resistance 51 is 50 kΩ, the resistance 52 is 13 kΩ, and the resistance 53 is 10.5 kΩ. Thus, the output voltage 107 of the DC power supply 104 is controlled to be constant at about 24V.
2.5 × (50 k + (10.5 k // 13 k)) / (10.5 k // 13 k)) = 24 [V]
“10.5k // 13k” represents a combined resistance value when the resistance 53 and the resistance 52 are connected in parallel.

Next, when the setting signal 120 is at a low level, the gate terminal of the FET 54 becomes lower than the ON voltage, and the FET 54 is turned off. As a result, a voltage obtained by dividing the output voltage 107 by the resistors 51 and 52 is input to the reference terminal of the shunt regulator 19. In this state, when the reference voltage of the shunt regulator 19 and the resistance values of the resistors 51 and 52 are the above-described values, the output voltage 107 is controlled to be constant at about 12V.
2.5 × (50k + 13k) / 13k = 12 [V]
In the present embodiment, as described above, the output voltage 107 of the DC power supply 104 is switched, and the drive voltage of the cooling fan 630 in the standby state is changed.

[Operation of each part]
FIGS. 9A and 9B are diagrams illustrating the state of each unit related to the setting of the drive voltage of the cooling fan 630 according to the present embodiment. FIG. 9A is illustrated in FIG. 5A, and FIG. b) respectively. FIG. 9C shows the output voltage 107 of the DC power supply 104, that is, the drive voltage of the cooling fan 630 of this embodiment. FIG. 9D shows a setting signal 120 output from the CPU 111 to the voltage setting unit 117. Hereinafter, the power supply device and the power supply system according to the present embodiment will be specifically described with reference to FIGS. 7, 8, and 9. FIG. Note that the present embodiment is different from the first embodiment only in an operation in a standby state in which a plurality of external devices are connected. Therefore, the description of the same configuration and operation as those of the first embodiment is omitted, and the operation in a standby state in which a plurality of external devices are connected will be described. When the image forming apparatus 100 is operating, the CPU 111 outputs a high-level ON / OFF signal 115, the DC power supply 104 is on, and the CPU 111 outputs a high-level setting signal 120. , And the output voltage 107 is 24V. Further, in the standby state of the image forming apparatus 100, the CPU 111 outputs the low-level setting signal 120, but outputs the low-level ON / OFF signal 115, and the DC power supply 104 is off. .

  In a standby state of the image forming apparatus 100, when a plurality of external devices such as USB devices are connected at a timing t2, the output voltage Vi of the current detection unit 108 illustrated in FIG. Is the relationship. The CPU 111 turns on the DC power supply 104 based on the detection result 114 of the current detection unit 108 (FIG. 9B). At this time, as shown in FIG. 9D, the CPU 111 outputs a low-level setting signal 120 to the voltage setting unit 117. As a result, the FET 54 of the voltage setting unit 117 is turned off, and the output voltage 107 of the DC power supply 104 is controlled to be constant at 12 V as shown in FIG. 9C. The cooling fan 630 to which the driving voltage of 12 V is supplied rotates at approximately half speed with respect to the full rotation speed.

  As described above, when the output voltage 107 of the DC power supply 104 is switched, consumption by a resistance component connected to the secondary side of the DC power supply 104 such as a drive circuit (not shown) configured to drive the actuator 109 and the like is achieved. The power can be reduced. In the present embodiment, even in an electronic device in which a sudden change in power occurs due to power supplied to an external device or the like, the power consumption of the entire electronic device when the cooling fan 630 operates at half speed is further reduced. It becomes possible. In this embodiment, the power supply state can be changed immediately.

  As described above, according to the present embodiment, when no power change occurs in the power saving state, the effect of the power saving is not reduced, and when the power change occurs, the operation state of the electronic device is suppressed while the power state is suppressed. Can be changed.

[Block diagram of image forming apparatus]
FIG. 10A illustrates an overall configuration of a main part of a power supply system of the low-voltage power supply 101 and the image forming apparatus 100 as the power supply of the third embodiment. In FIG. 10A, components denoted by the same reference numerals as those given to the respective portions of the circuit configuration illustrated in FIGS. 1 and 7 indicate components having the same functions, and overlapping descriptions will be omitted. FIG. 10A is different from FIG. 7 in the second embodiment in that the configuration of power supply to the external connection circuit 112 is changed. Specifically, a diode 121 is connected between the output voltage 106 of the DC power supply 103 and the external connection circuit 112. The diode 121 has an anode terminal connected to the current detection unit 108 and a cathode terminal connected to the external connection circuit 112. In FIG. 10A, the DC power supply 104 is connected to the external connection circuit 112 as compared with FIG. A switch 124 and a diode 122 arranged in series are connected between the DC power supply 104 and the external connection circuit 112. Further, a control signal 125 for turning on or off the switch 124 is input from the CPU 111 to the switch 124. The diode 122 has a cathode terminal connected to the external connection circuit 112 and an anode terminal connected to one end of the switch 124. The other end of the switch 124 is connected to the DC power supply 104. As described above, in the present embodiment, the external connection circuit 112 is in a state where power can be supplied from either the DC power supply 103 or the DC power supply 104. The power supply line of the external connection circuit 112 connected to the diode 121 and the diode 122 is denoted by reference numeral 123.

[Configuration of low-voltage power supply]
FIG. 10B illustrates a circuit configuration of power supply to the external connection circuit 112 in FIG. FIG. 10B shows a detailed circuit diagram of the switch 124 of FIG. In this embodiment, the switching operation of the switch 124 is realized by turning on or off the FET 201. The switch 124 has an FET 201, resistors 203 and 204, and a capacitor 202. The FET 201 has a source terminal connected to the DC power supply 104, and a drain terminal connected to the anode terminal of the diode 122. Further, a resistor 203 is connected between the source terminal and the gate terminal of the FET 201. A capacitor 202 is also connected between the source terminal and the gate terminal of the FET 201. A control signal 125 is input to the gate terminal of the FET 201 from the CPU 111 via the resistor 204.

  The ON state and the OFF state of the switch 124 will be specifically described. The control signal 125 output from the CPU 111 is in a state of either high impedance or low level. When the output voltage 107 of the DC power supply 104 is 24 V and the control signal 125 is high impedance, the gate terminal of the FET 201 gradually becomes equal to the output voltage 107 by the time constant circuit of the resistor 203 and the capacitor 202. Thus, the FET 201 is turned off. Accordingly, the power supply from the DC power supply 104 via the diode 122 is cut off to the power supply line 123 of the external connection circuit 112, and the output voltage 106 of the DC power supply 103 via the diode 121 is supplied. At this time, the diode 122 prevents the output voltage 106 output from the DC power supply 103 from flowing into the DC power supply 104.

  When the control signal 125 is at a low level, the electric charge stored in the capacitor 202 is discharged via the resistor 204. As a result, the voltage applied to the gate terminal of the FET 201 gradually decreases, and decreases to a voltage obtained by dividing the output voltage 107 by the resistors 203 and 204. Thus, the FET 201 is turned on. When the FET 201 is turned on, the output voltage 107 of the DC power supply 104 is supplied to the power supply line 123 via the diode 122. Here, the output voltage 107 of the DC power supply 104 and the output voltage 106 of the DC power supply 103 have a relationship of “output voltage 107> output voltage 106”. Thus, the diode 121 prevents the output voltage 107 supplied to the power supply line 123 from flowing into the DC power supply 103. The rest is the same as the configuration shown in FIG. The external connection circuit 112 includes a converter (not shown), and generates a voltage of 5 V from an input voltage of 3.3 V to 5 V and supplies the voltage to an external device.

[Operation of each part]
FIG. 11 is a diagram illustrating a state of each unit related to the setting of the power supply line 123 of the external connection circuit 112 according to the present embodiment. Since FIG. 11A corresponds to FIG. 9A and FIG. 11C corresponds to FIG. 9C, the description is omitted. FIG. 11B shows the voltage supplied to the power supply line 123, and FIG. 11D shows the state of the control signal 125 of the CPU 111. In the present embodiment, the description of the same configuration and operation as in the second embodiment will be omitted, and only different operations will be described.

  When the image forming apparatus 100 is in operation, as shown in FIG. 11D, the control signal 125 of the CPU 111 is in a state of high impedance (shown as Hi-Z). Thus, the switch 124 shown in FIG. 10B is turned off. A voltage obtained by lowering the forward voltage of the diode 121 from the 3.3 V output voltage 106 of the DC power supply 103 is supplied to the external connection circuit 112 via the power supply line 123 (FIG. 11B). Note that the image forming apparatus 100 is in operation, and the DC power supply 104 outputs an output voltage 107 of 24 V (FIG. 11C). When the image forming apparatus 100 shifts to the standby state at the timing t1, the CPU 111 changes the DC power supply 104 from the ON state to the OFF state (FIG. 11C). Since the control signal 125 of the CPU 111 is in a high impedance state, the 3.3 V output voltage 106 of the DC power supply 103 is supplied to the power supply line 123 via the diode 121 continuously from the operation state. .

  When the image forming apparatus 100 is in the standby state and a plurality of external devices such as USB devices are connected at the timing t2, the output voltage Vi of the current detection unit 108 illustrated in FIG. > Cooling threshold value ”. The CPU 111 turns on the DC power supply 104 and sets the setting signal 120 to a low level based on the detection result 114 of the current detection unit 108 so that the output voltage 107 of the DC power supply 104 becomes 5 V (FIG. 11 (c)).

Here, in the present embodiment, the resistance 52 of the voltage setting unit 117 shown in FIG. 8 is set to 50 kΩ, and the resistance 53 is set to 6.5 kΩ. The resistance 51 is 50 kΩ, and the reference voltage of the shunt regulator 19 is 2.5V. Thus, when the setting signal 120 from the CPU 111 is set to a low level, the output voltage 107 is controlled to be constant at about 5 V, and when the setting signal 120 is set to a high level, the output voltage 107 is fixed at about 24 V. Is controlled as follows.
2.5 × (50k + 50k) / 50k = 5 [V]
2.5 × (50 k + (50 k // 6.5 k)) / (50 k // 6.5 k)) = 24 [V]
Here, “50k // 6.5k” indicates a combined resistance value of the resistor 52 and the resistor 53 connected in parallel.

  Further, the CPU 111 turns on the DC power supply 104 and sets the control signal 125 to low level (FIG. 11D). As a result, a potential difference is gradually generated between the gate terminal and the source terminal of the FET 201 of the switch 124, and the voltage of the power supply line 123 also gradually increases to 5V from the timing t2 to the timing t4 as shown in FIG. . As shown in FIG. 11B, when the voltage of the power supply line 123 gradually increases and the forward voltage of the diode 121 cannot be secured at the timing t3, the current supply of the output voltage 106 of the DC power supply 103 is cut off. Is done. Then, current supply from the DC power supply 104 in place of the DC power supply 103 is started. Thus, after the timing t3, the output voltage Vi of the current detection unit 108 that detects the current of the DC power supply 103 satisfies “Vi ≦ cooling threshold”.

  In this state, since the output voltage 106 of the DC power supply 104 is 5 V (FIG. 11C), the cooling fan 630 cannot perform a rotating operation and is in an off state. However, as described above, the power supply to the external connection circuit 112 is switched from the DC power supply 103 (output voltage 106 (3.3 V)) to the DC power supply 104 (output voltage 107 (5 V)). Thus, both the DC power supply 103 and the DC power supply 104 are in a light load state that does not require cooling. In this embodiment, the output voltage 106 of the DC power supply 104 is 5V. This makes it possible to reduce power consumption due to a resistance component connected to the secondary side of the DC power supply 104 and power consumption of the cooling fan 630 such as a drive circuit (not shown) configured to drive the actuator 109 and the like. .

  Therefore, in the present embodiment, the following effects can be obtained by adopting the above configuration. That is, even in the case of an electronic device in which a sudden increase in power occurs due to power supplied to an external device or the like, it is possible to further reduce the power consumption of the entire electronic device as compared with the related art, and The power supply status can be changed immediately. Furthermore, in the present embodiment, since the cooling fan 630 is not operated, the level of the operation sound of the electronic device caused by the cooling fan 630 can be suppressed.

  As described above, according to the present embodiment, when no power change occurs in the power saving state, the effect of the power saving is not reduced, and when the power change occurs, the operation state of the electronic device is suppressed while the power state is suppressed. Can be changed.

103 DC power supply 104 DC power supply 108 Current detection circuit 111 CPU
630 cooling fan

Claims (6)

A first power supply for supplying power to the first load;
A second power supply for supplying power to the second load;
The first load is driven by supplying power from the first power supply to the first load, and the second load is supplied with power from the second power supply to the second load. A first state in which is driven,
The power is supplied from the first power supply to the first load, the first load is driven, and the supply of power from the second power supply to the second load is stopped, and the power supply is stopped . An image forming apparatus capable of operating in the second state in which the second load is stopped,
Cooling means driven by power supplied from the second power supply, cooling means for cooling the first power supply,
Detecting means for detecting a current supplied from the first power supply to the first load ,
In the second state, control means for controlling the operation of the cooling means based on the detection result of the detection means,
A connection part to which an external device is connected,
With
The control means, in the second state, when the external device is connected to the connection portion and the power from the first power supply is supplied to the external device, based on the detection result of the detection means An image forming apparatus configured to supply power to the cooling unit from the second power supply and cool the first power supply by the cooling unit. Before SL control means in said second state, when power from the external device is connected to said first power source to the connection part is supplied to the external device, the detection result of said detecting means 2. The image forming apparatus according to claim 1 , wherein when the predetermined value is exceeded , power is supplied from the second power supply to the cooling unit to start rotation of the cooling unit. The control means, when the detection result of the detection means in the second state exceeds a predetermined value, at a rotation speed smaller than the first speed which is the rotation speed of the cooling means in the first state is the second speed, the image forming apparatus according to claim 1 or claim 2, characterized in that it rotating said cooling means. Includes a third power source Kyusuru subjected power to the cooling means to adjust the from the second power supply for supplying power to the cooling means from the second power supply,
The control unit sets the voltage of the third power supply so that the cooling unit rotates at the first speed in the first state, and rotates the cooling unit in the second state. 4. The image forming apparatus according to claim 3 , wherein the voltage of the third power supply is set so that the cooling unit rotates at the second speed. The control means, when the detection result of the detection means exceeds the predetermined value in the second state, at an output voltage lower than the output voltage of the second power supply in the first state, the The image forming apparatus according to claim 3 , wherein the second power supply is operated. Said control means, said when the detection result of the detecting means is equal to or less than the predetermined value in the second state, any of the preceding claims 3, characterized in that to stop the rotation of the cooling means 2. The image forming apparatus according to claim 1.

Images