JP2007047368A - Image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce FAN noise and power consumption during standby periods. <P>SOLUTION: The image forming apparatus drives a main motor and a FAN by an AC/DC converter and drives a CPU and a controller by a DC/DC converter that uses the output voltage of the AC/DC converter as an input. In the image forming apparatus, a means for switching three types of output voltages is installed in the AC/DC converter in order to provide a means for reducing the power consumed in switching the three types of drive voltages according to the state of the image forming apparatus. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to an image forming apparatus according to a means for reducing power consumption by setting a voltage according to a driving state of a printer and reducing driving sound of a FAN.

  As described in Patent Document 1, Patent Document 2 and the like as conventional power consumption reducing means, and as described in Patent Document 3 and the like as FAN noise reduction means, switching of the power supply is performed by intermittently driving the power supply. The noise is reduced by reducing the loss of the part or by reducing the rotational speed of the FAN according to the state of the apparatus. Here, a description will be given of low power consumption and low noise of FAN in the conventional example.

  FIG. 8 is an electric block diagram of an image forming apparatus in a conventional example.

  Reference numeral 1 denotes a commercial AC power source. Reference numeral 2 denotes an ACDC converter that converts alternating current of the AC power source 1 into a direct current voltage that is a first drive voltage. The main motor 3 that drives the drum of the image forming apparatus and the fixing device with the electric power obtained by the ACDC converter, the FAN 4 that cools the heating unit such as the fixing device and the power source, the solenoid 5 that supplies paper, and the like The actuator is driven. Reference numeral 6 denotes a DCDC converter that generates a second driving voltage for a small signal system that is stepped down from the first driving voltage. A CPU 7 that controls the image forming apparatus with power obtained by the DCDC converter 6, a sensor 8 that detects various states of the image forming apparatus, and a controller 9 that develops image data from a host computer into raster data. Drive.

  Subsequently, the power supply unit will be described, and operations for reducing power consumption and FAN noise will be described.

  FIG. 9 is a diagram for explaining a circuit configuration in a conventional power supply apparatus. The ACDC converter unit 2 operates as a partial resonance type flyback power source, and the DCDC converter unit 6 operates as an example of a diode rectification type DCDC converter. Explain.

  Reference numeral 1 denotes a commercial AC power source. Reference numeral 10 denotes a diode bridge that rectifies the voltage of the AC input power source 1, and 11 denotes a primary smoothing capacitor that smoothes the voltage rectified by the diode bridge 10. Reference numeral 12 denotes an FET that switches the primary winding 14 of the power transformer 13 that converts the primary voltage into the secondary voltage. The ON DUTY of the FET 12 is controlled by the ACDC converter power supply control unit 15 that controls the power supply. . Here, a package in which the FET 12 and the power supply control unit 15 are combined is referred to as a power supply IC 16. The current flowing through the FET 12 passes from the primary winding 14 through the source terminal 17 of the FET 12 to the GND / drain terminal 18 of the power supply control unit, and through the current detection resistor 19 for current limiting, to the primary smoothing. It flows to the negative terminal of the capacitor 11. A voltage is generated at both ends of the current detection resistor 19 due to the current flowing through the current detection resistor 19. Is transmitted via.

  Reference numeral 21 denotes a noise removing capacitor that constitutes the noise removing resistor 20 and a primary low-pass filter. The bottom detection / OCP terminal 22 is also used as a function of detecting the timing at which the minimum voltage of the resonance voltage waveform generated between the drain and source of the FET is generated at the turn-off timing of the FET described later. The ACDC converter power supply control unit 15 is activated by the activation resistor 23 that supplies the initial power of the control unit immediately after the power is turned on, and performs switching of the FET 12.

  When a voltage is generated at the secondary output due to the switching of the FET 12, the power is continuously supplied to the ACDC converter power supply control unit 15 by the auxiliary winding 25 that supplies power to the power supply terminal 24 of the ACDC converter power supply control unit 15. Supplied. The voltage output from the auxiliary winding 25 is rectified by a control unit rectifier diode 26 that rectifies the voltage into a DC voltage, and is smoothed by a 27 control unit smoothing capacitor. The ACDC converter power supply control unit 15 is driven by the smoothed voltage. Subsequently, a description will be given of the quasi-resonant operation.

  When the FET 12 is turned off and electric power is released from the secondary winding 28 of the power transformer 13, the inductance of the primary winding 14 and the capacitance of 29 resonant capacitors are provided between the source and drain of the FET 12. Resonant operation occurs. The voltage waveform generated by the resonance operation is rectified by the bottom detection signal rectifier diode 30 and depressurized by the overvoltage protection resistor 31 so that an overcurrent signal voltage is not generated in the secondary winding direction. Then, the signal is output to the bottom detection / OCP terminal 22 for detecting the minimum value of the resonance voltage waveform of the ACDC converter power supply control unit 15 via the OCP signal protection diode 32.

  The ACDC converter power supply control unit 15 turns on the FET 12 at the timing when the voltage between the source and the drain is the lowest based on the signal input to the bottom detection / OCP terminal 22. The operation is called a quasi-resonant operation, and the switching loss of the FET 12 is reduced.

  Reference numeral 33 denotes a bottom point adjusting capacitor for setting a delay time of the resonance voltage waveform so that the FET 12 is turned on at the timing when the voltage generated between the drain and source of the FET 12 is minimized. To be adjusted. The secondary current output from the secondary winding 28 is rectified by a secondary rectifier diode 34 for rectifying the secondary current and smoothed by a secondary smoothing capacitor 35. Next, the operation of the ACDC converter power supply control unit 15 will be described.

  Reference numeral 36 denotes a voltage control operational amplifier for negatively feeding back the error amount of the output voltage on the secondary side. The secondary side voltage is divided by the secondary side voltage dividing resistor 37 and compared with the voltage of the reference voltage Zener diode 38 that generates the reference voltage of the secondary side voltage.

  The reference voltage Zener diode 38 is supplied with a bias current by a bias resistor 39 and generates a constant voltage. Reference numerals 40 and 41 denote phase compensation resistors and capacitors, and reference numeral 42 denotes a gain adjustment resistor for adjusting the gain of the voltage control operational amplifier.

  43 is a photocoupler for transmitting a voltage error amount on the secondary side to the primary side, and a current inversely proportional to the output voltage of the voltage control operational amplifier 36 flows to the light emitting diode of the photocoupler 43, and the light emitting diode Is received by the phototransistor and the error amount is transmitted to the primary side. The current output from the phototransistor passes through a photocoupler current limiting resistor 44 for limiting the amount of current to the power supply control unit, and the error amount is transmitted to the FB terminal 45 of the ACDC converter power supply control unit 15. Is done. Reference numerals 46 and 47 denote primary-side phase compensation resistors and capacitors.

  Next, a DCDC converter that generates a small signal voltage by stepping down from the output voltage of the ACDC converter will be described.

  Reference numeral 50 denotes a DCDC converter controller for controlling the output voltage of the DCDC converter 6 and switching the DCDC converter FET 51. When the DCDC converter FET 51 is turned on, a current flows from the first drive voltage line to the DCDC converter choke coil with a current gradient according to the inductance value of the DCDC converter choke coil 52, and a smoothing electrolytic capacitor The DCDC converter smoothing capacitor 53 is charged. Subsequently, when the DCDC converter FET 51 is turned off, a back electromotive voltage is generated in the DCDC converter choke coil 52, and a regenerative current flows through the DCDC converter diode 54, which is a regenerative diode.

  A DCDC converter voltage control operational amplifier 55 detects the output voltage of the DCDC converter 6 and feeds back the difference to the DCDC converter controller 50. 56 is a DCDC converter Zener diode that generates a reference voltage of the DCDC converter unit, and 57 is a DCDC converter bias resistor that sets a bias current to the DCDC converter Zener diode. The DCDC converter voltage control operational amplifier 55 compares the voltage generated by the DCDC converter Zener diode 56 with the voltage obtained by dividing the DCDC converter output voltage by the DCDC converter output voltage voltage dividing resistor 58, and the difference is DCDC. Voltage is applied to the converter control unit 50. Reference numeral 59 denotes a DC / DC converter gain setting resistor for setting the gain of the DC / DC converter voltage control operational amplifier. Reference numerals 60 and 61 denote phase adjustment resistors and capacitors.

  Next, a description will be given of noise reduction and power consumption reduction of FAN.

  When the image forming apparatus stops the FAN immediately after printing, the temperature of the heat generating part (fixing device or power supply part) continues to rise due to residual heat, and the heat may exceed the set standard value. In some cases, the time FAN is continuously rotated. However, in a situation where printing is not performed, only the FAN is driven, and thus unpleasant noise is emitted to the user. In addition, since the purpose is to cool the remaining heat, there is often no need for cooling capacity during printing. Therefore, there is a method for reducing the noise and reducing the current consumption by reducing the rotational speed of the FAN when cooling the residual heat.

Subsequently, means for reducing power consumption will be described. In a situation where no printing operation is performed, very little power is consumed. As a general method, in the flyback power supply as described in the conventional example, the oscillation is forcibly stopped for a certain period of time, and the switching operation is intermittently performed, thereby reducing the average driving frequency. The loss of the FET 12 can be reduced.
Japanese Patent Laid-Open No. 11-215819 JP 2000-228873 A JP-A-5-204221

  However, the conventional example has the following problems.

  In the conventional example, the power consumption has been reduced by means of reducing the rotation speed of the FAN or by forcibly intermittently oscillating, but this is not sufficient for optimal power consumption reduction according to the printing situation. It was.

  The present invention has a simple configuration, cools residual heat, and reduces power consumption by an optimal driving method of a power supply device.

  The first object is to reduce FAN noise during residual heat cooling and to further reduce power consumption when the FAN is stopped.

  The second object is to reduce the loss of the power supply unit of the image forming apparatus when the controller for developing an image is in a sleep state.

  In order to achieve the above object 1, in the power supply device according to claim 1 or 2, three set voltages are provided for the output voltage of the ACDC converter, and the set voltage is switched according to the status of the printer. FAN noise is reduced, and power consumption is further reduced when the FAN is stopped.

  In order to achieve the above object 2, in the power supply device according to claim 3, the controller that develops the image and the CPU that controls the image forming apparatus recognize the sleep state of the controller through communication, and the controller is in the sleep state. Sometimes the loss of the power supply unit of the image forming apparatus is reduced.

  In more detail, the present invention can solve the above problems by the following configuration.

(1) A diode bridge for rectifying an AC input voltage waveform, a primary smoothing capacitor for smoothing a voltage rectified by the diode bridge, a transformer having a primary winding, an auxiliary winding, and a secondary winding A first switching element connected between a primary winding of the transformer and a DC power source smoothed by the primary smoothing capacitor, and switching the primary winding of the transformer, and a secondary of the transformer A rectifying / smoothing unit that smoothes an alternating voltage generated from a winding, and a first switching element that is driven by a voltage that is supplied with power from between the auxiliary windings and that is output from the rectifying / smoothing unit. A first drive voltage is generated by a first control unit that controls power and a starting resistor that supplies power at the start of driving from the primary smoothing capacitor to the control unit And ACDC power,
A second switching element that includes a choke coil and a second smoothing capacitor for stepping down and smoothing the first voltage, and controls power supplied to the choke coil between the first drive voltage and the choke coil And a regenerative diode is provided between the switching element and the GND of the first drive voltage to regenerate the regenerative current of the choke coil, and the second voltage is output according to the DC voltage output from the second smoothing capacitor. A DCDC converter that steps down from the first drive voltage to obtain the second drive voltage by a second control unit that controls the two switching elements;
The first drive voltage drives the FAN that cools the actuators such as a main motor that drives the paper feeding, drum driving, and fixing unit driving, and the ACDC power source, the DCDC converter, and the heating unit such as the fixing unit. Done
In the image forming apparatus that drives a small signal system such as a CPU that controls the apparatus and a sensor that detects the state of the apparatus by the second driving voltage.
Means for controlling the first driving voltage to three voltage values of a first voltage, a second voltage, and a third voltage are provided, and the respective voltage values are set to the first voltage> the second voltage> the second voltage. When the image forming apparatus is in a printing state, the first driving voltage is controlled to the first voltage, the main motor of the image forming apparatus is stopped, and the FAN is driven. In the state where the first drive voltage is controlled to the second voltage, the image forming apparatus is in a state where the main motor of the image forming apparatus is stopped and the FAN is also stopped. Controls the first drive voltage to the third voltage.

  According to the present invention, in order to achieve the above object 1, in the power supply device according to claims 1 and 2, the output voltage of the ACDC converter is provided with three set voltages, and the set voltages are set according to the status of the printer. It is possible to reduce FAN noise during switching and cooling of residual heat, and to further reduce power consumption when the FAN is stopped.

  In order to achieve the above object 2, in the power supply device according to claim 3, the controller that develops the image and the CPU that controls the image forming apparatus recognize the sleep state of the controller through communication, and the controller is in the sleep state. Sometimes the loss of the power supply unit of the image forming apparatus can be reduced.

  Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to examples.

  Since the block diagram of the image forming apparatus is the same as the conventional example, a description thereof will be omitted.

  FIG. 1 is a diagram illustrating a circuit configuration of a power supply according to the present embodiment, and a circuit added to the conventional example will be described.

  In the first embodiment, a circuit for controlling the output voltage of the ACDC converter to three is added. A signal for switching to three voltages is output from the CPU to the ACDC converter unit 2.

  The ACDC converter unit 2 is provided with a Zener diode that generates three types of reference voltages for the first drive voltage. 70 is a Zener diode that generates the first voltage, and 71 is a second voltage. A Zener diode 72 is a Zener diode that generates the third voltage. Reference numeral 73 denotes a switching transistor for switching a bias current to flow through the Zener diode that generates the first voltage, and reference numeral 74 denotes a switching transistor for switching the bias current to flow through the Zener diode that generates the second voltage. A transistor 75 is a switching transistor for switching the bias current to flow through the Zener diode that generates the third voltage.

  For example, in order to generate the first voltage, the transistor 73 is turned on and the other switching transistors are turned off. The bases of the three transistors are connected to the CPU 7 so that a desired voltage can be output arbitrarily.

  In this embodiment, three Zener diodes are provided and switched for easy understanding of the voltage switching. However, the same effect can be obtained even when the voltage is switched by another means.

  Subsequently, the relationship between the set value of the first drive voltage and the allowable power of the ACDC converter in the power supply apparatus described above will be described by dividing it into two drive states.

  The first driving state will be described below. FIG. 2 is a diagram for explaining the loss of the DCDC converter. Reference numeral 90 denotes a gate waveform of the DCDC converter FET 51, which is high and conductive. Reference numeral 91 denotes a current flowing through the choke coil 52 for the DCDC converter. A current 92 flows in the DCDC converter FET 51. Reference numeral 93 denotes a current flowing through the DCDC converter diode 54. The loss of the DCDC converter is divided into a switching loss that occurs at the switching timing of the FET, an ON loss of the FET that occurs at the ON timing of the FET, and a diode loss that occurs when the FET is OFF, that is, during regeneration. Considering losses other than switching loss, the loss of the diode generated during regeneration is generally larger than the loss generated by the resistance when the FET is turned on. This is because the forward voltage of the diode is larger than the voltage generated when the FET is turned on (ON resistance × current flowing through the FET). To reduce the loss of the DCDC converter, it is effective to increase the ratio during regeneration. That is, when the input voltage, here, the first drive voltage is lowered, the loss of the DCDC converter is reduced.

  Next, the second driving state will be described below. FIG. 3 is a time chart showing a state when the ACDC converter 2 is activated. 94 is a voltage of the power supply terminal 24 of the ACDC converter control unit 15 at the time of start-up. Electric power is supplied to the power supply terminal 24 via the start-up resistor 23 to increase the voltage value, and the ACDC converter control unit 15 When the operation start voltage is reached, the FET 12 starts oscillating and the output voltage of the ACDC converter 2 starts to increase to the first drive voltage setting value (95). Eventually, power is supplied from the auxiliary winding 25 to achieve stable operation. An operation when the first drive voltage is set low in the power supply circuit that performs such an operation will be described. Since the ACDC converter 2 is supplied with power consumed at the power supply terminal 24 from the auxiliary winding 25, a voltage proportional to the first drive voltage becomes the power supply voltage. The ACDC converter power supply control unit 15 starts operation at an operation start voltage equal to or higher than a predetermined voltage, and stops operating when the voltage becomes lower than a predetermined voltage. Further, since the circuit operates during operation, the current consumption is higher than when the operation is stopped.

  The above operation will be described with reference to FIG. If the first drive voltage is reduced at the timing of 96, the voltage at the power supply terminal 24 is also reduced as the first drive voltage is reduced. Eventually, when the operation stop voltage 98 is reached, the ACDC converter power supply control unit 15 stops driving and the current consumption decreases. The voltage at the power supply terminal 24 rises due to the starting resistor 23, and when the operation start voltage 99 is reached, the FET starts to oscillate. However, since the setting of the first drive voltage is lowered, the voltage of the power supply terminal 24 is lowered to the drive stop voltage 98 again.

  When such an operation is performed, the FET 12 intermittently repeats oscillation and stop, so that the switching loss of the FET 12 is reduced and the power consumption of the ACDC converter 2 is reduced. Moreover, since the loss of the DCDC converter is also reduced because the first driving voltage is lowered, the power consumption of the entire apparatus is reduced more than that in the first driving state. In the second drive state, since there is an operation stop section, the use conditions are limited to a relatively light load range. For example, when a large current is drawn at the timing when the operation is stopped and becomes lower than the operation stop voltage of the CPU, an undesired phenomenon that the image forming apparatus is reset is caused.

  FIG. 5 is a diagram showing a time chart of the first driving state, the second driving state, power loss, and allowable power. Reference numeral 100 denotes a timing at which the ACDC converter 2 is started to switch to the first driving state. In the first driving state, the output voltage 95 of the ACDC converter 2 decreases and the loss of the DCDC converter 6 decreases, so that the loss 101 of the entire power supply apparatus decreases. However, since the output voltage 95 decreases, the allowable power 102 that can be extracted from the power supply apparatus decreases. Reference numeral 106 denotes a timing at which the first driving state is switched to the second driving state. In the second driving state, the output voltage 95 further decreases, and the ACDC converter 2 repeatedly starts and stops, so that the loss of the ACDC converter 2 decreases. Further, since the output voltage 95 is further reduced, the loss of the DCDC converter 6 is also reduced. Therefore, the loss 101 of the entire power supply apparatus is further reduced. However, since the ACDC converter performs an operation of repeatedly starting and stopping, the allowable power 102 that can be extracted from the power supply apparatus is extremely reduced.

  A method for driving the power supply in a driving state optimum for the state of the image forming apparatus in consideration of the driving state will be described below.

  FIG. 6 is a flowchart illustrating a control state when the image forming apparatus is turned on from power on and in standby. When the image forming apparatus is turned on (80), the ACDC power supply 2 generates a first voltage (81). The first voltage is set to a state in which power sufficient to perform printing of the image forming apparatus is generated. Subsequently, an initialization operation of the electrophotographic process or the like of the image forming apparatus is performed (82). When the initialization operation is completed (83), the print acceptance state (84) is entered. When printing is accepted in the print acceptance state, printing is started by a predetermined operation (85), and when printing is completed (86), the process returns to the print acceptance state (84) again. On the other hand, in the situation where the print command is not received in the print acceptance state (84), the FAN is continuously driven to cool the remaining heat generated in the fixing unit and the power source by the initialization operation (82). Regarding the cooling of the remaining heat, as described in the conventional example, since the cooling amount at the time of printing is not required, sufficient cooling can be performed even if the rotational speed of the FAN is lowered.

  Therefore, the power supply device is driven in the first driving state to reduce the output voltage of the ACDC converter 2, thereby reducing the rotation speed of the FAN. Here, the reduced voltage is referred to as a second voltage (87). According to the first driving state, the FAN driving sound is reduced, the current consumption is also reduced, and the loss of the DCDC converter is also reduced as described above, so that the power consumption of the power supply apparatus is reduced. Subsequently, the process proceeds to the print acceptance state (88) of the first driving state. When printing is accepted, the output of the ACDC converter is set to the first voltage (81), and printing is started.

  On the other hand, if a print command is not received, the FAN stops after a sufficient cooling time has elapsed (89). When the FAN is stopped, the power consumption of the image forming apparatus is reduced, so that the second driving state can be performed. Here, the reduced voltage is referred to as a third voltage (103). Since the ACDC converter repeatedly starts and stops in the second driving state, the loss of the ACDC converter is reduced, and the output voltage is lower than that in the first driving state. Therefore, the loss of the DCDC converter is also reduced. The power consumption of the power supply device can be reduced. Subsequently, the process proceeds to the print acceptance state (104) of the second driving state. When printing is accepted, the output of the ACDC converter is set to the first voltage (81), and printing is started 85. On the other hand, if a print command has not been received, it waits in a reception acceptance state until a print command is received (104).

  As described above, by setting the output voltage of the ACDC converter as the driving state of the power supply device corresponding to the driving state of the printer, the driving sound of the FAN can be suppressed and the power consumption of the power supply device can be reduced.

  The image forming apparatus is provided with a controller for image development as described with reference to FIG. In recent years, many electronic components provided in a controller include a means for reducing current consumption during standby. In the present embodiment, an optimum power supply driving method based on the above-described reduction in current consumption during standby is proposed.

  FIG. 7 is a flowchart illustrating initialization, printing, and print acceptance of the image forming apparatus after the power is turned on according to the second exemplary embodiment. Since the operation up to the FAN stop 89 is the same as that in the first embodiment, a description thereof will be omitted. After the FAN stop 89, the print acceptance state 88 is entered again. When printing is accepted, the output of the ACDC converter is set 81 to the first voltage and printing is started. On the other hand, if the print command is not received, the CPU 7 communicates with the controller 9, and if the controller is not in the standby state (105), the print acceptance is continued, and if it is detected that the controller is in the standby state, The output of the ACDC converter 2 is set to a voltage 103 of 3. Subsequently, when the print acceptance state 104 is reached and the print is accepted, the output voltage of the ACDC converter becomes the first voltage 81 and printing is started. On the other hand, if no print is received, the print acceptance state is continuously maintained.

  As described above, the CPU 7 and the controller 9 communicate with each other, and when the controller 9 is in a standby state, that is, when the current consumption is reduced, the power supply is brought into the second driving state, thereby reducing the power loss. To reduce. Compared with the first embodiment, the voltage of the ACDC converter 2 can be set to optimize the standby power of the controller 9, so that the loss of the power supply device can be further reduced.

Circuit diagram of power supply device in first embodiment The figure explaining the loss of a DCDC converter Time chart showing the starting state of the ACDC converter Time chart for intermittent oscillation of ACDC converter The figure which showed the time chart of the 1st drive state, the 2nd drive state, power loss, and permissible power The flowchart which shows the control state at the time of printing from the power ON in 1st Example, and standby | waiting Flowchart of image forming apparatus initialization, printing, and print acceptance from power-on of the second embodiment Electrical block diagram of an image forming apparatus in a conventional example Circuit diagram of conventional power supply

Explanation of symbols

1 Commercial AC power supply 2 ACDC converter 3 Main motor 4 FAN
5 Solenoid 6 DCDC converter 7 CPU
8 Sensor 9 Controller 10 Diode bridge 11 Primary smoothing capacitor 12 FET
13 Power Transformer 14 Primary Winding 15 ACDC Converter Power Supply Control Unit 16 Power Supply IC
17 Source terminal 18 GND / drain terminal 19 Current detection resistor 20 Noise removal resistor 21 Noise removal capacitor 22 Bottom detection / OCP terminal 23 Start resistor 24 Power supply terminal 25 Auxiliary winding 26 Control unit rectifier diode 27 Control unit smoothing capacitor 28 2 Next winding 29 Resonant capacitor 30 Bottom detection signal rectifier diode 31 Overvoltage protection resistor 32 OCP signal protection diode 33 Bottom point adjustment capacitor 34 Secondary rectifier diode 35 Secondary smoothing capacitor 36 Voltage control operational amplifier 37 Secondary voltage component Voltage resistor 38 Reference voltage Zener diode 39 Bias resistor 40 Phase compensation resistor 41 Phase compensation capacitor 42 Gain adjustment resistor 43 Photocoupler 44 Photocoupler current limiting resistor 45 FB terminal 46 Primary side resistor For phase compensation of the phase compensation resistor 47 primary side capacitor 50 DCDC converter control unit 51 DCDC converter FET
52 DCDC Converter Choke Coil 53 DCDC Converter Smoothing Capacitor 54 DCDC Converter Diode 55 DCDC Converter Voltage Control Operational Amplifier 56 DCDC Converter Zener Diode 57 DCDC Converter Bias Resistor 58 DCDC Converter Output Voltage Dividing Resistor 59 DCDC Converter Gain Setting Resistor 60 DCDC converter phase setting resistor 61 DCDC converter phase setting capacitor 70 Zener diode for generating the first voltage 71 Zener diode for generating the second voltage 72 Zener diode for generating the third voltage 73 First voltage Switching transistor 74 for switching a bias current to flow in a Zener diode for generating a second voltage Switching transistor 80 Power ON performing switching to flow a bias current to the zener diode for generating a switching transistor 75 the third voltage to switch to flow a bias current to the over diode
81 First voltage generation 82 Initialization operation 83 Initialization operation completion 84 Print acceptance 85 Print start 86 Print completion 87 Second voltage 88 First drive state print acceptance 89 FAN stop 90 FET51 gate waveform 91 For DCDC converter Current flowing in choke coil 92 Current flowing in DCDC converter FET 51 93 Current flowing in DCDC converter diode 54 94 Voltage of power supply terminal 24 of ACDC converter control section 95 First drive voltage waveform 96 First drive voltage drop Timing 97 Timing to reach the operation stop voltage 98 Operation stop voltage 99 Operation start voltage 100 Timing to enter the first drive state 101 Loss of the entire power supply 102 Allowable power 103 that can be extracted from the power supply 103 Third voltage 104 Second drive Timing of switching from the decision 106 first driving state of waiting for the print acceptance state 105 controller state to the second driving state

Claims (3)

A diode bridge for rectifying an AC input voltage waveform; a primary smoothing capacitor for smoothing a voltage rectified by the diode bridge; a transformer having a primary winding, an auxiliary winding, and a secondary winding; A first switching element that is connected between a primary winding of the transformer and a DC power source smoothed by the primary smoothing capacitor, and that switches the primary winding of the transformer, and a secondary winding of the transformer A rectifying / smoothing unit that smoothes the generated AC voltage and a voltage supplied with power from between the auxiliary windings, and controls the first switching element according to the DC voltage output from the rectifying / smoothing unit. AC that generates a first drive voltage by a first control unit and a starting resistor that supplies power at the start of driving from the primary smoothing capacitor to the control unit And C power supply,
A second switching element that includes a choke coil and a second smoothing capacitor for stepping down and smoothing the first voltage, and controls power supplied to the choke coil between the first drive voltage and the choke coil And a regenerative diode is provided between the switching element and GND of the first drive voltage to regenerate the regenerative current of the choke coil, and the A DCDC converter that steps down from the first drive voltage to obtain the second drive voltage by a second control unit that controls the two switching elements;
The first drive voltage drives the FAN that cools the actuators such as a main motor that drives the paper feeding, drum driving, and fixing unit driving, and the ACDC power source, the DCDC converter, and the heating unit such as the fixing unit. Done
In the image forming apparatus that drives a small signal system such as a CPU that controls the apparatus and a sensor that detects the state of the apparatus by the second driving voltage,
Means for controlling the first driving voltage to three voltage values of a first voltage, a second voltage, and a third voltage are provided, and the respective voltage values are set to the first voltage> the second voltage> the second voltage. When the image forming apparatus is in a printing state, the first driving voltage is controlled to the first voltage, the main motor of the image forming apparatus is stopped, and the FAN is driven. In the state where the first drive voltage is controlled to the second voltage, the image forming apparatus is in a state where the main motor of the image forming apparatus is stopped and the FAN is also stopped. Controls the first drive voltage to the third voltage.   The image forming apparatus according to claim 1, wherein the first voltage is a voltage value setting value capable of supplying power capable of performing a printing operation of the image forming apparatus, and the second voltage is the image forming apparatus. Is a voltage setting value that is capable of driving the FAN, but the third voltage is insufficient for driving the main motor and the FAN. Is a voltage setting value capable of driving the CPU.   The image forming apparatus according to claim 2, further comprising a controller that develops an image from a host computer into raster data, the controller having a sleep function that reduces power consumption when printing is stopped, and the controller and the CPU include: An image forming apparatus that detects whether or not the controller is in a sleep state by communication and controls the first drive voltage to the third voltage setting when the controller is in a sleep state.

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