JP6543890B2 - High temperature solder alloy - Google Patents
High temperature solder alloy Download PDFInfo
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- JP6543890B2 JP6543890B2 JP2014082816A JP2014082816A JP6543890B2 JP 6543890 B2 JP6543890 B2 JP 6543890B2 JP 2014082816 A JP2014082816 A JP 2014082816A JP 2014082816 A JP2014082816 A JP 2014082816A JP 6543890 B2 JP6543890 B2 JP 6543890B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29113—Bismuth [Bi] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Description
本発明は、高温はんだ合金に関する。本発明は、特には、本発明は、電気機器、電子機器、通信機器などの配線接続及び部品の接続などに用いる鉛フリーはんだ実装技術分野において利用される、鉛フリー高温はんだ合金に関する。 The present invention relates to high temperature solder alloys. In particular, the present invention relates to a lead-free high-temperature solder alloy used in the field of lead-free solder mounting technology used for wiring connection of parts such as electric devices, electronic devices, communication devices, etc.
従来用いられているSn−Pb共晶または、Pb90質量%以上のPb基はんだ合金は、毒性を有する鉛を含んでいるため、その使用が制限されつつある。近年ではSn−Pb共晶はんだの代替として、鉛を含まないSn−Ag共晶または、Sn−Ag−Cu系はんだが広く普及し、電子部品とプリント回路板の接続に用いられている。しかし、Snを主成分とした鉛フリーはんだを用いると、はんだ付け部を、例えば260℃といった高温下に暴露することになり、電子部品内部の接続では、電極の溶解や、断線など、いわゆる耐熱性不良の問題が発生する場合がある。 The use of Sn-Pb eutectic or Pb-based solder alloy with 90% by mass or more of Pb, which is conventionally used, contains toxic lead, and its use is being restricted. In recent years, as an alternative to Sn-Pb eutectic solder, Sn-Ag eutectic or Sn-Ag-Cu-based solder containing no lead has been widely spread, and is used to connect electronic parts and printed circuit boards. However, if lead-free solder containing Sn as the main component is used, the soldered part will be exposed to a high temperature of, for example, 260 ° C., and in the case of connection inside the electronic component, so-called heat resistance such as melting or disconnection of the electrode. Sexual problems may occur.
また、パワーデバイス分野においては、近年、高温使用の要求が高まっており、従来自己発熱レベルの150℃程度の動作温度仕様でよかったものから、175℃、200℃とそのパワーデバイス製品に要求される動作温度仕様が上がってきている。そのため、パワーデバイスの接続部についても耐熱性向上が求められている。JEITA(電子情報技術産業協会)の環境調和型先端実装技術成果報告2011(2011年7月)では、これまでの技術としてPb基(鉛を主成分とした例えば290℃以上の融点をもつ材料)組成による耐熱性の確保があげられている。また電子部品内部接続に使用されるダイボンド接合部の耐熱要求温度は260℃以上が必要という報告もある。導電性接着剤およびPbフリーはんだで広く普及しているSn−Ag−Cu系はんだでは、固相線温度が220℃付近にあり、上記の耐熱要求温度260℃では溶融してしまう。そのため、先に述べた電極の溶解や断線など耐熱性不良が発生する場合がある。 Moreover, in the power device field, the demand for high temperature use has been increasing in recent years, and from the one that had been good at the operating temperature specification of about 150 ° C of self-heating level conventionally, 175 ° C, 200 ° C and its power device products are required Operating temperature specifications are rising. Therefore, heat resistance improvement is calculated | required also about the connection part of a power device. In JEITA (Electronic Information Technology Industries Association) Environmentally Conscious Advanced Mounting Technology Results Report 2011 (July 2011), Pb-based (as a main component of lead, for example, materials with a melting point of 290 ° C or higher) as the technology so far The heat resistance is secured by the composition. Further, there is also a report that the heat resistance required temperature of the die bond joint used for the internal connection of electronic parts needs to be 260 ° C. or more. In the case of Sn—Ag—Cu-based solder widely used as a conductive adhesive and Pb-free solder, the solidus temperature is around 220 ° C., and it melts at the above-mentioned heat request temperature 260 ° C. Therefore, heat resistance defects such as melting and disconnection of the electrodes described above may occur.
高温はんだ合金として用いられるBi系はんだを用いて、内面電極と構造体の孔内壁との界面や構造体の内部にクラックが生ぜず、十分な内面電極強度を備えることを特徴とした貫通型セラミックコンデンサが知られている(特許文献1参照)。セラミックコンデンサのような挿入実装部品は、更にリード線を介してフローはんだ付けされている。しかしながら、2階層リフローを必要とする半導体素子などの表面実装部品に特許文献1のBi系はんだを適用すると、基板及び電極部に接する構造上、接合不良(例えば、界面反応層の生成・成長等)が生じることや、耐リフロー性に乏しいことから、接合信頼性が低下することが懸念される。また、特許文献1に開示された発明は挿入実装部品を対象としたものであり、はんだにおいて必要とされる特性は、凝固時において体積収縮をしないことであり、表面実装部品の接合用はんだに求められる特性とは異なるものである。 A through type ceramic characterized in that a crack is not generated in the interface between the inner electrode and the inner wall of the hole of the structure or the inside of the structure using Bi-based solder used as a high temperature solder alloy and having sufficient inner electrode strength. A capacitor is known (see Patent Document 1). Insertion mounting parts such as ceramic capacitors are additionally flow soldered via leads. However, when the Bi-based solder of Patent Document 1 is applied to a surface-mounted component such as a semiconductor element requiring two-level reflow, bonding defects (for example, generation / growth of interface reaction layer, etc.) (3), and there is a concern that bonding reliability may be reduced due to poor resistance to reflow. In addition, the invention disclosed in Patent Document 1 is directed to an insertion mounting component, and the characteristic required for the solder is that there is no volume contraction at the time of solidification, and the solder for bonding the surface mounting component is used. It is different from the required characteristics.
ほかにも、Biを主成分とした鉛フリーはんだが知られている(特許文献2を参照)。しかし、特許文献2に開示されたはんだ合金は、Snを、1〜5質量%と比較的多く含んでいるため、接合部中における低融点層(Sn層:融点232℃)の占める割合が多く、高温でリフロー工程を繰り返すと、低融点層で再溶融する懸念がある点で問題である。 In addition, lead-free solder containing Bi as a main component is known (see Patent Document 2). However, the solder alloy disclosed in Patent Document 2 contains a relatively large amount of Sn at 1 to 5% by mass, so the proportion of the low melting point layer (Sn layer: melting point 232 ° C.) in the joint is large. Repeating the reflow process at a high temperature is a problem in that there is a concern of remelting in the low melting point layer.
2階層リフローを必要とする表面実装部品の接合信頼性、特には、初期特性及び耐リフロー性を確保するため、被接合体とはんだ接合界面近傍の金属間化合物の生成を抑制するとともに、2階層リフロー時にはんだ接合部を再溶融させない組成を有する高温はんだ合金が必要とされている。 In order to secure the joint reliability of the surface mounted parts requiring the two-layer reflow, in particular, the initial characteristics and the reflow resistance, while suppressing the formation of intermetallic compounds in the vicinity of the interface between the object to be joined and the solder joint What is needed is a high temperature solder alloy having a composition that does not remelt the solder joints during reflow.
上記課題を解決するために、本発明者らは、融点が比較的高いBiをベースとして、ごく微量のSnを添加したBi−Sn合金とすることで、所望の特性が得られることを見出し、本発明を完成するに至った。 In order to solve the above problems, the present inventors have found that a desired characteristic can be obtained by using a Bi-Sn alloy to which a very small amount of Sn is added based on Bi having a relatively high melting point. The present invention has been completed.
本発明は、一実施形態によれば、高温はんだ合金であって、スズを、0.05質量%〜0.3質量%含有し、残部は、ビスマス及び不可避不純物からなる。 The invention, according to one embodiment, is a high temperature solder alloy, comprising 0.05% to 0.3% by weight tin, the balance being bismuth and unavoidable impurities.
前記高温はんだ合金において、前記スズを、0.1質量%〜0.3質量%含有することがさらに好ましい。 In the high temperature solder alloy, the tin content is more preferably 0.1% by mass to 0.3% by mass.
前記高温はんだ合金において、さらに、銀を、0.5質量%〜11質量%含有することが好ましい。 The high temperature solder alloy preferably further contains silver in an amount of 0.5% by mass to 11% by mass.
前記高温はんだ合金において、前記銀を、0.5質量%〜2.5質量%含有することがさらに好ましい。 More preferably, the silver is contained in an amount of 0.5% by mass to 2.5% by mass in the high temperature solder alloy.
また、前記高温はんだ合金は、表面実装部品の接合に用いることが好ましい。 Moreover, it is preferable to use the said high temperature solder alloy for joining of surface mounting components.
本発明は、他の実施形態によれば、金属基板とSiチップもしくはSiCチップとを、前述のいずれかに記載の高温はんだ合金で接合してなる接合体を備えてなる半導体装置である。 According to another embodiment, the present invention is a semiconductor device comprising a joined body formed by joining a metal substrate and a Si chip or a SiC chip with the high temperature solder alloy described above.
本発明に係る高温はんだ合金は、被接合体とはんだ接合界面近傍のBiを含む金属間化合物の生成を抑制するとともに、リフロー工程ではんだ接合部を再溶融させず、耐リフロー性を確保することが可能となる。なお、本明細書において、温度260℃のリフロー工程で、はんだ接合部が再溶融しないことを、「はんだの耐リフロー性がある」と定義する。特には、Bi系はんだにSnを添加することで、被接合体の表面処理成分、例えば、Ni、P、Au、Ti等とSnとの金属間化合物を接合界面近傍に形成させてバリア層とすることで、該表面処理成分のはんだ中への拡散を抑えることが可能となる。また、Snの添加量を所定の範囲にすることで低融点のSnを減らし、2階層リフロー時にはんだが再溶融しない接合部を確保することができる。これにより、接合信頼性の確保が可能となる。 The high temperature solder alloy according to the present invention suppresses the formation of an intermetallic compound including Bi near the bonding object and the solder bonding interface and secures the reflow resistance without remelting the solder bonding portion in the reflow process. Is possible. In the present specification, the fact that the solder joint does not remelt in the reflow process at a temperature of 260 ° C. is defined as “with reflow resistance to solder”. In particular, by adding Sn to a Bi-based solder, a surface treatment component of the body to be joined, for example, an intermetallic compound of Ni, P, Au, Ti, etc., and Sn is formed in the vicinity of the bonding interface to form a barrier layer. By doing this, it is possible to suppress the diffusion of the surface treatment component into the solder. Further, by setting the addition amount of Sn in a predetermined range, it is possible to reduce Sn having a low melting point, and to secure a joint portion in which the solder does not remelt during two-level reflow. This makes it possible to ensure bonding reliability.
以下に、図面を参照して、本発明の実施の形態を説明する。ただし、本発明は、以下に説明する実施の形態によって限定されるものではない。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited by the embodiments described below.
[第1実施形態:Bi−Sn二元系高温はんだ合金]
本発明は、第1の実施形態によれば、高温はんだ合金であってスズ(Sn)を、0.05質量%〜0.3質量%含有し、残部は、ビスマス(Bi)及び不可避不純物からなる。不可避不純物とは、主として、銅(Cu)、ニッケル(Ni)、亜鉛(Zn)、鉄(Fe)、アルミニウム(Al)、ヒ素(As)、カドミウム(Cd)、銀(Ag)、金(Au)、インジウム(In)、リン(P)、鉛(Pb)などをいう。また、本発明による高温はんだ合金は、Pbを含まない鉛フリー高温はんだ合金である。
First Embodiment Bi--Sn Binary High-Temperature Solder Alloy
The present invention, according to a first embodiment, is a high temperature solder alloy containing 0.05% by mass to 0.3% by mass of tin (Sn), and the balance from bismuth (Bi) and unavoidable impurities Become. Inevitable impurities mainly include copper (Cu), nickel (Ni), zinc (Zn), iron (Fe), aluminum (Al), arsenic (As), cadmium (Cd), silver (Ag), gold (Au) ), Indium (In), phosphorus (P), lead (Pb) and the like. Also, the high temperature solder alloy according to the present invention is a Pb-free lead-free high temperature solder alloy.
Bi−Sn二元系の高温はんだ合金において、Snを0.05質量%〜0.3質量%含有することによって、後に詳述する2階層リフロー工程の2回目以降のリフロー工程においてはんだ接合部を再溶融させず、ボイドの生成による接合特性の低下を防止するといった効果が期待できる。また、被接合体とはんだとの接合界面近傍に、被接合体の表面処理成分とSnの金属間化合物を形成させ、当該表面処理成分がはんだ材中に拡散して脆性破壊を促進することを防止する。また、Biへの微量のSnの添加は、Biの延性をわずかに向上する効果が期待できる。 In the Bi-Sn binary high-temperature solder alloy, by containing 0.05% by mass to 0.3% by mass of Sn, the solder joint portion is formed in the second and subsequent reflow steps of the two-layer reflow step described in detail later. An effect of preventing deterioration of bonding characteristics due to the formation of voids can be expected without remelting. Further, an intermetallic compound of a surface treatment component of the object to be joined and Sn is formed in the vicinity of the joint interface between the object to be joined and the solder, and the surface treatment component diffuses into the solder material to promote brittle fracture. To prevent. In addition, the addition of a small amount of Sn to Bi can be expected to have the effect of slightly improving the ductility of Bi.
Snの添加量は、好ましくは、0.1〜0.3質量%である。はんだ層中にSnが偏析することで、一部、被接合体の表面処理成分とSnの金属間化合物が形成されなくなることを想定した場合に、Sn添加量を上記範囲とすると、被接合体の表面処理成分とSnの金属間化合物の形成を確実にすることが可能になるためである。 The addition amount of Sn is preferably 0.1 to 0.3% by mass. When it is assumed that Sn is not formed in part due to the segregation of Sn in the solder layer, the amount of Sn added is in the above range, It is possible to ensure the formation of the surface treatment component of and the intermetallic compound of Sn.
本実施形態による高温はんだ合金は、通常の方法に従って、Bi、Snの各原料を電気炉中で溶解することにより調製することができる。また、本実施形態による高温はんだ合金は、板はんだとして、糸はんだとして、あるいは合金を粉末状にしてフラックスと合わせてクリームはんだとして、加工することができる。 The high temperature solder alloy according to the present embodiment can be prepared by melting the raw materials of Bi and Sn in an electric furnace according to a conventional method. In addition, the high temperature solder alloy according to the present embodiment can be processed as a plate solder, a thread solder, or a powder of the alloy to be combined with a flux as a cream solder.
高温はんだ合金を粉末状に加工してフラックスと合わせてクリームはんだとする場合に、はんだ粉末の粒径としては、粒径分布が、10〜100μmの範囲にあるものが好ましく、20〜50μmの範囲にあるものがさらに好ましい。平均粒径では、例えば、一般的なレーザ回折/散乱式粒度分布測定装置を用いて測定した場合に、25〜50μmのものとすることができる。フラックスとしては、任意のフラックスを用いることができるが、特には、Biの酸化を抑制することが可能な組成を有するフラックスを用いることが好ましい。例えば、ハロゲン活性化ロジンフラックス等を挙げることができるが、これには限定されない。 When a high temperature solder alloy is processed into powder and combined with a flux to form a cream solder, the particle size of the solder powder preferably has a particle size distribution in the range of 10 to 100 μm, and in the range of 20 to 50 μm More preferably, The average particle size can be, for example, 25 to 50 μm as measured using a general laser diffraction / scattering type particle size distribution measuring device. Although any flux can be used as the flux, it is particularly preferable to use a flux having a composition capable of suppressing the oxidation of Bi. For example, although halogen activated rosin flux etc. can be mentioned, it is not limited to this.
本実施形態に係る高温はんだ合金は、好ましくは2階層リフロー工程を必要とする表面実装部品の接合に用いられる。図1に、2階層リフロー工程により、電子部材を製造する概念図を示す。ここで、2階層リフロー工程とは、所定の電子部材を製造するために1回目のリフロー工程を実施した後、さらに製造された電子部材を、別の部材と電気的に接合するために、一般的には1回目のリフロー工程とは異なるはんだ材を異なる接合部位に適用して2回目のリフロー工程を実施することをいう。このとき、1回目のリフロー工程に用いたはんだ合金が再溶融し、ボイドが発生することにより、接合不良等が生じやすいという問題があった。なお、2階層リフローにおけるリフロー工程の回数は2回に限定されるものではない。 The high temperature solder alloy according to the present embodiment is preferably used to join surface mounted components that require a two-level reflow process. The conceptual diagram which manufactures an electronic member by a two-levels reflow process in FIG. 1 is shown. Here, in the two-layer reflow process, after the first reflow process is performed to manufacture a predetermined electronic member, the electronic member manufactured further is electrically connected to another member in general. In other words, applying a solder material different from the first reflow process to a different bonding site to carry out the second reflow process. At this time, there is a problem that the solder alloy used in the first reflow process is remelted and a void is generated, so that a bonding failure or the like is easily generated. In addition, the number of times of the reflow process in two-level reflow is not limited to two.
さらに具体的には、金属基板3に高温はんだ合金1を載置し、さらにSiチップもしくはSiCチップ2を載置して所定の温度プロファイルで加熱する1回目のリフロー工程とを含み、これらをワイヤボンディング4して封止材5にて封止してなるパワーモジュールなどの半導体装置100を製造する工程と、この半導体装置100を、図示しない別のはんだ材を用いて、所定の温度プロファイルで加熱してプリント基板400に接合する第2回目のリフロー工程を含む電子部材の製造に用いられる。プリント基板400には、同様にして、Small Outline Package(SOP)200や、Quad Flat Package(QFP)300などの表面実装部品がはんだ接合される。本発明による高温はんだ合金は、1回目のリフロー工程で接合部を構成した後、2回目以降のリフロー工程においても再溶融しにくい点で有利に用いられる。 More specifically, the method includes a first reflow step of mounting the high temperature solder alloy 1 on the metal substrate 3 and further mounting the Si chip or the SiC chip 2 and heating with a predetermined temperature profile, A process of manufacturing a semiconductor device 100 such as a power module formed by bonding 4 and sealing with a sealing material 5 and heating the semiconductor device 100 with a predetermined temperature profile using another solder material (not shown) Then, it is used for the manufacture of an electronic member including a second reflow process of bonding to the printed circuit board 400. Similarly, surface-mounted components such as Small Outline Package (SOP) 200 and Quad Flat Package (QFP) 300 are soldered to the printed circuit board 400. The high temperature solder alloy according to the present invention is advantageously used in that it is difficult to be remelted in the second and subsequent reflow processes after the joint is formed in the first reflow process.
ここで、1回目のリフロー工程における所定の温度プロファイルは、好ましくは、Biの固相線温度270℃以上に加熱し、加熱ピーク温度を合金の液相線温度+30℃程度に設定する。加熱時間は少なくとも60秒以上保持することで良好な濡れ性が得られる。加熱ピーク温度に関しては、必ずしも液相線温度以上の加熱の必要はなく、純Biにより近い成分の場合は、純Biの固相線温度である270℃+30℃程度の加熱をすることで、良好な接合が確保できる。一例として、実施例1において用いた、図5に示す加熱温度プロファイルを用いることができるが、これには限定されない。 Here, the predetermined temperature profile in the first reflow step is preferably heated to a solidus temperature of Bi of 270 ° C. or higher, and the heating peak temperature is set to about the liquidus temperature of the alloy + 30 ° C. Good wettability can be obtained by maintaining the heating time for at least 60 seconds or more. The heating peak temperature does not necessarily need to be heated above the liquidus temperature, and in the case of a component closer to pure Bi, it is good by heating at around 270 ° C. + 30 ° C., which is the solidus temperature of pure Bi. Connection can be secured. As an example, although the heating temperature profile shown in FIG. 5 used in Example 1 can be used, it is not limited to this.
図2は、本発明による高温はんだ合金1を用いて、Siチップ2を、銅基板3に接合した後の接合体の、接合面に垂直な断面を模式的に示す図である。図2において、銅基板3、高温はんだ合金1、Siチップ2が順に積層されている。Siチップ2は、高温はんだ合金1の接合面から順に、Auめっき膜23、Ni−P膜22、Al−Si膜21、Si層20が順に積層された構造となっている。なお、本発明による高温はんだ合金は、SiCチップの裏面電極と金属基板との接合にも同様に好ましく用いられ、SiCチップの裏面構造は、例えば、高温はんだ合金の接合面から順に、Auめっき膜、Ni−Pめっき膜、Al−Si膜、Ti膜となっている。 FIG. 2 is a view schematically showing a cross section perpendicular to the bonding surface of the bonded body after bonding the Si chip 2 to the copper substrate 3 using the high temperature solder alloy 1 according to the present invention. In FIG. 2, a copper substrate 3, a high temperature solder alloy 1, and a Si chip 2 are sequentially stacked. The Si chip 2 has a structure in which an Au plating film 23, an Ni—P film 22, an Al—Si film 21, and a Si layer 20 are sequentially stacked in order from the bonding surface of the high temperature solder alloy 1. The high temperature solder alloy according to the present invention is also preferably used for bonding the back surface electrode of the SiC chip to the metal substrate, and the back surface structure of the SiC chip is, for example, Au plated film in order from the bonding surface of the high temperature solder alloy Ni-P plating film, Al-Si film, and Ti film.
上述のような温度プロファイルで1回目のリフロー工程を実施すると、高温はんだ合金1層中の、Siチップ2との界面に、Sn−Ni化合物層1bが形成される。このSn−Ni化合物層1bは、Ni3Sn4、Ni3Sn2、もしくはNiSnから主として構成され、記載した順に生成しやすい。このSn−Ni化合物層1bが、高温はんだ合金層1aへのNiの拡散を防止し、Bi−Ni化合物の形成を抑制することができると考えられる。Bi−Ni化合物は、硬くてもろいため、接合層の破壊寿命を短くすることが知られている。Niの拡散を防止する程度の厚みにSn−Ni化合物層1bが形成されるためには、Bi−Sn二元系高温はんだ合金において、Snを少なくとも0.05質量%含むことが必要となる。Snの含有量が0.05質量%未満だと、Sn−Ni化合物層1bが薄くなり、Ni拡散に対するバリア効果が低下する。図2に示す接合体に外力が加わった場合に、典型的には、Sn−Ni化合物層1bよりも脆い、高温はんだ合金層1a中、例えば、図中のA−A断面に、破断面が形成される。なお、Ni以外の裏面処理成分、例えば、P、Au、Ti等とSnとから構成されるバリア層については、Ni−Sn−P金属間化合物(Ni2SnP、Ni10Sn5P3)、Au−Sn金属間化合物(AuSn4、AuSn2、AuSn)、Ti−Sn金属間化合物(Ti6Sn5、Ti5Sn3)が挙げられる。 When the first reflow process is performed with the temperature profile as described above, the Sn—Ni compound layer 1 b is formed at the interface with the Si chip 2 in the high temperature solder alloy 1 layer. The Sn-Ni compound layer 1 b is mainly composed of Ni 3 Sn 4 , Ni 3 Sn 2 , or NiSn, and tends to be generated in the order described. It is considered that this Sn-Ni compound layer 1b can prevent the diffusion of Ni into the high temperature solder alloy layer 1a and can suppress the formation of a Bi-Ni compound. Bi-Ni compounds are known to shorten the fracture life of the bonding layer because they are hard and brittle. In order to form the Sn—Ni compound layer 1 b to a thickness that prevents the diffusion of Ni, it is necessary to include at least 0.05 mass% of Sn in the Bi—Sn binary high-temperature solder alloy. If the content of Sn is less than 0.05% by mass, the Sn-Ni compound layer 1b becomes thin, and the barrier effect on Ni diffusion is reduced. When an external force is applied to the joined body shown in FIG. 2, the fracture surface is typically more brittle than the Sn-Ni compound layer 1b, and in the high temperature solder alloy layer 1a, for example, a cross section A-A in the figure. It is formed. Incidentally, the back surface processing components other than Ni, for example, P, Au, for the barrier layer composed of a Ti or the like and Sn, Ni-SnP intermetallic compound (Ni 2 SnP, Ni 10 Sn 5 P 3), AuSn intermetallic compound (AuSn 4, AuSn 2, AuSn ), Ti-Sn intermetallic compound (Ti 6 Sn 5, Ti 5 Sn 3) and the like.
図3は、Snを含まないBi−Geはんだ合金9を用いて、SiもしくはSiCチップ2を、銅基板3に接合した後の、接合面に垂直な断面を模式的に示す図である。Siチップ2の層構成は、図2に示す接合体と同様である。Bi−Geはんだ合金9を用いて、上述のような温度プロファイルで1回目のリフロー工程を実施すると、Bi−Geはんだ合金9層中の、Siチップ2との界面から、はんだ層中の比較的広い範囲に、Bi−Ni化合物9bが形成される。Bi−Ni化合物は、典型的には、Bi3Niであり、Bi−Ni化合物9bの層は、Bi合金よりも、さらに脆く、破壊寿命が短い。したがって、図3に示す接合体に外力が加わった場合に、典型的には、Bi合金層9aよりも脆い、Bi−Ni化合物9b層中、例えば、図中のA−A断面が破断面となる。 FIG. 3 is a view schematically showing a cross section perpendicular to the bonding surface after the Si or SiC chip 2 is bonded to the copper substrate 3 using the Sn-free Bi—Ge solder alloy 9. The layer configuration of the Si chip 2 is the same as that of the joined body shown in FIG. When the first reflow process is performed using the Bi-Ge solder alloy 9 with the temperature profile as described above, the interface between the Bi-Ge solder alloy 9 layer and the Si chip 2 in the solder layer is relatively large. The Bi-Ni compound 9b is formed in a wide range. Bi-Ni compound is typically a Bi 3 Ni, a layer of Bi-Ni compound 9b, rather than Bi alloy, further brittle, a short rupture life. Therefore, when an external force is applied to the joined body shown in FIG. 3, typically, the Bi-Ni compound 9b layer is more brittle than the Bi alloy layer 9a, for example, the AA cross section in the figure is a fracture surface Become.
本発明の第1実施形態によるBi−Sn二元系高温はんだ合金によれば、接合後に被接合体成分であるNiが、はんだ合金層へ拡散することを抑制した、接合信頼性の高い接合部の形成が可能となる。また、2階層リフロー工程において、2回目以降のリフロー工程を実施する際に、はんだが再溶融することがないため、表面実装部品のはんだ付けにおいて好ましく用いることができる。 According to the Bi-Sn binary high-temperature solder alloy according to the first embodiment of the present invention, a junction with high junction reliability, in which diffusion of Ni, which is a component of an object to be joined, into the solder alloy layer is suppressed after joining Can be formed. In addition, when the second and subsequent reflow processes are performed in the two-level reflow process, the solder is not remelted, and therefore, it can be preferably used in soldering of surface-mounted components.
[第2実施形態:Bi−Sn−Ag三元系高温はんだ合金]
本発明は、第2の実施形態によれば、高温はんだ合金であってSnを、0.05質量%〜0.3質量%含有し、Agを、0.5質量%〜11.0質量%含有し、残部は、Bi及び不可避不純物からなる。第2実施形態による高温はんだ合金も、不可避不純物を除いて、Pbを含まない鉛フリー高温はんだ合金である。Agは、Biの濡れ性を改善することができるため、第1実施形態によるBi−Sn二元系はんだの特性をさらに改善することができる。
[Second embodiment: Bi-Sn-Ag ternary high-temperature solder alloy]
The present invention, according to a second embodiment, is a high temperature solder alloy containing 0.05% by mass to 0.3% by mass of Sn and 0.5% by mass to 11.0% by mass of Ag. And the balance is composed of Bi and unavoidable impurities. The high temperature solder alloy according to the second embodiment is also a lead-free high temperature solder alloy containing no Pb except for inevitable impurities. Since Ag can improve the wettability of Bi, the characteristics of the Bi—Sn binary solder according to the first embodiment can be further improved.
本実施形態による高温はんだ合金は、より好ましくは、Agを、0.5質量%〜2.5質量%含有する。上記好ましい添加範囲とすることで、液相線温度は262℃〜269℃の範囲となり、接合プロセス温度を低減できる(例えば、Ag量11%のとき、液相線温度360℃)といった更なる利点が得られる。 More preferably, the high temperature solder alloy according to the present embodiment contains 0.5% by mass to 2.5% by mass of Ag. With the above preferable addition range, the liquidus temperature is in the range of 262 ° C. to 269 ° C., and the bonding process temperature can be reduced (for example, when the amount of Ag is 11%, the liquidus temperature 360 ° C.) Is obtained.
本実施形態による高温はんだ合金もまた、通常の方法に従って、Bi、Sn、Agの各原料を電気炉中で溶解することにより調製することができる。また、本実施形態による高温はんだ合金も、板はんだとして、糸はんだとして、あるいは合金を粉末状にしてフラックスと合わせてクリームはんだとして、加工することができる。フラックスの特性については、第1実施形態において説明したとおりである。 The high temperature solder alloy according to the present embodiment can also be prepared by melting the raw materials of Bi, Sn and Ag in an electric furnace according to a conventional method. In addition, the high temperature solder alloy according to the present embodiment can also be processed as a plate solder, as a thread solder, or as a powder solder which is combined with a flux to form a cream solder. The characteristics of the flux are as described in the first embodiment.
本実施形態に係る高温はんだ合金もまた、2階層リフロー工程を必要とする表面実装部品の接合に用いられる。したがって、第2実施形態による三元系の高温はんだ合金が適用される部材や、被接合体、接合プロファイルなどは、概ね、第1実施形態で説明したのと同様とすることができる。 The high temperature solder alloy according to the present embodiment is also used to join surface mounted components that require a two-level reflow process. Therefore, a member to which the ternary high-temperature solder alloy according to the second embodiment is applied, an object to be joined, a bonding profile, and the like can be substantially the same as those described in the first embodiment.
さらには、第2実施形態による三元系の高温はんだ合金も、接合後に、高温はんだ合金層中の、Siチップとの接合界面に、Sn−Ni化合物層が形成され、Ni拡散に対するバリア効果が、第1実施形態と同様に得られ、同様の効果を奏する。 Furthermore, also in the ternary high-temperature solder alloy according to the second embodiment, after bonding, a Sn—Ni compound layer is formed in the high-temperature solder alloy layer at the bonding interface with the Si chip, and a barrier effect against Ni diffusion is obtained. The same effects as those of the first embodiment can be obtained.
本発明の第2実施形態によるBi−Sn−Ag三元系高温はんだ合金が、第1の実施形態の利点を全て備え、さらに濡れ性及び耐リフロー性が向上したものとなっている。 The Bi-Sn-Ag ternary high-temperature solder alloy according to the second embodiment of the present invention has all the advantages of the first embodiment, and further has improved wettability and reflow resistance.
以下に、本発明を、実施例を参照してより詳細に説明する。しかし、以下の実施例は本発明を限定するものではない。 In the following, the invention will be described in more detail with reference to examples. However, the following examples do not limit the present invention.
[1.Bi−Sn二元系高温はんだ合金の特性評価]
本発明の実施例に係るBi−Sn二元系高温はんだ合金、及び比較例のBiーGe系はんだを用いて、その接合特性を評価した。
[1. Characteristic evaluation of Bi-Sn binary high temperature solder alloy]
The bonding characteristics were evaluated using the Bi-Sn binary high-temperature solder alloy according to the example of the present invention and the Bi-Ge-based solder of the comparative example.
(1) 接合性評価サンプルを作製した。直径φ10mmの銅板の接合面に、メタルマスク(開口部:φ5mm、板厚:150μm)を用いて、表1に示すBi系はんだ3種を一定量設置した。ここで、はんだは、ハロゲン活性化ロジンフラックスを10質量%〜15質量%の範囲で含むクリームはんだを用いた。その後、Siチップ2を重ねた。Siチップは、図2に示すとおりの層構成を備えるものを用いた。接合性評価サンプルを図4に示す。次いで、図5に示す2段階温度プロファイルで加熱溶融して、SiチップとCu板を接合して、接合体を得た(初期品、1回目のリフロー工程)。 (1) A bondability evaluation sample was prepared. A fixed amount of three Bi-based solders shown in Table 1 was placed on a bonding surface of a copper plate with a diameter of 10 mm using a metal mask (opening: 5 mm, plate thickness: 150 μm). Here, the solder used was a cream solder containing a halogen activated rosin flux in the range of 10% by mass to 15% by mass. Thereafter, the Si chip 2 was stacked. As the Si chip, one having a layer configuration as shown in FIG. 2 was used. A bonding evaluation sample is shown in FIG. Next, heating and melting were performed in a two-step temperature profile shown in FIG. 5 to bond the Si chip and the Cu plate to obtain a bonded body (initial product, first reflow process).
(2) (1)で得られた3つのSi−Cu接合体について、継手強度試験機(RHESCA製、型式:STR−1001)を用いて、せん断強度を測定した。せん断速度は、1mm/minとした。せん断強度の測定結果より、本発明に係る、Snを添加したBi系はんだ(B2S)は25MPa以上の高強度を示した。これに対し、Snを添加していないBi系はんだ(BG、B10AG)は11MPaほどの接合強度であった。 (2) The shear strength of each of the three Si-Cu bonded bodies obtained in (1) was measured using a joint strength tester (manufactured by RHESCA, model: STR-1001). The shear rate was 1 mm / min. From the measurement results of shear strength, the Sn-added Bi-based solder (B2S) according to the present invention exhibited high strength of 25 MPa or more. On the other hand, Bi-based solder (BG, B10AG) to which Sn was not added had a bonding strength of about 11 MPa.
(3) せん断試験後の破断サンプルの外観および断面解析を実施した。図6(a)は、B2Sはんだを用いた破断サンプルの破断面の顕微鏡写真である。図6(a)には、ディンプル状のパターンを確認することができ、Bi高温はんだ合金層内で破壊が生じていることが推察される。本発明の実施形態において説明した、図2を参照すると、図2のA−A断面で破壊されていることが推察される。図6(b)〜(i)は、接合体に添加されていると考えられる元素についてのEDX断面解析結果を示す。図6(b)は、破断面にBiが多く存在することを、(d)は破断面Snが多く存在することを示す。一方、図6(f)は、破断面にNiが少ないことを示す。 (3) The appearance and cross-sectional analysis of the fractured sample after the shear test were performed. FIG. 6 (a) is a photomicrograph of a fractured surface of a fractured sample using B2S solder. In FIG. 6 (a), a dimple-like pattern can be confirmed, and it is inferred that fracture has occurred in the Bi high-temperature solder alloy layer. Referring to FIG. 2 described in the embodiment of the present invention, it is inferred that it is broken at the AA cross section of FIG. FIG.6 (b)-(i) shows the EDX cross-section analysis result about the element considered to be added to the conjugate | zygote. FIG. 6 (b) shows that a large amount of Bi exists in the fracture surface, and (d) shows that a large amount of fracture surface Sn exists. On the other hand, FIG. 6 (f) shows that the fracture surface contains less Ni.
図7(a)は、BGはんだを用いた破断サンプルの破断面の顕微鏡写真である。図7(a)には、Ni−P層のポーラスな構造が反映されており、破断面がBi高温はんだ合金層ではないことが推察される。本発明の実施形態において説明した、図3を参照すると、図3のA−A断面で破壊されていることが推察される。図7(b)〜(i)は、接合体に添加されていると考えられる元素についてのEDX解析結果を示す。図7(b)は、図6(b)と比較して、破断面のBiが少ないことを示す。一方、図7(e)は、図6(e)と比較して、破断面にPが多く存在すること、(f)は、破断面にNiが多く存在することを示す。また、図7(c)は、BGはんだの成分であるGeが多く存在することを示す。 FIG. 7 (a) is a photomicrograph of a fractured surface of a fractured sample using BG solder. The porous structure of the Ni—P layer is reflected in FIG. 7A, and it is inferred that the fracture surface is not the Bi high temperature solder alloy layer. Referring to FIG. 3 described in the embodiment of the present invention, it is inferred that it is broken at the A-A cross section of FIG. FIG.7 (b)-(i) shows the EDX analysis result about the element considered to be added to the conjugate. FIG. 7 (b) shows that the amount of Bi in the fracture surface is smaller than that in FIG. 6 (b). On the other hand, FIG. 7 (e) shows that P is more present in the fracture surface than in FIG. 6 (e), and (f) shows that Ni is more present in the fracture surface. Moreover, FIG.7 (c) shows that many Ge which is a component of BG solder exists.
これらの破断面観察結果及び、EDX解析結果より、接合強度差が生じた理由が、本発明に係るSn含有Biはんだと、Snを含有しないはんだとでは、破壊モードが異なることによることが説明できる。 From these fracture surface observation results and EDX analysis results, it can be explained that the reason for the difference in bonding strength is that the failure mode differs between the Sn-containing Bi solder according to the present invention and the solder not containing Sn. .
(4) せん断試験前のSi−Cu接合体の、接合面に垂直な断面の、観察およびEDX解析を実施した。図8(a)は、B2Sはんだを用いた接合体断面の顕微鏡写真である。図8(a)においては、高温はんだ合金1層、Auめっき膜、Ni−P膜、Al−Si膜がその順に形成されている。なお、Auめっき膜厚は0.1μmに満たないため、図8の倍率の断面像では識別できない。図8(b)〜(i)は、接合体に添加されていると考えられる元素についてのEDX解析結果を示す。図8(d)から、Niが、高温はんだ合金層へ拡散していないことかわかる。また、図8(i)から、Snが高温はんだ合金1層とSiチップ2との間に位置しているほか、高温はんだ合金層中のSnの存在も確認することができる。B2Sはんだの接合体では、Niの拡散が抑えられ、Bi−Ni系化合物を形成しなかった。このため、せん断試験後の破断サンプルは、はんだ層内で破壊したと推察することができる。これは、Siチップとはんだ接合界面にSn−Ni系化合物が形成することで、Niの拡散を抑制したことが要因として挙げられる。すなわち、Sn添加効果(被接合体とはんだ接合界面近傍のBi−Ni系金属間化合物の生成を抑制)によって接合性が向上したといえる。 (4) The observation and EDX analysis of the cross section perpendicular to the bonding surface of the Si-Cu bonded body before the shear test were performed. FIG. 8A is a photomicrograph of a cross section of a joined body using B2S solder. In FIG. 8A, a high temperature solder alloy 1 layer, an Au plating film, a Ni-P film, and an Al-Si film are formed in that order. In addition, since the Au plating film thickness is less than 0.1 μm, it can not be distinguished by the cross-sectional image of FIG. FIG.8 (b)-(i) shows the EDX analysis result about the element considered to be added to the conjugate | zygote. It can be seen from FIG. 8 (d) that Ni has not diffused to the high temperature solder alloy layer. In addition to the fact that Sn is located between the high temperature solder alloy 1 layer and the Si chip 2, the presence of Sn in the high temperature solder alloy layer can also be confirmed from FIG. 8 (i). In the B2S solder joint, the diffusion of Ni was suppressed, and the Bi—Ni-based compound was not formed. For this reason, it can be inferred that the fractured sample after the shear test is broken in the solder layer. This is because the formation of the Sn-Ni-based compound at the interface between the Si chip and the solder suppresses the diffusion of Ni. That is, it can be said that the joining property is improved by the Sn addition effect (suppressing the formation of the Bi-Ni-based intermetallic compound in the vicinity of the interface between the joined body and the solder joint).
図9(a)は、BGはんだを用いた接合体断面の顕微鏡写真である。図9(a)においては、高温はんだ合金1層、Auめっき膜、Ni−P膜、Al−Si膜が、その順に形成されている。なお、Auめっき膜厚は0.1μmに満たないため、図9の倍率の断面像では識別できない。図9(b)〜(i)は、接合体に添加されていると考えられる元素についてのEDX解析結果を示す。図9(d)から、Niが、高温はんだ合金層へ広く拡散していることかわかる。このように、Snを添加していないBGはんだを用いた接合体の接合部では、Siチップ表面膜の成分であるNiがはんだ中に拡散(拡散長:最大約53μm)し、Bi−Ni系化合物を形成していた。このことから、せん断試験後の破断サンプルは、はんだ合金層内に形成したBi−Ni化合物層、あるいはBi−Ni化合物層とNi−P膜との界面で破壊したと判断することができる。 FIG. 9A is a photomicrograph of a cross section of a bonded body using BG solder. In FIG. 9A, a high temperature solder alloy 1 layer, an Au plating film, an Ni-P film, and an Al-Si film are formed in that order. In addition, since the Au plating film thickness is less than 0.1 μm, it can not be distinguished by the cross-sectional image of the magnification of FIG. FIG.9 (b)-(i) shows the EDX analysis result about the element considered to be added to the conjugate | zygote. It can be seen from FIG. 9 (d) that Ni is widely diffused into the high temperature solder alloy layer. Thus, in the joint of a joined body using BG solder to which Sn is not added, Ni, which is a component of the surface film of the Si chip, diffuses into the solder (diffusion length: about 53 μm at maximum), and Bi-Ni-based Formed a compound. From this, it can be determined that the fractured sample after the shear test was broken at the interface between the Bi-Ni compound layer formed in the solder alloy layer or the Bi-Ni compound layer and the Ni-P film.
(5) Snを過剰に添加するとはんだ接合部中に低融点層が生じ、2階層リフローにおいて、はんだ接合部が再溶融することが想定される。従って、被接合体とはんだ接合界面近傍のBi−Ni系金属間化合物の生成を抑制し、かつ、2階層リフロー時に、はんだ接合部が再溶融しないSn添加量の決定について検討した。 (5) It is assumed that a low melting point layer is generated in the solder joint when adding Sn excessively, and the solder joint remelts in the two-level reflow. Therefore, the formation of the Bi-Ni-based intermetallic compound in the vicinity of the interface between the body to be joined and the solder joint was suppressed, and the determination of the amount of Sn addition which does not remelt the solder joint during two-level reflow was examined.
図10のBi−Sn合金状態図より、Sn添加量を0.3質量%から0.14質量%へと減少させると、固相線温度は247℃から260℃へと上昇する。よって、平衡状態ではSn添加量が0.14質量%以下であれば、温度260℃の耐リフロー性を有するといえる。しかしながら、実装時は非平衡状態であり、被接合体から物質の拡散に起因する合金の組成変動や、はんだ接合部中での偏析により、組成が局所的に不均一になる現象が生じることから、Sn添加量を0.05質量%から2.0質量%の範囲に設定した。 According to the Bi-Sn alloy phase diagram in FIG. 10, the solidus temperature rises from 247 ° C. to 260 ° C. when the Sn content is reduced from 0.3% by mass to 0.14% by mass. Therefore, in the equilibrium state, it can be said that when the amount of added Sn is 0.14 mass% or less, it has a reflow resistance at a temperature of 260 ° C. However, it is a non-equilibrium state at the time of mounting, and a phenomenon in which the composition becomes locally nonuniform occurs due to composition variation of the alloy resulting from diffusion of the substance from the object to be joined and segregation in the solder joint. The amount of Sn added was set in the range of 0.05% by mass to 2.0% by mass.
(6) Sn添加量の異なる、Bi−Sn二元系高温はんだ合金を用いて上記(1)と同様のプロセスで、図5の温度プロファイルに沿って加熱し、Si−Cu接合体を得た(初期品)。このSi−Cu接合体初期品に対し、リフロー工程(温度:260℃、保持時間:3min)に3回かけ、X線観察することで耐リフロー性について調査した。ボイドの拡大または、ボイドの移動が観察された場合に、再溶融が発生したものと判定することができる。 (6) Using a Bi-Sn binary high-temperature solder alloy having a different Sn content, heating was performed along the temperature profile of FIG. 5 in the same process as (1) above to obtain a Si-Cu bonded body (Early goods). With respect to this Si-Cu bonded initial product, the reflow resistance (temperature: 260 ° C., holding time: 3 min) was measured three times, and the resistance to reflow was examined by X-ray observation. If expansion of the void or movement of the void is observed, it can be determined that remelting has occurred.
図11に、X線観察結果を示す。X線写真中、黒い部分が高温はんだ合金1を示しており、白っぽい部分が被接合体であるCu基板3を示している。また、高温はんだ合金1中の白い部分がボイド50である。図11より、Snを1質量%および2質量%添加したサンプルにおいて、はんだ接合部の再溶融(ボイド拡大)を確認した。これらの結果から、Sn添加量を、0.3質量%以下としたBi−Sn二元系高温はんだ合金が、はんだ接合部の再溶融を生じさせないために有用であることがわかった。図11から、リフロー工程を1回実施した場合と、3回実施した場合とでは、ボイド拡大や移動等の変化がないことがわかった。図示省略したが、リフロー工程を2回実施した場合も同様であった。 FIG. 11 shows the result of the X-ray observation. In the X-ray photograph, the black part shows the high temperature solder alloy 1 and the whitish part shows the Cu substrate 3 which is a bonded body. Also, the white portion in the high temperature solder alloy 1 is a void 50. From FIG. 11, re-melting (void expansion) of the solder joint was confirmed in the samples to which 1% by mass and 2% by mass of Sn were added. From these results, it has been found that a Bi—Sn binary high-temperature solder alloy in which the amount of Sn is 0.3 mass% or less is useful because it does not cause remelting of the solder joint. It was found from FIG. 11 that there was no change in void expansion, movement, etc. between the case where the reflow process was performed once and the case where it was performed three times. Although not shown, the same applies to the case where the reflow process is performed twice.
Bi系はんだに所定量のSnを添加した、本発明に係る高温はんだ合金は、被接合体の表面処理成分であるNiとSnとの金属間化合物を接合界面近傍に形成させてバリア層とすることで、該表面処理成分のはんだ中への拡散を抑えるとともに、2階層リフロー時にはんだが再溶融しない接合部を確保することが可能となった。 The high temperature solder alloy according to the present invention, in which a predetermined amount of Sn is added to a Bi based solder, forms an intermetallic compound of Ni and Sn which is a surface treatment component of the joined body in the vicinity of the bonding interface to form a barrier layer. Thus, it is possible to suppress the diffusion of the surface treatment component into the solder and to secure a joint where the solder does not remelt at the time of the two-level reflow.
[2.Bi−Agはんだ合金の特性評価]
本実験例は、Bi−Sn−Ag三元系高温はんだ合金の特性評価に代えて、Biはんだの特性を改善するAgの添加効果を調べたものである。Ag添加によりAg3Sn金属間化合物が形成すると低融点層(Sn層)が減少して、耐リフロー性の向上が予測され、Ag添加によって先の実施例で実証したBi−Sn高温はんだ合金の有利な特性を損なうことがないことは、合理的に推測することが可能である。
[2. Characteristic Evaluation of Bi-Ag Solder Alloy]
In this experimental example, in place of the characteristic evaluation of the Bi-Sn-Ag ternary high-temperature solder alloy, the addition effect of Ag for improving the characteristics of the Bi solder was investigated. When the Ag 3 Sn intermetallic compound is formed by the addition of Ag, the low melting point layer (Sn layer) decreases, and the improvement of the reflow resistance is predicted, and the addition of Ag demonstrates the Bi-Sn high temperature solder alloy demonstrated in the previous example. It can be reasonably inferred that the advantageous properties are not impaired.
(1) ぬれ性評価サンプルを作製した。20mm□×t1.6mmの銅張り両面基板(銅箔厚さ:50μm)の接合面に、2.5mm×3mm×1.5mmのはんだ小片(重量:約100mg)を搭載した。はんだ小片にJEITA標準フラックス(ハロゲン活性化ロジン)を塗布し、図12に示す2段階温度プロファイルで加熱・溶融してサンプルとした。はんだの組成は、Agなし、Ag2.5質量%、Ag7質量%、Ag11質量%で、残余はBiからなる4種とした。 (1) The wettability evaluation sample was produced. Solder pieces (weight: about 100 mg) of 2.5 mm × 3 mm × 1.5 mm were mounted on the bonding surface of a 20 mm ×× 1.6 mm copper-clad double-sided board (copper foil thickness: 50 μm). Solder pieces were coated with JEITA standard flux (halogen activated rosin) and heated and melted with a two-step temperature profile shown in FIG. 12 to obtain a sample. The composition of the solder was four types consisting of no Ag, 2.5% by mass of Ag, 7% by mass of Ag, 11% by mass of Ag, with the balance being Bi.
(2) ぬれ性の評価は、上記で作成したサンプルが、溶融・凝固した後、銅張り両面基板に対するぬれ広がり面積及び接触角を測定(N=3)することによって実施した。図13(a)は、銅張り両面基板3に高温はんだ合金1が拡がった状態の平面図を模式的に示すものである。この場合のぬれ広がり面積Sを測定した。測定は、リフローソルダリング観察装置SMT ScopeSK−5000(型番)(山陽精工(製造会社名)製)を用いて実施した。図13(b)は、同様に、銅張り両面基板3に高温はんだ合金1が拡がった状態の、接合面に垂直な方向の断面図を模式的に示すものである。図中、θで表される、基板3と高温はんだ合金1との接触角を測定した。測定は、形状測定レーザーマイクロスコープ VK−8700(KEYENCE(製造会社名)製)を用いて実施した。 (2) The wettability was evaluated by measuring the wetting spread area and the contact angle (N = 3) on the copper-clad double-sided substrate after the sample prepared above was melted and solidified. FIG. 13A schematically shows a plan view in a state in which the high temperature solder alloy 1 is spread on the copper-clad double-sided substrate 3. The wet spread area S in this case was measured. The measurement was performed using a reflow soldering observation apparatus SMT Scope SK-5000 (model number) (manufactured by Sanyo Seiko Co., Ltd. (manufacturer name)). FIG. 13 (b) similarly schematically shows a cross-sectional view in a direction perpendicular to the bonding surface in a state in which the high temperature solder alloy 1 is spread on the copper-clad double-sided substrate 3. FIG. The contact angle between the substrate 3 and the high temperature solder alloy 1 represented by θ in the figure was measured. The measurement was performed using a shape measuring laser microscope VK-8700 (manufactured by KEYENCE (manufacturer name)).
(3)図14は、BiへのAg添加量を変化させたときの、濡れ広がり面積と接触角の変化を示すグラフである。Biに、Agを約2.5〜約11質量%添加することで、Bi合金の濡れ性が向上していることがわかる。特には、Ag含有量の増加に伴い。濡れ性が向上する傾向が明らかになった。したがって、Bi−Sn−Ag三元系の高温はんだ合金においては、上記Bi−Sn二元系の持つ特性に加えて、Ag添加による濡れ性向上の効果が期待される。 (3) FIG. 14 is a graph showing changes in the wetting spread area and the contact angle when the amount of Ag added to Bi is changed. It can be seen that the wettability of the Bi alloy is improved by adding about 2.5 to about 11% by mass of Ag to Bi. Especially with the increase of Ag content. The tendency to improve the wettability became clear. Therefore, in addition to the characteristics possessed by the above-mentioned Bi-Sn binary system, in the Bi-Sn-Ag ternary high-temperature solder alloy, the effect of improving the wettability by the addition of Ag is expected.
本発明による高温はんだ合金は、表面実装部品の接合部に用いられる。特には、ICなどパッケージ部品に好適に用いられる。また発熱の大きい部品、例えばLED素子や、パワーダイオードなどパワー半導体デバイスの接合部、さらにはプリント配線板などに搭載される電子部品全般におけるIC素子などの内部接続の接合部に好適に用いられる。応用される製品では、先に述べたLED素子を用いた照明部品や、インバータの駆動回路、パワーモジュールといわれる電力変換機などが対象として挙げられる。 The high temperature solder alloy according to the invention is used in the joints of surface mounted components. In particular, it is suitably used for package parts, such as IC. Further, it is suitably used for internal connection junctions such as IC devices in general electronic components mounted on components with large heat generation, for example, LED devices, power semiconductor devices such as power diodes, and printed wiring boards. The applied products include the above-described illumination components using the LED elements, a drive circuit of an inverter, and a power converter called a power module.
1 高温はんだ合金
1a 高温はんだ合金層
1b Ni−Sn化合物層
2 Siチップ(SiCチップ)
20 Si層
21 Al−Si膜
22 Ni−P膜
23 Auめっき膜
3 基板
4 ワイヤボンディング
5 封止材
9 Snを含まないはんだ合金
9a はんだ合金層
9b Bi−Ni金属間化合物層
50 ボイド
100 半導体装置
200 SOP
300 QFP
400 プリント基板
1 High temperature solder alloy 1a High temperature solder alloy layer 1b Ni-Sn compound layer 2 Si chip (SiC chip)
DESCRIPTION OF SYMBOLS 20 Si layer 21 Al-Si film 22 Ni-P film 23 Au plating film 3 board | substrate 4 wire bonding 5 sealing material 9 Sn-free solder alloy 9a solder alloy layer 9b Bi-Ni intermetallic compound layer 50 void 100 semiconductor device 200 SOP
300 QFP
400 printed circuit board
Claims (5)
スズを、0.2質量%〜0.3質量%含有し、残部は、ビスマス及び不可避不純物からなる高温はんだ合金、または
スズを、0.2質量%〜0.3質量%、銀を、0.5質量%〜11質量%含有し、残部は、ビスマス及び不可避不純物からなる高温はんだ合金。 And the metal substrate, the back electrode a high temperature solder alloy for use in bonding between Si chip or SiC chip including Ni,
A high temperature solder alloy containing 0.2% by mass to 0.3% by mass of tin, with the balance being bismuth and unavoidable impurities, or
A high temperature solder alloy comprising 0.2% by mass to 0.3% by mass of tin and 0.5% by mass to 11% by mass of silver, with the balance being bismuth and unavoidable impurities.
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