JP6335619B2 - 配線基板及び半導体パッケージ - Google Patents
配線基板及び半導体パッケージ Download PDFInfo
- Publication number
- JP6335619B2 JP6335619B2 JP2014092949A JP2014092949A JP6335619B2 JP 6335619 B2 JP6335619 B2 JP 6335619B2 JP 2014092949 A JP2014092949 A JP 2014092949A JP 2014092949 A JP2014092949 A JP 2014092949A JP 6335619 B2 JP6335619 B2 JP 6335619B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- semiconductor element
- adhesive layer
- wirings
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/8506—Containers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/855—Optical field-shaping means, e.g. lenses
- H10H20/856—Reflecting means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/066—Heatsink mounted on the surface of the printed circuit board [PCB]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/85—Packages
- H10H20/858—Means for heat extraction or cooling
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structure Of Printed Boards (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
[第1の実施の形態に係る配線基板の構造]
まず、第1の実施の形態に係る配線基板の構造について説明する。図1は、第1の実施の形態に係る配線基板を例示する図であり、図1(b)は平面図、図1(a)は図1(b)のA−A線に沿う断面図である。
次に、第1の実施の形態に係る配線基板の製造方法について説明する。図2〜図6は、第1の実施の形態に係る配線基板の製造工程を例示する図である。なお、第1の実施の形態に係る配線基板の製造工程の説明で用いる断面図は、全て図1(a)に対応する断面図である。
第1の実施の形態の変形例1では、第1の実施の形態とは貫通配線を形成する領域が異なる配線基板の例を示す。なお、第1の実施の形態の変形例1において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第1の実施の形態の変形例2では、第1の実施の形態とは貫通配線を形成する配線の平面形状が異なる配線基板の例を示す。なお、第1の実施の形態の変形例2において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第2の実施の形態では、第1の実施の形態で示した配線基板に半導体素子(発光素子)を搭載した半導体パッケージの例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第2の実施の形態の変形例1では、第1の実施の形態で示した配線基板に半導体素子(発光素子)を搭載した半導体パッケージの他の例を示す。なお、第2の実施の形態の変形例1において、既に説明した実施の形態と同一構成部品についての説明は省略する。
の上面にはLEDである半導体素子120がフェイスアップ状態で実装されている。又、2つの電気接続用端子である配線161,162の上面は、半導体素子120のアノード端子及びカソード端子(図示せず)とボンディングワイヤ180を介して夫々接続されている。基板150の上面外縁部には、半導体素子120が発した光を反射するリフレクタ170が搭載されている。又、リフレクタ170の内側には、半導体素子120を封止する封止樹脂140が設けられている。
第2の実施の形態の変形例2では、第1の実施の形態で示した配線基板に半導体素子(発光素子)を搭載した半導体パッケージの他の例を示す。なお、第2の実施の形態の変形例2において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第3の実施の形態では、ポリイミド層から突出した貫通配線を有する配線基板の例を示す。なお、第3の実施の形態において、既に説明した実施の形態と同一構成部品についての説明は省略する。
10 ポリイミド層
10x 貫通孔
20、70、190 接着層
20a 接着層の外縁部
30A 金属層
31〜33 配線
41〜45 めっき膜
50 貫通配線
60 絶縁層
60x、60y 開口部
80 放熱板
100、100A、100B、200 半導体パッケージ
110 半導体モジュール
120、210 半導体素子
130 電気接続用端子
135 熱拡散用端子
139、220 はんだ
140 封止樹脂
150 基板
160 配線
170 リフレクタ
180 ボンディングワイヤ
T スペース
Z 配線部
Claims (7)
- 半導体素子又は半導体素子を含むモジュールが搭載される配線基板であって、
放熱板と、
前記放熱板上にフィラーを含有する接着層を介して設けられたポリイミド層と、
前記ポリイミド層上に設けられた第2接着層と、
前記第2接着層上の同一平面に設けられた、前記半導体素子と電気的に接続される電気接続用配線、及び、前記半導体素子とは電気的に接続されない熱拡散用配線と、
前記熱拡散用配線と一体に形成され、前記熱拡散用配線の前記第2接着層側の面に前記第2接着層及び前記ポリイミド層を厚さ方向に貫通する貫通孔を充填するように設けられた複数の貫通配線と、
前記第2接着層上に設けられ、前記電気接続用配線を露出する開口部と、前記熱拡散用配線を露出する開口部を備えた絶縁層と、を有し、
前記絶縁層は、前記第2接着層の外縁部を露出しており、
平面視において、前記熱拡散用配線の形成領域は、前記絶縁層の前記熱拡散用配線を露出する開口部の領域よりも外側に延在し、前記電気接続用配線の形成領域よりも大きく設けられていることを特徴とする配線基板。 - 前記半導体素子は発光素子であり、
前記絶縁層は、前記発光素子の照射する光を反射する反射膜であることを特徴とする請求項1記載の配線基板。 - 前記複数の貫通配線は、平面視において、前記貫通配線の外形の一部が搭載される前記半導体素子の外形の一部と重複する範囲に配置されるように設けられる請求項1又は2記載の配線基板。
- 前記電気接続用配線は平面上のみに形成され、前記ポリイミド層及び前記接着層の前記電気接続用配線と平面視で重複する領域には前記貫通配線は存在しない請求項1乃至3の何れか一項記載の配線基板。
- 前記貫通配線は、前記ポリイミド層の前記接着層と接する面から突出する突出部を有することを特徴とする請求項1乃至4の何れか一項記載の配線基板。
- 隣接する前記貫通配線の前記突出部同士が接していることを特徴とする請求項5記載の配線基板。
- 請求項1乃至6の何れか一項記載の配線基板と、
前記熱拡散用配線の前記絶縁層から露出する面上に搭載された前記半導体素子又は前記モジュールと、を有する半導体パッケージ。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014092949A JP6335619B2 (ja) | 2014-01-14 | 2014-04-28 | 配線基板及び半導体パッケージ |
US14/536,791 US9192049B2 (en) | 2014-01-14 | 2014-11-10 | Wiring substrate and semiconductor package |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014004630 | 2014-01-14 | ||
JP2014004630 | 2014-01-14 | ||
JP2014092949A JP6335619B2 (ja) | 2014-01-14 | 2014-04-28 | 配線基板及び半導体パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015156463A JP2015156463A (ja) | 2015-08-27 |
JP6335619B2 true JP6335619B2 (ja) | 2018-05-30 |
Family
ID=53522076
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014092949A Active JP6335619B2 (ja) | 2014-01-14 | 2014-04-28 | 配線基板及び半導体パッケージ |
Country Status (2)
Country | Link |
---|---|
US (1) | US9192049B2 (ja) |
JP (1) | JP6335619B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7125830B2 (ja) | 2020-03-06 | 2022-08-25 | 台灣中油股▲ふん▼有限公司 | 脂環式ジオールの作製方法 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5716972B2 (ja) * | 2013-02-05 | 2015-05-13 | 株式会社デンソー | 電子部品の放熱構造およびその製造方法 |
US9087777B2 (en) * | 2013-03-14 | 2015-07-21 | United Test And Assembly Center Ltd. | Semiconductor packages and methods of packaging semiconductor devices |
JP6420966B2 (ja) * | 2014-04-30 | 2018-11-07 | 新光電気工業株式会社 | 配線基板及びその製造方法と電子部品装置 |
TW201545378A (zh) * | 2014-05-19 | 2015-12-01 | Achrolux Inc | 封裝結構及其製法 |
CN107004752B (zh) * | 2014-12-08 | 2019-04-26 | 夏普株式会社 | 发光装置用基板、发光装置以及照明装置 |
TWI620356B (zh) * | 2016-10-07 | 2018-04-01 | 欣興電子股份有限公司 | 封裝結構及其製作方法 |
JP6961902B2 (ja) * | 2017-03-15 | 2021-11-05 | Kyb株式会社 | 部品実装体及び電子機器 |
JP6852649B2 (ja) | 2017-10-24 | 2021-03-31 | 株式会社オートネットワーク技術研究所 | 回路構成体及び回路構成体の製造方法 |
JP2019114757A (ja) * | 2017-12-26 | 2019-07-11 | 太陽誘電株式会社 | 半導体モジュール、半導体モジュールの製造方法 |
TWI675441B (zh) * | 2018-05-14 | 2019-10-21 | 欣興電子股份有限公司 | 封裝載板結構及其製造方法 |
KR102040501B1 (ko) | 2019-04-24 | 2019-11-05 | 주식회사 에프티랩 | 다면체 형태의 이온화 챔버를 이용한 라돈센서 장치 |
JP2020202203A (ja) * | 2019-06-06 | 2020-12-17 | 株式会社オートネットワーク技術研究所 | 回路構成体及び電気接続箱 |
CN112490344A (zh) * | 2019-09-11 | 2021-03-12 | 光宝光电(常州)有限公司 | 发光封装结构及其制造方法及复合基板 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0955459A (ja) * | 1995-06-06 | 1997-02-25 | Seiko Epson Corp | 半導体装置 |
TW546806B (en) * | 1999-11-08 | 2003-08-11 | Siliconware Precision Industries Co Ltd | Semiconductor package with common lead frame and heat sink |
JP2001160597A (ja) * | 1999-11-30 | 2001-06-12 | Nec Corp | 半導体装置、配線基板及び半導体装置の製造方法 |
KR100368025B1 (ko) * | 2000-09-26 | 2003-01-15 | 삼성전자 주식회사 | 중심 지향성 솔더 볼 랜드 타입을 갖는 회로 기판 및 이를이용한 bga 패키지 |
US6611055B1 (en) * | 2000-11-15 | 2003-08-26 | Skyworks Solutions, Inc. | Leadless flip chip carrier design and structure |
US7550319B2 (en) * | 2005-09-01 | 2009-06-23 | E. I. Du Pont De Nemours And Company | Low temperature co-fired ceramic (LTCC) tape compositions, light emitting diode (LED) modules, lighting devices and method of forming thereof |
JP2007287751A (ja) | 2006-04-12 | 2007-11-01 | Toyoda Gosei Co Ltd | 発光装置 |
JP2007318096A (ja) * | 2006-04-27 | 2007-12-06 | Sanyo Electric Co Ltd | 回路装置 |
WO2008143138A1 (ja) * | 2007-05-18 | 2008-11-27 | Toppan Printing Co., Ltd. | 配線基板、半導体パッケージ及び電子機器 |
JP2011146513A (ja) * | 2010-01-14 | 2011-07-28 | Renesas Electronics Corp | 半導体装置 |
JP5463205B2 (ja) * | 2010-05-27 | 2014-04-09 | 日本メクトロン株式会社 | フレキシブル回路基板 |
JP5940799B2 (ja) * | 2011-11-22 | 2016-06-29 | 新光電気工業株式会社 | 電子部品搭載用パッケージ及び電子部品パッケージ並びにそれらの製造方法 |
JP6230777B2 (ja) | 2012-01-30 | 2017-11-15 | 新光電気工業株式会社 | 配線基板、配線基板の製造方法、及び発光装置 |
JP6010333B2 (ja) | 2012-04-26 | 2016-10-19 | 京セラ株式会社 | 配線基板および電子装置 |
US8998454B2 (en) * | 2013-03-15 | 2015-04-07 | Sumitomo Electric Printed Circuits, Inc. | Flexible electronic assembly and method of manufacturing the same |
-
2014
- 2014-04-28 JP JP2014092949A patent/JP6335619B2/ja active Active
- 2014-11-10 US US14/536,791 patent/US9192049B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7125830B2 (ja) | 2020-03-06 | 2022-08-25 | 台灣中油股▲ふん▼有限公司 | 脂環式ジオールの作製方法 |
Also Published As
Publication number | Publication date |
---|---|
US20150200337A1 (en) | 2015-07-16 |
JP2015156463A (ja) | 2015-08-27 |
US9192049B2 (en) | 2015-11-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6335619B2 (ja) | 配線基板及び半導体パッケージ | |
US9698563B2 (en) | Flexible LED device and method of making | |
US8421088B2 (en) | Surface mounting type light emitting diode | |
US6373131B1 (en) | TBGA semiconductor package | |
JP6293995B2 (ja) | 発光素子搭載用パッケージ及びその製造方法、並びに発光素子パッケージ | |
US8604506B2 (en) | Surface mounting type light emitting diode and method for manufacturing the same | |
KR20120002916A (ko) | 엘이디 모듈, 엘이디 패키지와 배선기판 및 그 제조방법 | |
JP6392163B2 (ja) | 配線基板及びその製造方法、半導体装置 | |
JP4910220B1 (ja) | Ledモジュール装置及びその製造方法 | |
JP5940799B2 (ja) | 電子部品搭載用パッケージ及び電子部品パッケージ並びにそれらの製造方法 | |
JP2003168829A (ja) | 発光装置 | |
JP6280710B2 (ja) | 配線基板、発光装置及び配線基板の製造方法 | |
JPWO2014064871A1 (ja) | 発光装置およびその製造方法ならびに発光装置実装体 | |
JP2015005681A (ja) | 半導体装置及びその製造方法 | |
JP4904604B1 (ja) | Ledモジュール装置及びその製造方法 | |
US9324929B2 (en) | Wiring substrate | |
JP6316731B2 (ja) | 配線基板及びその製造方法、並びに半導体パッケージ | |
KR101051488B1 (ko) | 발광 다이오드 유닛의 제조 방법과, 이 방법에 의하여 제조된 발광 다이오드 유닛 | |
CN102790140B (zh) | 封装结构及其制作方法 | |
JP6279921B2 (ja) | 配線基板及び半導体パッケージ | |
JP2008300542A (ja) | 発光素子パッケージ用基板及び発光素子パッケージ | |
JP2005072382A (ja) | 放熱用リードフレーム基板及びその製造方法並びに半導体装置 | |
JP2008205395A (ja) | 表面実装型発光ダイオードおよびその製造方法 | |
CN111276589A (zh) | 封装载板及发光装置 | |
JP2002064174A (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20161215 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20170912 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20171003 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171121 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20180417 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20180501 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6335619 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |