JP6261476B2 - Power converter and output voltage detection method of power converter - Google Patents

Description

  The present invention relates to a power conversion device including a plurality of switching elements and a voltage detection method between switching elements included in the power conversion device.

  Power conversion devices such as inverter devices, servo amplifier devices, and switching power supply devices incorporate a plurality of switching elements. An electric circuit is configured by combining a plurality of switching elements. In many power conversion devices, a power conversion that outputs power using a positive electrode side as a first switching unit, a negative electrode side as a second switching unit, and a connection point between the first switching unit and the second switching unit as an output terminal. The main circuit is adopted. The switching unit includes one or a plurality of switching elements connected in series. In such a power conversion main circuit, it is necessary to provide a dead time period in advance in the switching signal so that a through current does not flow between switching elements connected in series.

  Due to the dead time period of the switching signal, the output voltage of the power conversion main circuit includes an error with respect to the command value. Furthermore, the turn-on time and turn-off time of the switching element vary depending on various conditions such as switching voltage, switching current, and temperature. Therefore, the voltage between switching elements built in the power converter may be different from the intended voltage. The dead time period of the power conversion main circuit may be different from the intended dead time period of the switching signal. Therefore, there is a demand for detecting a voltage between switching elements built in the power converter. There is a demand for detecting the output voltage of the power conversion main circuit in order to correct the dead time of the switching signal.

  In the conventional power conversion device, two inverters connected in series are attached between the main terminals of the switching elements on the negative electrode side and detect that the main terminals of the switching elements on the negative electrode side are conductive. The conduction time between the sensor that is the continuity detection means and the main terminal of the switching element on the negative electrode side is counted based on the detection signal from this sensor, and the count value is output to the current control arithmetic unit for the output voltage of the power conversion main circuit. 2. Description of the Related Art There is known a configuration including a dead time compensation device including a counter that is a counting unit that outputs a command value compensation signal. (For example, patent document 1).

  As a technique for automatically controlling the dead time, in the step-down DC-DC converter, the characteristics of the gate voltage of the main switching element and the gate voltage of the switching element for synchronous rectification are monitored, and based on these detection results, the above 2 A technique for minimizing the dead time period by adjusting the ON and OFF timings of two switching elements is known. (For example, Patent Document 2)

  Further, as described in Patent Document 2, the characteristics of the gate voltage of the switching element are monitored, and based on the detection result, the output voltage of the power conversion main circuit is detected. A technique for performing compensation is known (for example, Patent Document 3).

Japanese Patent Laid-Open No. 5-252795 (paragraph 0014, FIG. 1) JP 2007-329748 A (paragraphs 0033 to 0070, FIG. 7) JP 2010-016937 A (paragraph 0016, FIG. 1)

  In the configuration as disclosed in Patent Document 1, the conduction state between the main terminals of the switching elements is detected by the conduction detecting means, and the conduction time is counted by the counting means from this detection signal, so that the count value is compensated for the voltage command value. As a signal, the current control calculation means recognizes the actual output voltage of the main power conversion circuit, and performs a dead time compensation calculation process on the voltage command value.

  However, in general, the power conversion main circuit and the periphery of the power conversion main circuit are complicated in order to reduce the parasitic inductance and to cool the generated power loss. Therefore, the task of attaching these continuity detecting means and the like to the power conversion main circuit requires advanced technology, and there is a problem that it is difficult to manufacture the power conversion device.

  Moreover, the thing of the system which monitors the characteristics of the gate voltage like patent document 2, 3 detects the gate voltage of a switching element, and detects the output voltage of a power conversion main circuit from the voltage state. However, the characteristics appearing in the gate voltage are determined by the semiconductor characteristics of the switching element and cannot be adjusted by the designer of the power converter. The characteristic that appears in the gate voltage is typically a voltage fluctuation of about several volts and several microseconds. Although it is necessary to detect such minute voltage fluctuations, there is a problem in terms of reliability because it is vulnerable to electromagnetic noise and the power conversion device may malfunction.

  The present invention has been made to solve the above-described problems, and provides a power conversion device that detects an output voltage of a power conversion main circuit and that is easy to manufacture and does not malfunction. The purpose is to do. Another object of the present invention is to provide a voltage detection method between switching elements incorporated in a power converter, which is easy to manufacture and does not malfunction.

The power conversion device of the present invention includes a power conversion main circuit having two or more switching units, a plurality of gate driving units that respectively drive the switching units, and an impedance element connected between the gate driving units, A detection unit that detects a voltage or a current of the impedance element, wherein one end of the impedance element is connected to one of the plurality of gate driving units, and the other end of the impedance element is connected to the one end. It is connected to one of the plurality of other gate driving units different from the gate driving unit .

  The voltage detection method of the power conversion device according to the present invention is connected between the first gate driving unit that drives the first switching unit and the second gate driving unit that drives the second switching unit. The voltage between the first switching part and the second switching part is detected by detecting the voltage or current of the impedance element using the impedance element.

  According to this invention, the output voltage of the power conversion main circuit can be detected by detecting the potential difference between the switching units from the voltage or current of the impedance element connected between the corresponding gate drive circuits, and It can be easily manufactured and does not malfunction.

It is a block diagram which shows the power converter device by Embodiment 1 of this invention. It is a circuit diagram which shows the power converter device by Embodiment 1 of this invention. It is a circuit diagram which shows the other power converter device by Embodiment 1 of this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a layout diagram of components of a power conversion device according to Embodiment 1 of the present invention. It is an arrangement plan of parts of other power converters by Embodiment 1 of this invention. It is a block diagram which shows the power converter device by Embodiment 2 of this invention. It is a circuit diagram which shows the power converter device by Embodiment 2 of this invention. It is a circuit diagram which shows the other power converter device by Embodiment 2 of this invention. It is a time chart of the insulation circuit of the power converter device by Embodiment 2 of this invention. It is a block diagram of the dead time correction circuit of the power converter device by Embodiment 2 of this invention. It is a time chart which shows the operation | movement of dead time correction | amendment in the dead time correction circuit of the power converter device by Embodiment 2 of this invention when load current is positive. It is a time chart which shows the operation | movement of dead time correction | amendment in the dead time correction circuit of the power converter device by Embodiment 2 of this invention when load current is negative. It is a block diagram which shows the power converter device by Embodiment 3 of this invention. It is a block diagram which shows the other power converter device by Embodiment 3 of this invention. It is a block diagram which shows the other power converter device by Embodiment 3 of this invention. It is a layout view showing a power converter according to Embodiment 4 of the present invention. It is a layout view showing another power converter according to Embodiment 4 of the present invention.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram showing a power conversion device according to Embodiment 1 of the present invention, and shows the configuration of a power conversion main circuit 1, gate drive circuit boards 2a and 2B, a control unit 3, and peripheral components. . As shown in FIG. 1, the power conversion main circuit 1 is configured as a two-level power conversion circuit.

  In power conversion main circuit 1 according to the first embodiment, the positive electrode of power conversion main circuit 1 is connected to DC bus 5a, and the negative electrode of power conversion main circuit 1 is connected to DC bus 5b. The power conversion main circuit 1 includes a switching element 1a as a first switching unit connected to the DC bus 5a on the positive electrode side, and a switching element 1b as a second switching unit connected to the DC bus 5b on the negative electrode side. The switching element 1a and the switching element 1b are connected in series, and the output terminal 4 of the power conversion main circuit 1 is provided at the electrical connection point 5c. The power conversion main circuit 1 supplies power from an output terminal 4 to a load (not shown). If the first switching unit becomes conductive, the power conversion main circuit 1 supplies the potential of the DC bus 5a from the output terminal 4 to the load. If the second switching unit becomes conductive, the power conversion main circuit 1 supplies the potential of the DC bus 5b from the output terminal 4 to the load. Since two potentials are output in this way, it functions as a two-level power conversion circuit.

  The switching element 1a has a transistor element 10a and a diode element 11a connected in parallel, and the switching element 1b has a transistor element 10b and a diode element 11b connected in parallel. Depending on the characteristics of the load, for example, in the case of a resistive load, the connection of the diode element 11a and the diode element 11b may be omitted.

  Although the transistor elements 10a and 10b are shown as MOSFETs in FIG. 1, they are not particularly limited. Any device that can switch between a low resistance state and a high resistance state by an electrical signal may be used. For example, a device such as an IGBT or a bipolar transistor may be used. As a material of the switching elements 1a and 1b, wide band gap semiconductors such as SiC, GaN, and diamond may be used in addition to Si that is widely used.

  The gate drive circuit 2a as the first gate drive unit is electrically connected so that a voltage can be applied between the gate (G) and the source (S) of the switching element 1a, and the drive input via the insulating circuit 2g. Based on the signal, a gate voltage is applied to the switching element 1a. Similarly, the gate drive circuit 2b as the second gate drive unit applies a gate voltage to the switching element 1b based on the drive signal input through the insulating circuit 2h.

  In the power conversion device according to Embodiment 1 of the present invention, as shown in FIG. 1, an impedance element 2e is provided between the gate drive circuit 2a and the gate drive circuit 2b. The impedance element 2e has one end 2e3 on the positive electrode side connected to the connection end 26a of the gate drive circuit 2a and the other end 2e1 on the negative electrode side connected to the connection end 26b of the gate drive circuit 2b.

  The detection unit 2f is connected to one end 2e1 of the impedance element 2e connected to the connection end 26b and to the connection point 2e2 in the intermediate part, and detects the voltage of the impedance element 2e.

  When the voltage between the gate drive circuit 2a and the gate drive circuit 2b changes with the change of the voltage of the output terminal 4, the voltage applied to both ends of the impedance element 2e changes. The detection unit 2f detects the voltage of the impedance element 2e, whereby the potential of the output terminal 4 can be detected. 1 shows an example in which the detection unit 2f detects the partial pressure of the impedance element 2e. However, if the input breakdown voltage of the detection unit 2f is high, the partial pressure is not necessary. The detection unit 2f may be connected to both ends of the impedance element 2e, and the detection unit 2f may be configured to detect a voltage applied to both ends of the impedance element 2e.

  In the configuration shown in FIG. 1, the detection unit 2 f includes an insulation circuit. The detection unit 2 f is connected to the control unit 3 through an insulating circuit, and an output voltage signal representing the potential of the output terminal 4 is input from the detection unit 2 f to the control unit 3. In FIG. 1, a line with an arrow is illustrated as a signal line, and a line without an arrow is illustrated as an electrical wiring.

  The control unit 3 includes a dead time correction circuit 3a as a correction circuit, a dead time addition circuit 3b as a first addition circuit, and a dead time addition circuit 3c as a second addition circuit. The dead time correction circuit 3a receives a PWM signal that is an output voltage command value of the power conversion main circuit 1, and performs dead time correction based on the output voltage signal detected from the detection unit 2f.

  The dead time addition circuit 3b adds a dead time to the drive signal of the switching element 1a and outputs a drive signal to the gate drive circuit 2a. The dead time addition circuit 3c adds a dead time to the drive signal of the switching element 1b inverted by the inversion logic unit 3d and outputs the drive signal to the gate drive circuit 2b.

  Next, with reference to FIG. 2, details of a method for detecting the voltage output from the output terminal 4 will be described. FIG. 2 is a circuit diagram of the power conversion device according to the first embodiment of the present invention. The switching element 1a, the switching element 1b, the gate drive circuit 2a, the gate drive circuit 2b, the impedance element 2e, and the circuits of peripheral components are shown. Show.

  The on command signal and the off command signal from the control unit 3 are transmitted to the gate drive circuit 2a and the gate drive circuit 2b through the insulation circuits 2g and 2h which are control signal insulation units. During the normal operation of the power conversion device, the control unit 3 may issue an off command signal to the gate drive circuit 2a and the gate drive circuit 2b and an on command signal to the other. May be issued. During the normal operation of the power conversion device, the control unit 3 does not issue an ON command signal to both the gate drive circuit 2a and the gate drive circuit 2b for several tens of microseconds or more.

  When the ON command signal from the control unit 3 is input to the insulating circuits 2g and 2h composed of photocouplers, the light emitting diodes 20g and 20h on the primary side of the photocouplers are turned on. Then, the phototransistors 21g and 21h on the secondary side of the photocoupler are turned on.

  The potentials of the respective parts of the gate drive circuit 2a and the gate drive circuit 2b change. As a result, the on transistors 20a1 and 20b1 of the gate drive circuit 2a and the gate drive circuit 2b are turned on, and the off transistors 20a2 and 20b2 are turned off. become.

  The charges stored in the on-capacitors 22a and 22b are supplied from the positive electrodes of the on-capacitors 22a and 22b, respectively, and control gate terminals of the on-transistors 20a1 and 20b1, gate signal lines 23a and 23b, and switching elements 1a and 1b, respectively. 12a and 12b, the control source terminals 13a and 13b, the source signal lines 24a and 24b, and the on capacitors 22a and 22b are respectively supplied to the switching element 1a and the switching element 1b through paths to the negative electrodes.

  A positive voltage is applied between the control gate terminal 12a and the control source terminal 13a of the switching element 1a and between the control gate terminal 12b and the control source terminal 13b of the switching element 1b, and the switching element 1a and the switching element 1b becomes conductive.

  On the other hand, when the off command signal from the control unit 3 is input to the insulation circuits 2g and 2h, the primary side 20g and 20h of the photocoupler are turned off. Then, the phototransistors 21g and 21h on the secondary side of the photocoupler are turned off.

  The potentials of the respective parts of the gate drive circuit 2a and the gate drive circuit 2b change, and eventually, the on transistors 20a1 and 20b1 of the gate drive circuit 2a and the gate drive circuit 2b are turned off, and the off transistors 20a2 and 20b2 are turned on. become.

  Charges stored in the control gates of the switching element 1a and the switching element 1b are gate signal lines 23a and 23b, gate resistors 25a1 and 25b1, off transistors 20a2 and 20b2, source signal lines 24a and 24b, and control source terminals, respectively. Through the respective paths 13a and 13b, the switching element 1a and the switching element 1b are pulled out.

  The same potential is applied between the control gate terminal 12a and the control source terminal 13a of the switching element 1a and between the control gate terminal 12b and the control source terminal 13b of the switching element 1b, and the switching element 1a and the switching element 1b are non- It becomes conductive.

  Thus, as is apparent from the configurations of the gate drive circuit 2a and the gate drive circuit 2b, the source potentials of the switching element 1a and the switching element 1b and the ON capacitors 22a and 22b of the gate drive circuit 2a and the gate drive circuit 2b The negative electrode potentials are the same.

  Here, the source potential of the switching element 1 a on the positive electrode side matches the output potential of the power conversion main circuit 1. Therefore, the potential of the negative electrode of the on capacitor 22a of the gate drive circuit 2a matches the output potential of the power conversion main circuit 1. The source potential of the switching element 1 b on the negative electrode side matches the negative electrode potential of the power conversion main circuit 1. Therefore, the negative electrode potential of the on-capacitor 22b of the gate drive circuit 2b matches the negative electrode potential of the power conversion main circuit 1.

  Further, the potential of the negative electrode of the on-capacitor in the gate drive circuit 2a matches the potential at the connection end 26a of the gate drive circuit 2a. The potential of the negative electrode of the on capacitor 22b of the gate drive circuit 2b matches the potential at the connection end 26b of the gate drive circuit 2b.

  The impedance element 2e is electrically connected between the gate drive circuit 2a and the gate drive circuit 2b. Therefore, the potential of 2e3, which is one end on the positive electrode side of the impedance element 2e, matches the output potential of the power conversion main circuit 1. The potential of 2e1, which is one end on the negative electrode side of the impedance element 2e, matches the negative electrode potential of the power conversion main circuit 1. By detecting the voltage applied to the impedance element 2e, the detection unit 2f can detect the voltage output from the output terminal 4 of the power conversion main circuit 1 using the negative electrode of the power conversion main circuit 1 as a reference voltage.

  Examples of the output voltage value of the power conversion main circuit based on the negative electrode potential are about 750 V, 1500 V, and 3000 V for electric railway applications, and 300 V and 600 V for FA equipment applications. In vehicle equipment use, it is various from 48V to 750V. In any case, the voltage applied to the impedance element 2e is sufficiently larger than the electromagnetic noise. Thus, unlike the system that monitors the characteristics of the gate voltage having a low signal level, according to the present invention, the detection unit 2f can detect the output voltage of the power conversion main circuit without malfunction. Moreover, the dead time can be compensated for without malfunctioning by controlling the first gate driving unit and the second gate driving unit by the control unit based on the signal from the detection unit 2f.

  As described above, in the power conversion device according to the first embodiment of the present invention, not the power conversion main circuit or the vicinity of the power conversion main circuit in which components are complicatedly arranged for reducing the parasitic inductance and cooling the generated power loss. Since the impedance element 2e and the detection unit 2f for detecting the output potential of the power conversion main circuit are provided around the gate drive circuit, the mounting operation can be performed without requiring a high level of technology. Thus, the output voltage of the power conversion main circuit can be detected while being easily manufactured. Furthermore, although it is easy to manufacture, the dead time can be compensated by controlling the first gate driving unit and the second gate driving unit by the control unit based on the signal from the detection unit 2f.

  In the first embodiment, the connection point of the impedance element 2e shown in FIG. 2 is the positive electrode side where one end 2e1 on the negative electrode side of the impedance element 2e is connected to the connection terminal 26b of the gate drive circuit 2b. The other end 2e3 is connected to the connection end 26a of the gate drive circuit 2a. The potential of the connection end 26b matches the negative potential of the on-capacitor 22b of the gate drive circuit 2b, and the potential of the connection end 26a matches the negative potential of the on-capacitor 22a of the gate drive circuit 2a. It is not limited.

  You may make it the electric potential of the connection end 26a correspond with the electric potential of the positive electrode of the capacitor 22a for ON of the gate drive circuit 2a. The positive electrode of the on-capacitor 22a is at a higher potential than the negative electrode of the on-capacitor 22a by the charging voltage of the on-capacitor 22a. This is advantageous because the charging voltage of the on-capacitor 22a is stable. The charging voltage of the on capacitor 22a is typically between 10V and 20V. As described above, the potential of the negative electrode of the on-capacitor 22a matches the output potential of the power conversion main circuit 1, but the potential of the connection end 26a is equal to the charging voltage of the on-capacitor 22a. It will deviate from the output potential. Although the voltage applied to the impedance element 2e is shifted by the charging voltage of the on-capacitor 22a, the effect of the present invention can be obtained if the detection unit 2f detects the voltage of the impedance element 2e in consideration of the shift.

  Similarly, the potential of the connection end 26a may match the potential of the gate signal line 23a of the gate drive circuit 2a. You may make it the electric potential of the connection end 26a correspond with the electric potential of the terminal of the transistor 20a1 of the gate drive circuit 2a, or the transistor 20a2. In this way, the potential of the connection end 26a may match the arbitrary potential of the gate drive circuit 2a. In either case, the potential at the connection end 26a deviates from the potential at the output of the power conversion main circuit 1. Although the voltage applied to the impedance element 2e is shifted, the effect of the present invention can be obtained if the detection unit 2f detects the voltage of the impedance element 2e in consideration of the voltage shift.

  If the output voltage of the power conversion main circuit with respect to the negative electrode potential is large, for example, 300 V or more, the voltage applied to the impedance element 2e is shifted by the charging voltage of the on-capacitor 22a, but the shift is small. It may be acceptable. In this case, the detection unit 2f only needs to detect the voltage of the impedance element 2e without considering the deviation.

  Alternatively, when simply detecting the potential state (ON / OFF state) of the switching element of the power conversion main circuit, a threshold value may be set for a potential difference of several hundred volts to several thousand volts, which is about several tens of volts. The potential state (ON / OFF state) of the switching element as the main circuit can be detected without considering the influence of the error voltage. If the potential state (ON / OFF state) of the switching element of the power conversion main circuit can be detected, dead time compensation can be performed.

  As shown in FIG. 2, there is no wiring having the same potential as the drain terminal (collector terminal in the case of IGBT) of the positive-side switching element 1a in the gate driving circuit 2a. Depending on the case, a wiring having the same potential as the drain terminal may exist. If the connection end 26a is provided in a wiring having the same potential as the drain terminal, the difference between the potential of the connection end 26a and the output potential of the power conversion main circuit 1 becomes large. Since it becomes difficult for the detection unit 2f to detect the voltage of the impedance element 2e in consideration of the potential shift, it is desirable to avoid it.

  The same applies to the connection end 26b. The potential of the connection end 26b may be the same as the potential of the positive electrode of the ON capacitor 22b of the gate drive circuit 2b. The potential of the connection end 26a may be made to coincide with an arbitrary potential of the gate drive circuit 2b. In either case, the potential of the connection end 26b deviates from the potential of the negative electrode of the power conversion main circuit 1. Although the voltage applied to the impedance element 2e is shifted, the effect of the present invention can be obtained if the detection unit 2f detects the voltage of the impedance element 2e in consideration of the voltage shift.

  In particular, when a transistor element is made of a wide bandgap semiconductor material having a wider bandgap than Si such as SiC, GaN, and diamond, and a switching element capable of high withstand voltage and high temperature operation is used for miniaturization, The present invention is effective. The power conversion main circuit and components around the power conversion main circuit are complicated, but in the present invention, the impedance element 2e and the detection unit 2f for detecting the output potential of the power conversion main circuit are provided around the gate drive circuit. As a result, installation work can be performed without requiring advanced technology. In this way, the output voltage of the power conversion main circuit can be detected while being easy to manufacture. Furthermore, although it is easy to manufacture, the dead time can be compensated by controlling the first gate driving unit and the second gate driving unit by the control unit based on the signal from the detection unit 2f.

  In the first embodiment, as shown in FIG. 2, the impedance element 2e includes two or more resistors 20e1, 20e2,. When the potential of the control unit 3 is closer to the potential of the gate drive circuit 2b than the gate drive circuit 2a, one end of the two or more resistors 20e1, 20e2,... 20en connected to the connection end 26b of the gate drive circuit 2b It is desirable to connect the detection unit 2f to both ends 2e1 and 2e2 of the connected resistor 20e1.

  When the potential of the control unit 3 is closer to the potential of the gate drive circuit 2a than the gate drive circuit 2b, one end of the resistors 20e1, 20e2,. It is desirable that the detection unit 2f be connected to both ends of the resistor 20en connected to 26a.

  In this way, by changing the resistor 20e1 (or the resistor 20en) to which the detection unit 2f is connected according to the relationship among the potentials of the control unit 3, the gate drive circuit 2a, and the gate drive circuit 2b, Can be used, and also functions as an insulating circuit.

  In such a configuration of the impedance element 2e and the detection unit 2f, when the potential of the output terminal 4 is in a high potential state, a high voltage is applied to both ends of the impedance element 2e, and the detection unit 2f made of a photocoupler is connected. The divided voltage is applied to the resistor 20e1 (or the resistor 20en). It is desirable to adjust the series number of resistors 20e1, 20e2,... 20en constituting the impedance element 2e according to the insulation voltage of the detection unit 2f made of a photocoupler.

  In the detection unit (insulation circuit) 2f made of a photocoupler, the primary side is constituted by a light emitting diode 20f, and is connected to the resistor 20e1 (or resistor 20en) at the end of the impedance element 2e.

  When a voltage is applied to the primary side of the photocoupler as the detection unit 2f, the light emitting diode 20f that is the primary side of the photocoupler is turned on, and the phototransistor 21f that is the secondary side of the photocoupler is turned on.

  As the phototransistor 21f, which is the secondary side of the photocoupler, becomes conductive, the control unit 3 confirms that the potential of the output terminal 4 is in a high potential state with reference to the potential of the negative electrode of the power conversion main circuit. Detect.

  On the other hand, when the potential of the output terminal 4 becomes low with reference to the negative potential of the power conversion main circuit and the potential becomes zero, no voltage is applied to both ends of the impedance element 2e. No voltage is applied to the connected resistor.

  Since no voltage is applied to the primary side of the photocoupler as the detection unit 2f, the light emitting diode 20f that is the secondary side of the photocoupler is turned off, and the phototransistor 21f that is the secondary side of the photocoupler is turned off. .

  When the phototransistor 21f, which is the secondary side of the photocoupler, becomes non-conductive, the control unit 3 detects that the potential of the output terminal 4 is zero with reference to the potential of the negative electrode of the power conversion main circuit. To do.

  As described above, in the first embodiment of the present invention, not only the output voltage can be detected but also detected by dividing the voltage by the resistors (20e1, 20e2,... 20en) in which two or more impedance elements 2e are connected in series. By using a photocoupler as the unit, the control unit can be protected as an insulating circuit. In the first embodiment of the present invention, the detection unit 2f detects the partial pressure of the impedance element 2e. However, if the input breakdown voltage of the detection unit 2f is high, the partial pressure is unnecessary. The detection unit 2f may be connected to both ends of the impedance element 2e, and the detection unit 2f may be configured to detect a voltage applied to both ends of the impedance element 2e. In this case, two or more impedance elements 2e may be configured in series, but may be configured with one resistor.

  Furthermore, when a sensor is provided between the output terminal and the low voltage side of the DC bus as in the prior art, a sensor power supply is required separately from the power supply of the gate drive circuit. The power source can be obtained from the power source of the gate drive circuit, and a smaller and simpler power converter can be obtained.

  In the above description, the detection unit 2f detects the voltage of the impedance element 2e. However, the detection unit may detect a current flowing through the impedance element. This will be described with reference to FIG.

  In the configuration of FIG. 3, the primary side of the photocoupler that is the detection unit 2f is between the other end of the impedance element 2e that connects one end to the connection end 26a of the gate drive circuit 2a and the connection end 26b of the gate drive circuit 2b. Are inserted in series. In FIG. 3, the impedance element 2e is composed of one resistor, but may be composed of two or more resistors connected in series. Other configurations are the same as those in FIG. 2, and a detailed description thereof will be omitted.

  When the potential of the output terminal 4 is in a high potential state with respect to the potential of the negative electrode of the power conversion main circuit, a high voltage is applied to both ends of the impedance element 2e, and thus current flows. Since the current flows through the primary side of the photocoupler, the light emitting diode 20f on the primary side is turned on, the phototransistor 21f on the secondary side of the photocoupler is turned on, and the control unit 3 controls the potential of the output terminal 4 Is detected to be in a high potential state.

  On the other hand, when the potential of the output terminal 4 becomes low and becomes zero with reference to the potential of the negative electrode of the power conversion main circuit, no voltage is applied to both ends of the impedance element 2e, so that no current flows. Since no current flows through the primary side of the photocoupler, the light emitting diode 20f on the primary side is turned off, the phototransistor 21f on the secondary side of the photocoupler is turned off, and the control unit 3 controls the potential of the output terminal 4 Is detected to be zero.

  Thus, even if the detection unit is configured to detect the current flowing through the impedance element, the same effect as the configuration in which the detection unit 2f detects the voltage of the impedance element 2e can be obtained.

  Although the photocoupler is used in the detection unit 2f, a configuration may be adopted in which a current flowing through the impedance element is detected using a Hall element in addition to the photocoupler. Moreover, it is good also as a structure which detects the electric current which flows into an impedance element using shunt resistance. In either case, the same effect as when using a photocoupler can be obtained.

  FIG. 4 is a layout diagram of the power conversion device according to the first embodiment of the present invention. The module 100 includes the switching element 1a, the module 101 includes the switching element 1b, the gate driving circuit 2a, the gate driving circuit 2b, and the impedance element 2e. , And the arrangement of peripheral components.

  As shown in FIG. 4, each of the switching element 1a and the switching element 1b is a so-called 1 in 1 module housed in one housing. The module incorporates one switching semiconductor chip or two or more switching semiconductor chips. The module 100 including the switching element 1 a and the module 101 including the switching element 1 b are attached to the bus bar 110 and constitute the power conversion main circuit 1. In FIG. 4, the switching element is constituted by one module, but the present invention is not limited to this. The switching element may be configured by electrically connecting two or more modules in parallel.

The gate drive circuit 2a and the gate drive circuit 2b are disposed on a single gate drive circuit substrate 2a, 2B, respectively. The modules 100 and 101 are connected to the gate drive circuit 2a and the gate drive circuit 2b by gate signal lines 23a and 23b and source signal lines 24a and 24b, respectively.

  That is, in the module 100 including the switching element 1a, the gate-source voltage of the gate drive circuit 2a is connected and transmitted through the gate signal line 23a and the source signal line 24a, respectively. Similarly, in the module 101 composed of the switching element 1b, the gate-source voltage of the gate drive circuit 2b is connected and transmitted through the gate signal line 23b and the source signal line 24b, respectively.

  2. Description of the Related Art Conventionally, it is known that electromagnetic noise is large around a switching element in accordance with the switching operation of the switching element. Due to the electromagnetic noise, the transmission signal of the gate signal line and the source signal line may be deformed and the switching element may malfunction.

  For this, a gate signal line and a source signal line are arranged adjacent to each other, and a loop formed by the gate signal line and the source signal line is reduced. The influence of electromagnetic noise is suppressed, and the gate-source voltage of the gate drive circuit is transmitted between the gate and source of the switching element without deformation.

  Also in the configuration of FIG. 4, the gate signal line 23a and the source signal line 24a, and the gate signal line 23b and the source signal line 24b are arranged adjacent to each other. 4 is that the source signal line 24a and the source signal line 24b are also arranged adjacent to each other. That is, the distance between the source signal line 24a and the source signal line 24b is equal to or less than one of the distance between the gate signal line 23a and the source signal line 24a and the distance between the gate signal line 23b and the source signal line 24b. . Thus, the loop formed by the source signal line 24a and the source signal line 24b is made small.

  With this configuration, the influence of electromagnetic noise is suppressed, and the potential of the output terminal is transmitted to the impedance element without being deformed. The control unit can accurately detect the potential of the output terminal.

  In the configuration of FIG. 4, the impedance element 2e is wired and connected in the space between the gate drive circuit 2a and the gate drive circuit 2b. The impedance element 2e may be disposed in consideration of the spatial insulation distance between the gate drive circuit 2a and the gate drive circuit 2b.

  Generally, in order to ensure insulation, the space insulation distance may be shorter than the creeping insulation distance. According to the configuration of FIG. 4, the wiring length of the impedance element can be kept short.

  FIG. 5 is a diagram showing another example of arrangement of the power conversion device according to embodiment 1 of the present invention. In the configuration of FIG. 5, the switching element 1 a and the switching element 1 b are configured by a single gate drive circuit substrate 2. The impedance element 2e is installed on the gate drive circuit board 2 and connected by a circuit pattern.

  With this configuration, the mounting operation of the impedance element can be completed at the stage of manufacturing the gate drive circuit board. Since it is not necessary to provide a separate process for attaching the impedance element, the cost can be reduced. In addition, this configuration can also compensate for dead time.

Embodiment 2. FIG.
In the first embodiment, the detection unit 2f is also used as an insulating circuit using a photocoupler. However, in the second embodiment, a case will be described in which the insulating circuit and the detection unit are separated and a comparator is used as the detection unit.

  FIG. 6 is a block diagram showing a power conversion device according to Embodiment 2 of the present invention, and shows the configuration of the power conversion main circuit 1, the gate drive circuit board 2, the control unit 3, and peripheral components. In FIG. 6, a line with an arrow is illustrated as a signal line, and a line without an arrow is illustrated as an electrical wiring.

  As shown in FIG. 6, an impedance element 2e is provided between the gate drive circuit 2a and the gate drive circuit 2b. The impedance element 2e has one end 2e3 on the positive electrode side connected to the connection end 26a of the gate drive circuit 2a and the other end 2e1 on the negative electrode side connected to the connection end 26b of the gate drive circuit 2b. A comparator is connected to the impedance element 2e as a detection unit 2f that detects a voltage. The output voltage signal detected by the detection unit 2f composed of a comparator is output to the dead time correction circuit 3a of the control unit 3 through the insulation circuit 2i, and the inverted output voltage signal inverted by the inversion logic unit 2k is also an isolation circuit. 2j is output to the dead time correction circuit 3a.

  FIG. 7 is a circuit diagram of a power conversion device according to Embodiment 2 of the present invention, and shows a circuit of switching element 1a, switching element 1b, gate drive circuit 2a, gate drive circuit 2b, impedance element 2e, and peripheral components. Show.

  As shown in FIG. 7, the gate drive circuit 2a and the gate drive circuit 2b have ON capacitors 22a and 22b and OFF capacitors 27a and 27b, respectively. The negative electrodes of the ON capacitors 22a and 22b and the OFF capacitors 27a and 27b, respectively. The positive electrode 27b is connected in series. The connection points of the on capacitors 22a and 22b and the off capacitors 27a and 27b are connected to the control source terminals 13a and 13b of the switching element 1a and the switching element 1b through source signal lines 24a and 24b, respectively. .

  Other configurations are the same as those in FIGS. 1 and 2, and the description thereof is omitted. Eventually, the potential of the connection end 26a of the gate drive circuit 2a matches the potential of the negative electrode of the on-capacitor 22a, and further matches the output potential of the power conversion main circuit 1. The potential of the connection end 26b of the gate drive circuit 2b matches the potential of the negative electrode of the on capacitor 22b, and further matches the potential of the negative electrode of the power conversion main circuit 1.

  Next, details of a method for detecting the voltage output from the output terminal 4 of the power conversion main circuit will be described with reference to FIG. As shown in FIG. 7, the ON command signal from the control unit 3 is transmitted to the gate drive circuit 2a and the gate drive circuit 2b through the insulation circuits 2g and 2h which are control signal insulation units. The insulating circuits 2g and 2h are configured by photocoupler parts.

  When the ON command signal from the control unit 3 is input to the insulation circuits 2g and 2h, the light emitting diodes 20g and 20h on the primary side of the photocoupler are turned on. Then, the phototransistors 21g and 21h on the secondary side of the photocoupler are turned on.

  The potentials of the respective parts of the gate drive circuit 2a and the gate drive circuit 2b change. As a result, the on transistors 20a1 and 20b1 of the gate drive circuit 2a and the gate drive circuit 2b are turned on, and the off transistors 20a2 and 20b2 are turned off. become.

  The charges stored in the on-capacitors 22a and 22b are supplied from the positive electrodes of the on-capacitors 22a and 22b, respectively, and control gate terminals of the on-transistors 20a1 and 20b1, gate signal lines 23a and 23b, and switching elements 1a and 1b, respectively. 12a and 12b, the control source terminals 13a and 13b, the source signal lines 24a and 24b, and the on capacitors 22a and 22b are respectively supplied to the switching element 1a and the switching element 1b through paths to the negative electrodes.

  A positive voltage is applied to the control gate terminals 12a and 12b and the control source terminals 13a and 13b of the switching element 1a and the switching element 1b, and the switching element 1a and the switching element 1b become conductive.

  On the other hand, when the OFF command signal from the control unit 3 is input to the insulation circuits 2g and 2h, the light emitting diodes 20g and 20h on the primary side of the photocoupler are turned off. Then, the phototransistors 21g and 21h on the secondary side of the photocoupler are turned off.

  The potentials of the respective parts of the gate drive circuit 2a and the gate drive circuit 2b change, and eventually, the on transistors 20a1 and 20b1 of the gate drive circuit 2a and the gate drive circuit 2b are turned off, and the off transistors 20a2 and 20b2 are turned on. become.

  The charges stored in the off capacitors 27a and 27b are transferred from the positive electrodes of the off capacitors 27a and 27b to the source signal lines 24a and 24b, the control source terminals 13a and 13b of the switching elements 1a and 1b, and the switching elements 1a and 1b. The control gate terminals 12a and 12b, the gate signal lines 23a and 23b, the off transistors 20a2 and 20b2, and the off capacitors 27a and 27b are respectively supplied to the switching element 1a and the switching element 1b through paths to the negative electrodes. .

  Negative voltages are applied to the control gate terminals 12a and 12b and the control source terminals 13a and 13b of the switching element 1a and the switching element 1b, respectively, so that the switching element 1a and the switching element 1b are turned off.

  Thus, as is apparent from the configurations of the gate drive circuit 2a and the gate drive circuit 2b, the source potentials of the switching element 1a and the switching element 1b and the ON capacitors 22a and 22b of the gate drive circuit 2a and the gate drive circuit 2b The negative electrode potentials are the same.

  Here, the source potential of the switching element 1 a on the positive electrode side matches the output potential of the power conversion main circuit 1. Therefore, the potential of the negative electrode of the on capacitor 22a of the gate drive circuit 2a matches the output potential of the power conversion main circuit 1. The source potential of the switching element 1 b on the negative electrode side matches the negative electrode potential of the power conversion main circuit 1. Therefore, the negative electrode potential of the on-capacitor 22 b of the gate drive circuit 2 b matches the negative electrode potential of the power conversion main circuit 1.

  Further, the potential of the negative electrode of the on-capacitor in the gate drive circuit 2a matches the potential at the connection end 26a of the gate drive circuit 2a. The potential of the negative electrode of the on capacitor 22b of the gate drive circuit 2b matches the potential at the connection end 26b of the gate drive circuit 2b.

  An impedance element 2e is provided between the gate drive circuit 2a and the gate drive circuit 2b. The impedance element 2e has one end 2e3 on the positive electrode side connected to the connection end 26a of the gate drive circuit 2a and the other end 2e1 on the negative electrode side connected to the connection end 26b of the gate drive circuit 2b. The detection unit 2f can detect the voltage output from the output terminal 4 of the power conversion main circuit 1 by detecting the voltage at the impedance element 2e.

  In the second embodiment, as shown in FIG. 7, the detection unit 2f is configured by a comparator. The impedance element 2e includes two or more resistors (20e1, 20e2,... 20en) connected in series. It is desirable to adjust the series number of resistors 20e1, 20e2,... 20en constituting the impedance element 2e according to the input voltage specification of the detector 2f. 7 shows an example in which the detection unit 2f detects the partial pressure of the impedance element 2e. However, if the input breakdown voltage of the detection unit 2f is high, the partial pressure is not necessary. The detection unit 2f may be connected to both ends of the impedance element 2e, and the detection unit 2f may be configured to detect a voltage applied to both ends of the impedance element 2e. In this case, two or more impedance elements 2e may be configured in series, but may be configured with one resistor.

  When the potential of the control unit 3 is closer to the potential of the gate drive circuit 2b than the gate drive circuit 2a, one end of the impedance element 2e connected in series to the connection end 26b of the gate drive circuit 2b, that is, one end of the resistor 20e1 is connected. Then, the other end of the resistor 20e1 is connected to one input end 2f1 of the comparator which is the detection unit 2f.

  In this embodiment, the power source of the comparator which is the detection unit 2f is obtained from the power source of the gate drive circuit 2b. By using the on capacitor 22b and the off capacitor 27b, a bipolar power supply can be obtained. When a sensor is provided between the output terminal and the low-voltage side of the DC bus as in the prior art, a power supply for the sensor is required separately from the power supply for the gate drive circuit. A power converter that can be obtained from the power source of the gate drive circuit and that is smaller and simpler can be obtained.

  A reference voltage obtained by resistance-dividing the driver power supply is input to the other input terminal 2f2 of the comparator which is the detection unit 2f. When the potential of the output terminal 4 is in a high potential state, a high voltage is applied to both ends of the impedance element 2e, and a divided voltage is also applied to the resistor 20e1 to which the comparator is connected. Since the reference voltage at the other end of the comparator is exceeded, the output of the comparator is in a high state. On the other hand, when the potential of the output terminal 4 becomes low and the potential difference becomes zero, no voltage is applied to both ends of the impedance element 2e, and thus no voltage is applied to the resistor to which the comparator is connected. Since the reference voltage at the other end of the comparator is not exceeded, the output of the comparator is in a low state.

  In general, an input terminal of a comparator has high input impedance and high sensitivity. If a comparator is used as the detection unit 2f as in the present embodiment, the detection unit 2f can detect the voltage of the impedance element 2e with high sensitivity even if the resistance value of the resistor constituting the impedance element 2e is increased. The conduction current of the impedance element 2e can be reduced, and the heat generation of the impedance element 2e can be suppressed.

  Further, according to the present embodiment, the input voltage range of the input terminal of the comparator can be kept inside the bipolar power supply voltage value of the comparator during the operation of the power conversion device. When the input voltage at the input terminal of the comparator matches the bipolar power supply voltage value of the comparator, the internal circuit of the comparator may be saturated and the comparator operation may be delayed. If the input voltage at the input terminal of the comparator is outside the bipolar power supply voltage of the comparator, the insulation of the internal circuit of the comparator may deteriorate and the comparator may be destroyed. In the present embodiment, the comparator operation is not delayed and the comparator is not destroyed.

  Although the second embodiment has been described on the assumption that two or more impedance elements 2e are connected in series or one resistor, the present invention is not particularly limited. The same effect can be obtained even when two or more impedance elements 2e are connected in series or one capacitor. Furthermore, the same effect can be obtained even when two or more impedance elements 2e are connected in series or one diode.

  In the second embodiment, the detection unit 2f has been described as detecting the voltage of the impedance element 2e, but is not particularly limited. The same effect can be obtained when the detection unit 2f is configured to detect the current flowing through the impedance element.

  Note that the voltage value of the reference voltage input to the other input terminal 2f2 of the comparator, which is the detection unit 2f, needs to be appropriately adjusted according to the potential of the DC bus. Usually, the potential of the DC bus that supplies power to the power converter is stable, and the voltage value of the reference voltage may be adjusted once. In the present embodiment, the reference voltage is obtained by adjusting the driver power supply by resistance-dividing. However, in a power converter for special applications, the normal potential of the DC bus may fluctuate greatly. In this case, it is desirable that the voltage value of the reference voltage for generating the threshold value of the detection unit 2f is variable depending on the potential of the DC bus.

  As a modification of the above, as shown in FIG. 8, the DC bus 5a and the connection terminal on the negative side of the off capacitor 27b in the gate drive circuit 2b are electrically connected by resistors 23b7 and 23b8, and the divided potential thereof There is a power conversion device that uses This divided potential is used as the voltage value of the reference voltage. Thereby, even if the normal potential of the DC bus 5a fluctuates, the threshold voltage fluctuates accordingly, so that erroneous detection and malfunction of the detector 2f can be prevented. Furthermore, with this configuration, even if the bus voltage fluctuates abnormally due to lightning or the like and instantaneously decreases or instantaneously increases, erroneous detection and malfunction of the detection unit 2f can be prevented.

  In the present embodiment, as shown in FIG. 8, the gate drive circuit 2a does not have a wiring having the same potential as the drain terminal (collector terminal in the case of IGBT) of the positive-side switching element 1a. It may exist depending on the circuit configuration. A modification of FIG. 8 will be described. In this case, the potential of the wiring having the same potential as the drain terminal (collector terminal in the case of IGBT) of the switching element 1a on the positive electrode side on the gate driving circuit 2a is the same as that of the DC bus 5a. Therefore, the wiring of the same potential on the gate driving circuit 2a and the connecting terminal on the negative side of the off capacitor 27b in the gate driving circuit 2b are electrically connected by the resistors 23b7 and 23b8, as in FIG. The effect of can be obtained. As a further effect, it is not necessary to wire an electrical connection line from the DC bus 5a, and the configuration of the apparatus becomes easy.

Next, the dead time correction method will be described.
In general, the dead time considers the switching element and the delay time of its gate drive circuit, etc., and the dead time at the output terminal of the power conversion main circuit outputs a switching signal so as to satisfy the following equation (1). It is preset by the dead time addition circuit of the control unit.

Tdead ⁺ = Tdead + Td-on-Td-off> 0 (1)

here,
Tdead: Dead time generated by the control unit Tdead ⁺ : Dead time at the output terminal 4 of the power conversion main circuit 1 Td-on: ON delay time Td-off: OFF delay time (Td-on, Td-off) Includes signal rise time Tr and fall time Tf)

  The switching signal output from the control unit is driven by a gate via a photocoupler, which is an insulation circuit, to prevent noise from the high-voltage part to the low-voltage part and to ensure safety against dielectric breakdown. Supplied to the circuit.

  In the photocoupler, a light emitting diode emits light by an input current, and this light is converted into an output current by a phototransistor. However, because of the influence of the lifetime of the base carrier of the phototransistor and the Miller integration effect that negative feedback from the collector to the base changes from the on delay time required for the phototransistor to change from off to on, it changes from on to off. The off-delay time required for is significantly longer.

  This is as described on the Renesas Electronics Corporation website as "Response speed of general-purpose photocouplers" (URL: http://japan.renesas.com/products/opto/technology/speed/index.jsp) It is.

Therefore, since the delay time for the phototransistor is Td-on-Td-off <0, in order to secure a positive value as Tdead ⁺ in Equation (1), it is necessary to provide a large value as the dead time Tdead. was there.

Furthermore, the delay element as described above is not a constant delay element due to various factors such as load current and temperature conditions, and Tdead ⁺ which is a dead time to be actually corrected is not a constant value due to the above-described fluctuation factors. It has been known.

In the method of detecting the potential of the output terminal and using it for dead time correction as in the prior art, the output terminal of the power conversion main circuit is detected directly by detecting the potential of the output terminal even if there is a delay element as described above. Since the dead time Tdead ⁺ can be accurately known, the dead time can be corrected accurately.

  However, although not shown in the prior art, when the prior art is actually implemented, an insulation circuit such as a photocoupler is required between the sensor signal and the counter. The reason is the same as described above.

  As a special example, if the potential on the low-voltage side of the DC bus connected to the low-voltage side of the power conversion main circuit and the controller ground (ground potential) are the same potential and there is no problem such as noise, Although there may be no problem even if the insulation circuit between the signal and the counter is omitted, in most cases, the signal is generally transmitted and received through the insulation circuit.

  Therefore, in the prior art, due to the delay element of the insulation circuit such as a photocoupler, the dead time detected by the counter has an error corresponding to the ON delay time-OFF delay time of the insulation circuit.

  In the power conversion device according to Embodiment 2 of the present invention, the output voltage signal detected by the detection unit 2f is output to the control unit 3 via the insulation circuit 2i, and is inverted by the inverting logic unit 2k. The signal is also output to the control unit 3 through the insulation circuit 2j.

FIG. 9 shows a time chart of the insulating circuits 2i and 2j. The detection pulse time Tout ⁺ of the normal insulation circuit 2i is obtained by the equation (2), and the detection pulse time Tout ⁺⁺ of the insulation circuit 2j through the inversion logic unit 2k is obtained by the equation (3). Therefore, the potential detection pulse time Tout of the output terminal 4 can be accurately obtained by the equation (4).

Tout ⁺ = Tout-Ton + Toff (2)
Tout ⁺⁺ = Tout−Toff + Ton (3)
^{Tout = (Tout + + Tout ++} ) / 2 ··· (4)

here,
Tout: potential detection pulse time Tout ^{+ of the} output terminal 4: detection pulse time Tout ⁺⁺ of the normal insulation circuit 2i ⁺⁺ : detection pulse time Ton of the insulation circuit 2j through the inversion logic unit 2k: on delay time Toff of insulation circuit: insulation Circuit off-delay time

  Therefore, by performing the dead time correction using the potential detection pulse time of the output terminal 4 obtained by the equation (4), the accuracy of the dead time correction can be improved as compared with the conventional technique. Here, it is desirable to arrange the insulating circuits 2i and 2j, which are two photocouplers, close to each other. Since the electrical conditions and the temperature conditions are matched, the effect that the delay time of the photocoupler is matched can be obtained.

  Note that the inversion logic unit may be omitted as long as the delay of the insulating circuits 2i and 2j is sufficiently negligible. In general, the higher the performance of the insulation circuit, the shorter the signal transmission delay time, but the higher the cost. By using the inversion logic unit, the potential detection pulse time Tout of the output terminal can be detected with high accuracy even with an inexpensive insulating circuit, leading to cost reduction.

FIG. 10 shows a block diagram of the dead time correction circuit 3a. In the dead time correction circuit 3a, the potential detection pulse time Tout of the output terminal 4 is counted based on the equation (4), and the output terminal 4 of the power conversion main circuit 1 is an error voltage from the difference from the correction signal count value Tvref ^+. The dead time Tdead ⁺ is calculated from Tvref ⁺ -Tout. This Tdead ⁺ is set as the next correction amount Tcomp.

  If the correction amount Tcomp is a positive value, the PWM signal is corrected so that | Tcomp | is an off delay, and if the correction amount Tcomp is a negative value, the on delay is | Tcomp |. Although not shown, the counter is configured to clear the count at the rising edge of the input signal, and the correction amount Tcomp is latched at the carrier peak.

  FIG. 11 shows a time chart showing the operation of dead time correction when the load current is positive. FIG. 12 is a time chart showing the dead time correction operation when the load current is negative.

  As shown in FIGS. 11 and 12, if the correction amount Tcomp is a positive value, | Tcomp | off-delay (FIG. 11), and if the correction amount Tcomp is a negative value, | Tcomp | on-delay (FIG. 12). ), The delay of the output terminal voltage can be made the same regardless of whether the output current is positive or negative, and the PWM signal pulse time Tverf and the output are the correction amount Tcomp one pulse before. The terminal voltage pulse time Tout can be controlled to be substantially the same.

10 and 12, portions B and C of the dead time Tdead ⁺ are portions that change depending on the current of the main circuit.

  As described above, in the power conversion device according to Embodiment 2 of the present invention, the output voltage signal detected by the detection unit 2f is output to the control unit 3 via the insulation circuit 2i, and is also output by the inverting logic unit 2k. Since the inverted inverted output voltage signal is also output to the control unit 3 via the isolation circuit 2j, errors caused by delay elements of the isolation circuit such as a photocoupler can be corrected, and dead time correction Accuracy can be improved.

  Furthermore, as described above, by using a wide band gap semiconductor for the switching element and the diode element, it is possible to realize a small size and a low cost.

  As described in the first embodiment, any element may be used as the switching element and the diode element of the power conversion main circuit 1. For example, a wide band gap semiconductor can be used. Examples of wide band gap semiconductors include those formed of silicon carbide, gallium nitride-based materials, diamond, or the like.

  Switching elements and diode elements formed by such wide band gap semiconductors have high voltage resistance and high allowable current density, so that switching elements and diode elements can be miniaturized. By using elements and diode elements, it is possible to reduce the size of a semiconductor module incorporating these elements.

  In addition, since the wide band gap semiconductor has high heat resistance, it is possible to reduce the size of the heat dissipating fins of the heat sink and the air cooling of the water cooling portion, thereby further reducing the size of the semiconductor module. Furthermore, since the power loss is low, it is possible to increase the efficiency of the switching element and the diode element, and further increase the efficiency of the semiconductor module.

Embodiment 3
In the first embodiment and the second embodiment, the case of a two-level power conversion circuit is shown, but in the third embodiment, a case where a three-level power conversion circuit is used will be described.

  FIG. 13 is a configuration diagram of a power conversion device according to Embodiment 3 of the present invention, and illustrates configurations of a power conversion main circuit 1, a gate drive circuit board 2, a control unit 3, and peripheral components. The power conversion main circuit 1 is configured as a three-level power conversion circuit. A DC bus 5a for supplying a high potential is connected to the positive electrode of the power conversion main circuit 1. A DC bus 5b for supplying a zero potential is connected to the negative electrode of the power conversion main circuit 1. Further, a DC bus for supplying an intermediate potential is connected to the intermediate potential terminal 5g of the power conversion main circuit 1. The power conversion main circuit 1 outputs a three-level potential (high potential, intermediate potential, zero potential) from the output terminal 4 by switching on and off of the built-in switching element.

  The power conversion main circuit 1 in the first embodiment includes four switching elements 1c, 1d, 1e, and 1f and two neutral point clamp diodes 1g and 1h. The four switching elements 1c, 1d, 1e, and 1f are configured by connecting transistor elements 10c, 10d, 10e, and 10f and diodes 11c, 11d, 11e, and 11f in antiparallel.

  In the power conversion main circuit 1, the switching element 1c and the switching element 1d are connected in series as the first switching part on the positive electrode side, and the switching element 1e and the switching element 1f are connected in series as the second switching part on the negative electrode side. Connected. The first switching unit and the second switching unit are connected in series by a switching element 1d on the lower potential side on the positive electrode side and a switching element 1e on the upper potential side on the negative electrode side.

  The cathode of the neutral point clamp diode 1g on the upper potential side is connected to the connection point 5d between the switching element 1c located on the higher potential side on the positive electrode side and the switching element 1d located on the lower potential side.

  The anode of the neutral point clamp diode 1g is connected to the cathode of the neutral point clamp diode 1h on the lower potential side, and the connection point between the two neutral point clamp diodes 1g and 1h connected in series is an intermediate potential terminal. Electrically connected to 5g.

  On the other hand, the anode of the neutral potential clamp diode 1h on the lower potential side is connected to a connection point 5e between the switching element 1e located on the higher potential side on the negative electrode side and the switching element 1f located on the lower potential side.

  As described above, the cathode of the neutral point clamp diode 1h is electrically connected to the intermediate potential terminal 5g. A connection point 5f between the switching element 1d and the switching element 1e is drawn out as the output terminal 4 and connected to a load (not shown).

  The gate drive circuit substrate 2 is provided with four gate drive circuits 21, 2m, 2n, and 2o. The gate drive circuit 21 and the gate drive circuit 2m are connected to the switching element 1c and the switching element 1d, respectively, as a first gate drive unit.

  Similarly, the gate drive circuit 2n and the gate drive circuit 2o are connected to the switching element 1e and the switching element 1f, respectively, as a second gate drive unit. The gate drive circuits 21, 2m, 2n, and 2o drive the switching elements 1c, 1d, 1e, and 1f, respectively.

  In the power conversion device according to Embodiment 3 of the present invention, as shown in FIG. 13, one end 2p3 of impedance element 2P is a connection end of gate drive circuit 2m for driving switching element 1d located on the lower potential side on the positive electrode side. 26m. The other end 2p1 of the impedance element 2P is connected to a connection end 26o of the gate drive circuit 2o that drives the switching element 1f located on the lower potential side on the negative electrode side.

  In the embodiment of the present invention, two detection units composed of comparators are used. One end of the detection unit 2q formed of a comparator is connected to the connection point 2p2 at the intermediate portion of the impedance element 2p. The other end of the detection unit 2q composed of a comparator is connected to one end 2p1 of the impedance element 2p via a DC voltage source 2qq. One end of the detection unit 2r formed of a comparator is connected to a connection point 2p2 at the intermediate portion of the impedance element 2p. The other end of the detection unit 2q formed of a comparator is connected to one end 2p1 of the impedance element 2p via the DC voltage source 2rr.

  Although the potential of the output terminal 4 of the power conversion main circuit 1 is one of a high potential, an intermediate potential, and a zero potential, the voltage of the impedance element 2e varies depending on the potential of the output terminal 4. The detection unit 2q detects whether the potential of the output terminal 4 is zero potential or higher than the intermediate potential (intermediate potential or high potential), and sends the detection result as a lower output voltage signal. The detection unit 2r detects whether the potential of the output terminal 4 is at a high potential or lower than the intermediate potential (intermediate potential or zero potential), and sends the detection result as an upper output voltage signal. In this way, by detecting the voltage of the impedance element 2e by the detection units 2q and 2r, it is detected whether the potential of the output terminal 4 of the power conversion main circuit 1 is high potential, intermediate potential, or zero potential. be able to.

  The voltage values of the DC voltage sources 2qq and 2rr are adjusted appropriately according to the potential of the DC bus. The DC voltage sources 2qq and 2rr can be easily configured by using the power source of the gate drive circuit 2o. A DC voltage source having a desired voltage value can be obtained by dividing the power supply voltage of the gate drive circuit 2o by resistance. Alternatively, a DC voltage source having a desired voltage value may be obtained from the power supply voltage of the gate drive circuit 2o by using a regulator IC.

  Each of the gate drive circuits 2l, 2m, 2n, and 2o is electrically connected so that a voltage can be applied between the gate and source of the switching elements 1c, 1d, 1e, and 1f (when the transistor element is an IGBT, between the gate and the emitter). A gate voltage is applied to each of the switching elements 1c, 1d, 1e, and 1f based on the drive signals that are connected and input through the insulating circuits 2x, 2y, 2ad, and 2ae.

  The output voltage signals detected by the detection units 2q and 2r are output to the control unit 3 through the isolation circuits 2aa and 2ac, and the inverted output voltage signals inverted by the inversion logic units 2t and 2u are also converted into the isolation circuit 2z, It is configured to output to the control unit 3 via 2ab. Note that FIG. 13 also illustrates lines with arrows as signal lines and lines without arrows as electrical wiring, as in FIGS. 1 and 6.

  The controller 3 includes a dead time correction circuit 3e that is a first correction circuit, a dead time addition circuit 3f that is a first addition circuit, a dead time addition circuit 3g that is a second addition circuit, and a second correction circuit. A dead time correction circuit 3i, a dead time addition circuit 3j as a third addition circuit, and a dead time addition circuit 3k as a fourth addition circuit are configured.

  The dead time correction circuit 3e receives an upper PWM signal which is an output voltage command value on the positive side of the power conversion main circuit 1, and converts the upper output voltage signal input from the gate drive circuit board 2 and its inverted output voltage signal. Based on the dead time correction.

  The dead time addition circuit 3f adds a dead time to the drive signal of the switching element 1c from the dead time correction circuit 3e and outputs a drive signal to the gate drive circuit 21. The dead time addition circuit 3g adds a dead time to the drive signal of the fifth switching element 1e obtained by inverting the signal from the dead time correction circuit 3e by the inversion logic unit 3h, and outputs the drive signal to the gate drive circuit 2n. To do.

  The dead time correction circuit 3i receives the lower PWM signal which is the output voltage command value on the negative side of the power conversion main circuit 1, and converts the lower output voltage signal input from the gate drive circuit board 2 and its inverted output voltage signal. Based on the dead time correction.

  The dead time addition circuit 3j adds a dead time to the drive signal of the switching element 1d from the dead time correction circuit 3i and outputs a drive signal to the gate drive circuit 2m. The dead time addition circuit 3k adds a dead time to the drive signal of the switching element 1f obtained by inverting the signal from the dead time correction circuit 3i by the inversion logic unit 3l, and outputs the drive signal to the gate drive circuit 2o.

  As described above, in the power conversion device according to the third embodiment, the potential state output from the output terminal 4 is one of three levels (high potential, intermediate potential, zero potential), so that the output potential can be detected. Embodiments except that two detection units 2q and 2r are provided and the control unit 3 is provided with dead time correction circuits 3e and 3i and dead time addition circuits 3f, 3g, 3j and 3k so as to correspond to the two detection units 2q and 2r. Since it is the same structure as 2, detailed description is abbreviate | omitted here.

  According to this configuration, even when a three-level voltage is output, the principle of the method for detecting the voltage output from the output terminal 4 is basically the same as that in the first embodiment. In addition to the same effects as those of the first and second embodiments, three-level power conversion is achieved by using a dead time correction circuit similar to the two-level power conversion circuit for the upper and lower PWM signals. The dead time can also be corrected in the circuit.

  In the third embodiment, components such as gate drive circuits 2l, 2m, 2n, 2o, insulation circuits 2x, 2y, 2ad, and 2ae are formed on a gate drive circuit substrate 2 that is the same substrate. Components such as the impedance element 2p, the detection units 2r and 2q, the insulation circuits 2z, 2aa, 2ab, and 2ac, which are components unique to the present invention, are also configured on the gate drive circuit board 2. By configuring in this way, components unique to the present invention can be mounted together with the gate drive circuit components at the time of manufacturing the gate drive circuit board. The power converter device which can obtain the effect of the present invention can be manufactured without increasing the manufacturing process.

  In the present embodiment, it has been described that the voltage values of the DC voltage sources 2qq and 2rr are appropriately adjusted according to the potential of the DC bus. Normally, the potential of the DC bus that supplies power to the power converter is stable, and the voltage values of the DC voltage sources 2qq and 2rr need only be adjusted once. However, in a power converter for special applications, the normal potential of the DC bus may fluctuate greatly. In this case, it is desirable that the voltage values of the DC voltage sources 2qq and 2rr that respectively generate the threshold values of the detection units 2q and 2r be variable depending on the potential of the DC bus.

  As a modification of the above, as shown in FIG. 14, there is a power converter that electrically connects the DC bus 5a and the connection end 26o of the gate drive circuit 2o with an impedance element 2af and uses the divided potential. There are two divided potentials, which are used as DC voltage sources 2qq and 2rr, respectively. As a result, even if the normal potential of the DC bus 5a varies, the threshold voltage varies accordingly, so that erroneous detection and malfunction of the detection units 2q and 2r can be prevented. Furthermore, with this configuration, even if the bus voltage is abnormally fluctuated due to a lightning strike or the like and instantaneously decreases, erroneous detection and malfunction of the detection units 2q and 2r can be prevented.

  FIG. 15 shows another modification. This power conversion device uses two identical gate drive circuit boards 2 described in the second embodiment, and the upper potential side gate drive circuit board 2C is wired so as to drive the switching elements 1c and 1e. The lower potential side gate drive circuit board 2D is wired to drive the switching element 1d and the switching element 1f.

  With the configuration as shown in FIG. 15, a gate drive circuit board for a two-level power conversion circuit can be used, so that design costs and component procurement costs can be reduced.

  As described above, the power conversion device according to the third embodiment of the present invention basically corresponds to the three-level power conversion main circuit based on the configuration of the two-level power conversion device according to the first and second embodiments. As described above, two detection units 2q and 2r are provided so that each potential difference output from the output terminal 4 can be detected, and the control unit 3 includes a dead time correction circuit 3e, 3i and a dead time addition circuit 3f, 3g, 3j, 3k. Even when a three-level voltage is output, the same effects as those of the two-level case of the first and second embodiments can be obtained. That is, it is possible to obtain a power conversion device that detects the output voltage of the power conversion main circuit and compensates for dead time, and that is easy to manufacture and does not malfunction. Further, it is possible to obtain an output voltage detection method for a power conversion main circuit that is easy to manufacture and does not malfunction.

  In addition, it is possible to correct an error caused by a delay element of an insulating element such as a photocoupler as compared with the prior art for a three-level power conversion main circuit, and to improve the accuracy of dead time correction. .

  Furthermore, as described above, the DC voltage sources 2rr and 2qq that generate the threshold values of the detection units 2r and 2q, respectively, are configured such that the threshold value is variable depending on the potential of the DC bus 5a, so that the potential of the DC bus varies. In addition, erroneous detection and malfunction of the detection units 2r and 2q can be prevented.

Embodiment 4 FIG.
In the first embodiment, the case where the modules 100 and 101 including the switching elements 1a and 1b and the gate driving circuits 2a and 2b are separately arranged and connected by wiring is shown. In the fourth embodiment, the case where they are arranged integrally will be described.

  16 and 17 are diagrams showing examples of arrangement of the power conversion device according to Embodiment 4 of the present invention. The arrangement of the gate drive circuit 2a, the gate drive circuit 2b, the impedance element 2e, the module 102 composed of the switching element 1a and the switching element 1b, and peripheral components is shown.

  The module 102 is a so-called 2-in-1 module in which the switching element 1a and the switching element 1b are housed in one housing. The gate drive circuit 2 a and the gate drive circuit 2 b are configured by a single gate drive circuit substrate 2.

  FIG. 16 shows a state where the gate drive circuit board 2 on which the gate drive circuit 2a and the gate drive circuit 2b are mounted is separated before being mounted on the module 102 containing the switching elements 1a and 1b.

  The module 102 containing the switching element 1a and the switching element 1b is provided with control gate terminals 12a and 12b and control source terminals 13a and 13b in the form of metal pins.

  On the other hand, the gate drive circuit 2a and the gate drive circuit 2b of the gate drive circuit board 2 have control gate terminal mounting portions 28a corresponding to the control gate terminals 12a and 12b and the control source terminals 13a and 13b, respectively. 28b and control source terminal mounting portions 29a and 29b are provided in the form of sockets.

  The gate drive circuit board 2 is mounted immediately above the module 102 in the direction of arrow A. As shown in FIG. 17, the control gate terminals 12a and 12b and the control source terminals 13a and 13b of the module 102 are controlled. The gate drive circuit 2a and the gate drive circuit 2b are electrically connected through the gate gate terminal mounting portions 28a and 28b and the control source terminal mounting portions 29a and 29b, respectively.

  As described above, the gate drive circuit board 2 is arranged close to the module 102 without using the external source signal line and gate signal line, so that the influence of electromagnetic noise is suppressed, and the power conversion main circuit The potential of the output terminal 4 is transmitted to the impedance element 2e without being deformed. The control unit can detect the potential of the output terminal 4 with high accuracy.

  Further, the connection end 26a between the impedance element 2e and the gate drive circuit 2a is disposed in the vicinity of the control source terminal 13a of the gate drive circuit 2a. That is, the distance between the connection end 26a and the control source terminal 13a is equal to or less than the distance between the control gate terminal 12a and the control source terminal 13a. Further, the connection end 26b between the impedance element 2e and the gate drive circuit 2b is disposed in the vicinity of the control source terminal 13b of the gate drive circuit 2b. That is, the distance between the connection end 26b and the control source terminal 13b is equal to or less than the distance between the control gate terminal 12b and the control source terminal 13b. With this configuration, the influence of electromagnetic noise is further suppressed, and the potential of the output terminal 4 of the power conversion main circuit is transmitted to the impedance element 2e without being deformed. The control unit can detect the potential of the output terminal 4 with higher accuracy.

  As described above, in the power conversion device according to the fourth embodiment of the present invention, not only the gate drive circuit board 2 is disposed close to the module 102 but also the connection end 26a between the impedance element 2e and the gate drive circuit 2a is provided. By placing the impedance element 2e in the vicinity of the control source terminal 13a of the switching element 1a, and the connection end 26b of the gate drive circuit 2b in the vicinity of the control source terminal 13b of the switching element 1b, the influence of electromagnetic noise And the potential of the output terminal 4 of the power conversion main circuit is transmitted to the impedance element 2e without being deformed. The control unit can detect the potential of the output terminal 4 with high accuracy.

  In the fourth embodiment, the connection between the power conversion main circuit 1 and the gate drive circuit board 2 of the first embodiment has been described. However, the present invention is not limited to this. Similar effects can be obtained when the power conversion main circuit 1 and the gate drive circuit board 2 are connected in the second and third embodiments.

  In the fourth embodiment, the impedance element 2e is connected to the gate drive circuit board with the aerial wiring. However, the impedance element 2e is connected to the gate drive circuit board 2 with a circuit pattern. The same effect can be obtained also in.

  As described above, in the first to fourth embodiments, the case where the power conversion main circuit 1 has one configuration has been described. However, the present invention is not limited to this. Three of these power conversion main circuits 1 may be configured in parallel to form a three-phase inverter. Moreover, you may comprise as a DCDC converter. Furthermore, you may comprise as a PWM converter which carries out AC / DC conversion. In any case, the same effect as in the first to fourth embodiments of the present invention can be obtained.

  In the first to fourth embodiments, attention is paid to two switching elements belonging to the same power conversion main circuit, and the gate drive circuits that drive the respective switching elements are connected by impedance elements. . The present invention is not limited to this configuration, and attention may be paid to switching elements belonging to different power conversion main circuits, and the gate drive circuits that drive the respective switching elements may be connected by impedance elements.

  For example, consider a three-phase two-level inverter that drives a three-phase motor. A gate driving circuit for driving the switching element on the U-phase positive side and a gate driving circuit for driving the switching element on the V-phase positive side are connected by the impedance element 2eUV. If the voltage or current of the impedance element 2eUV is detected by the detector 2fUV, the phase voltage between the U-phase output and the V-phase output of the three-phase two-level inverter can be detected. Similarly, a gate drive circuit that drives the switching element on the V-phase positive side and a gate drive circuit that drives the switching element on the W-phase positive side are connected by the impedance element 2eVW. If the voltage or current of the impedance element 2eVW is detected by the detector 2fVW, the phase voltage between the V-phase output and the W-phase output of the three-phase two-level inverter can be detected. A gate drive circuit that drives the switching element on the W-phase positive electrode side and a gate drive circuit that drives the switching element on the U-phase positive electrode side are connected by the impedance element 2eWU. If the voltage or current of the impedance element 2eWU is detected by the detector 2fWU, the phase voltage between the W-phase output and the U-phase output of the three-phase two-level inverter can be detected.

  The controller of the three-phase two-level inverter can know the phase voltage actually output by the three-phase two-level inverter by receiving the outputs of the detectors 2fUV, 2fVW, and 2fWU. On the other hand, the control unit estimates the interphase voltage output by the three-phase two-level inverter from the sent on command signal and off command signal. The control unit can obtain the dead time correction amount by measuring the shift time of the interphase voltage. If the control unit is configured to send the on command signal and the off command signal in consideration of the dead time correction amount, a power conversion device that performs dead time compensation can be obtained.

  DESCRIPTION OF SYMBOLS 1 Power conversion main circuit, 1a, 1b, 1c, 1d, 1e, 1f Switching element 2, 2a, 2B, 2C, 2D Gate drive circuit board, 2a, 2b, 2l, 2m, 2n, 2o Gate drive circuit, 2e 2p, 2af impedance element, 2f, 2q, 2r detector, 2g, 2h, 2i, 2j, 2x, 2y, 2z, 2aa, 2ab, 2ac, 2ad, 2ae insulation circuit, 3 controller, 3a, 3e, 3i Dead time correction circuit, 2k, 2t, 2u Inversion logic unit, 3b, 3c, 3f, 3g, 3j, 3k Dead time addition circuit, 3d, 3h, 3l Inversion logic unit, 23a, 23b Gate signal line, 24a, 24b Source Signal line, 100, 101, 102 modules

Claims (21)

A power conversion main circuit having two or more switching units;
A plurality of gate driving units for driving each of the switching units;
An impedance element connected between the gate driving units;
A detection unit for detecting the voltage or current of the impedance element ,
One end of the impedance element is connected to one of the plurality of gate driving units, and the other end of the impedance element is different from the gate driving unit connected to the one end. A power conversion device connected to one . The switching unit includes a first switching unit as a positive electrode side and a second switching unit as a negative electrode side connected in series to the first switching unit , and the gate driving unit includes the first switching unit. A first gate driving unit that drives the switching unit; and a second gate driving unit that drives the second switching unit, wherein the impedance element includes the first gate driving unit and the second gate. The power conversion device according to claim 1, wherein the power conversion device is connected to a drive unit. The switching unit has a second switching portion of the first switching portion and another phase as one phase among the three phases, the gate driver includes a first driving the first switching unit 1 gate driver and a second gate driver for driving the second switching unit, and the impedance element is between the first gate driver and the second gate driver. The power converter according to claim 1, wherein the power converter is connected.   The power converter according to claim 2, further comprising a control unit that controls the gate driving unit in accordance with a signal from the detection unit.   Each of the first switching unit and the second switching unit includes one switching element, and each of the first gate driving unit and the second gate driving unit includes one gate driving circuit. The power conversion device according to claim 4, wherein the power conversion device is provided corresponding to the switching element and outputs a two-level voltage.   The control unit corrects an output voltage signal based on a signal from the detection unit, and adds a dead time to the drive signal of the switching element on the positive side of the output voltage signal to add the dead time to the positive side. A first additional circuit that outputs to the gate drive circuit that drives the switching element; and a dead time is added to the inverted drive signal of the switching element on the negative electrode side of the output voltage signal to cause the switching element on the negative electrode side to The power conversion device according to claim 5, further comprising: a second additional circuit that outputs to the gate drive circuit to be driven.   Each of the first switching unit and the second switching unit is configured by connecting two switching elements in series, and each of the first gate driving unit and the second gate driving unit includes two gate drives. The power converter according to claim 4, wherein a circuit is provided corresponding to each of the switching elements and outputs a three-level voltage.   The impedance element drives the gate driving circuit that drives the switching element on the lower potential side of the two switching elements on the positive electrode side, and drives the switching element on the lower potential side of the two switching elements on the negative electrode side The power converter according to claim 7, wherein the power converter is connected to the gate driving circuit.   The control unit is configured to output an output voltage signal to each gate driving circuit that drives the switching element on the higher potential side of the switching element on the positive electrode side and the switching element on the negative electrode side based on a signal from the detection unit. And detecting the output voltage signal to each of the gate drive circuits for driving the switching elements on the lower potential side of the switching element on the positive electrode side and the switching element on the negative electrode side. A second correction circuit that performs correction based on a signal from the unit, and a dead time is added to the drive signal of the switching element on the higher potential side on the positive side of the output voltage signal from the first correction circuit. A first additional circuit for outputting to the gate drive circuit for driving the switching element on the positive potential side upper potential side, and the first correction circuit A dead time is added to the inverted drive signal of the switching element on the higher potential side on the negative electrode side of the output voltage signal, and the output signal is output to the gate drive circuit that drives the switching element on the higher potential side on the negative electrode side. And adding the dead time to the drive signal of the switching element on the lower potential side on the positive side of the output voltage signal from the second correction circuit, and the switching on the lower potential side on the positive side A third additional circuit that outputs to the gate drive circuit that drives the element; and a dead time in an inverted drive signal of the switching element on the lower potential side on the negative side of the output voltage signal from the second correction circuit And a fourth additional circuit for outputting to the gate drive circuit for driving the switching element on the lower potential side on the negative electrode side. Power converter according to claim 8 that.   10. The power conversion device according to claim 6, wherein the control unit is connected to each of the gate drive circuits and the detection unit via an insulating circuit.   The power conversion device according to any one of claims 5 to 10, wherein the impedance element is one resistor or two or more resistors connected in series.   The power converter according to any one of claims 5 to 10, wherein the impedance element is one capacitor or two or more capacitors connected in series.   11. The power conversion device according to claim 5, wherein the impedance element is one diode or two or more diodes connected in series.   The power converter according to any one of claims 5 to 13, wherein each of the gate drive circuits and the impedance element are disposed on the same substrate.   A first signal line connecting the switching element on the positive electrode side and the corresponding gate drive circuit, and a second signal line connecting the switching element on the negative electrode side and the gate drive circuit corresponding to the switching element. The power converter according to any one of claims 5 to 14, wherein the first signal line and the second signal line are disposed adjacent to each other. A connection portion of the gate drive circuit that drives the impedance element and the positive-side switching element is provided in the vicinity of a connection portion of the first signal line and the gate drive circuit that drives the positive-side switching element. A connecting portion of the gate driving circuit for driving the impedance element and the negative-side switching element is provided in the vicinity of a connecting portion of the gate driving circuit for driving the second signal line and the negative-side switching element; The power converter according to claim 15 , wherein the power converter is provided.   17. The power conversion device according to claim 5, wherein each of the switching elements includes an IGBT, a MOSFET, or a bipolar transistor.   The power conversion device according to any one of claims 5 to 17, wherein the switching element on the positive electrode side and the switching element on the negative electrode side are formed of a 2-in-1 module.   The power converter according to any one of claims 1 to 18, wherein a wide band gap semiconductor is used for each of the switching units.   The power converter according to claim 19, wherein the wide band gap semiconductor is a semiconductor using silicon carbide, a gallium nitride-based material, or diamond. Using an impedance element connected between a first gate driving unit for driving the first switching unit and a second gate driving unit for driving the second switching unit, the voltage or current of the impedance element is A voltage detection method for a power converter, wherein the voltage at a connection point between the first switching element and the second switching element is detected by detection.

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