JP6151564B2 - Regulator device - Google Patents

Description

  The present invention relates to a regulator device, and more particularly to a synchronous rectification step-down switching regulator device having a plurality of outputs.

  Patent Document 1 discloses a step-up switching regulator that requires only one inductor even with multiple outputs and can reduce the mounting volume. Patent Document 2 discloses a switching regulator capable of generating two independently adjusted outputs of different polarities, that is, one positive output higher than the ground voltage and one negative output lower than the ground voltage from one inductor. It is disclosed.

JP 2002-354822 A Special table 2010-536320 gazette

  For example, in an electronic control device mounted on a vehicle, generally, an internal analog circuit (for example, an analog / digital converter, hereinafter referred to as “ADC”) and its peripheral circuit operate with a power supply voltage of 5 V, and a microcomputer (Hereinafter “MCU”) and its peripheral circuits are configured to operate with a power supply voltage of 3.3V. However, in recent years, the core (eg, CPU or memory) inside the MCU is operated at a lower power supply voltage (eg, 1.8 V) in order to operate at a higher speed as performance is required of the MCU. It has come to let you.

  Therefore, in order to supply the power voltage (5V, 3.3V) to the internal analog circuit and its peripheral circuit, MCU and its peripheral circuit, and to supply a lower power voltage to various cores in the MCU. Therefore, a regulator device capable of supplying two or more types of power supply voltages is required. In addition, since the stability of the power supply voltage (with the ripple during steady state and sudden load change as an index) directly affects the accuracy of an analog circuit such as an ADC, the stability of the power supply voltage of 5 V is particularly required to be very high. Yes. Specifically, for example, it is required to suppress the ripple voltage to 1/10 or less of the power supply voltage.

  As this type of regulator device, a regulator device configured to combine a single switching regulator unit and a plurality of series regulator units to supply a plurality of types of power supply voltages to the outside can be considered. FIG. 12 is a circuit diagram showing a schematic configuration example of the regulator device studied as a premise of the present invention. FIG. 12 shows a multi-output regulator device that can generate two types of power supply voltages by one switching regulator unit and two series regulator units.

  The multi-output regulator device shown in FIG. 12 includes a step-down switching regulator unit 14, a first series regulator unit 16, and a second series regulator unit 17. The step-down switching regulator unit 14 includes switching elements 1, 2, a power supply control unit 12, and an output smoothing circuit 13, and converts (steps down) the input power supply voltage V <b> 1 to an intermediate output voltage V <b> 2 for output. The first series regulator unit 16 includes a power element 3, a first resistance control unit (RCONT) 15, and a smoothing capacitor C19, and converts (steps down) the intermediate output voltage V2 to the first output voltage V3 to load (ADC) ) Output to 5. The second series regulator unit 17 includes a power element 4, a second resistance control unit (RCONT) 18, and a smoothing capacitor C20. The second series regulator unit 17 converts (steps down) the intermediate output voltage V2 into the second output voltage V4 and loads it (MCU). ) Output to 6.

  A schematic operation of the step-down switching regulator unit 14 will be described. The power supply controller 12 turns on and off the switching elements 1 and 2 alternately by the control signals V5 and V6, and the output smoothing circuit 13 outputs the intermediate output voltage V2. The intermediate output voltage V2 is fed back to the power supply control unit 12, and the power supply control unit 12 generates the control signals V5 and V6 so that the intermediate output voltage V2 has a required stable voltage value. The stable intermediate output voltage V2 is supplied to the first series regulator unit 16 and the second series regulator unit 17.

  The series regulator units 16 and 17 have the same internal operation except that the output voltage values are different. Therefore, the general operation of the first series regulator unit 16 will be described here. The first resistance control unit (RCONT) 15 adjusts the resistance of the power element 3 so as to absorb the difference between the intermediate output voltage V2 and the required first output voltage V3 by the control signal V7, and the output smoothing capacitor C19 A stable first output voltage V3 is output. The stable output voltage V3 is supplied to the ADC 5. Similarly, the stable second output voltage V4 from the second series regulator unit 17 is supplied to the MCU6.

  On the other hand, electronic control devices for vehicles tend to increase the current consumption of the circuit due to the increase in functionality year after year. In order to cope with this tendency, as shown in Patent Document 1 and Patent Document 2, it is considered to use a multi-output switching regulator device that can supply a large current with lower power loss than the regulator device of FIG. It is done.

  However, since the multi-output switching regulator devices shown in Patent Document 1 and Patent Document 2 use a PWM control system (a control system in which the switching frequency is fixed and the pulse width is adjusted), the voltage between the multiple outputs is reduced. Interference occurs. That is, when the pulse width of the control signal is adjusted in order to suppress the voltage fluctuation that occurs when the load current of one output changes suddenly, the output voltage of the other output is affected. Thereby, a ripple voltage is generated, and the stability of the voltage is lowered. Due to this problem, the accuracy of the analog circuit (for example, ADC) of the electronic control device mounted on the vehicle deteriorates. In order to solve this problem, a complicated compensation circuit needs to be added in the case of the conventional PWM control system. However, in an electronic control device mounted on a vehicle, demands for reducing the number of components are increasing year by year from the viewpoint of noise, cost, and the like, and a simple multi-output switching regulator device with few external parts is desired.

  The present invention has been made in view of the above, and one of its purposes is to provide a small regulator device having a plurality of outputs and capable of generating an output voltage with high stability requirements. It is in.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  An outline of representative ones of the embodiments disclosed in the present application will be briefly described as follows.

  The regulator device according to the present embodiment includes an input node to which an input power supply voltage is supplied, a first output node for generating a first output voltage, a second output node for generating a second output voltage, an inductor, , First and second capacitors, first to fourth switches, and a first power supply controller. One end of the first capacitor is connected to the first output node, and one end of the second capacitor is connected to the second output node. The first switch applies an input power supply voltage to one end of the inductor when controlled to be on, and the second switch applies a ground voltage to one end of the inductor when controlled to be on. The third switch outputs the current flowing through the inductor to the first output node when controlled to be turned on, and the fourth switch directs the current flowing through the inductor to the second output node when controlled to be turned on. Output. The first power supply control unit sets a first range of the control threshold in advance, controls on / off of the third switch so that the first output voltage changes in the first range, and turns off the third switch. The fourth switch is controlled to turn on in the period.

  According to the present embodiment, in a regulator device having a plurality of outputs, it is possible to realize generation of an output voltage with high stability requirement and miniaturization.

1 is a circuit diagram illustrating a schematic configuration example of a regulator device according to a first embodiment of the present invention. FIG. FIG. 2 is a waveform diagram illustrating a schematic operation example when generating a first output voltage in the regulator device of FIG. 1. It is a circuit diagram which shows the detailed structural example of the regulator apparatus of FIG. It is a circuit diagram which shows the structural example of the 1st power supply control part in FIG. It is a circuit diagram which shows the structural example of the 2nd power supply control part in FIG. It is a wave form diagram which shows the operation example of the regulator apparatus of FIG. FIG. 5 is a circuit block diagram showing a detailed configuration example of the regulator device of FIG. 1 in the regulator device according to the second embodiment of the present invention. It is explanatory drawing which shows the operation example of the EMI controller in FIG. In the regulator apparatus by Embodiment 3 of this invention, it is a circuit diagram which shows the detailed structural example. It is a circuit diagram which shows the structural example of the 1st power supply control part in FIG. It is a circuit diagram which shows the structural example of the 2nd power supply control part in FIG. In the regulator apparatus examined as a premise of this invention, it is a circuit diagram which shows the schematic structural example.

  In the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant, and one is the other. Some or all of the modifications, details, supplementary explanations, and the like are related. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numerical values and ranges.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
<Outline of regulator device>
FIG. 1 is a circuit diagram showing a schematic configuration example of the regulator device according to the first embodiment of the present invention. FIG. 1 shows a step-down switching regulator device having a plurality of outputs. The regulator device is, for example, on a wiring board constituting an electronic control unit (ECU) for a vehicle. Implemented. The regulator device shown in FIG. 1 includes an input node to which an input power supply voltage VIN is supplied, a first output node for generating a first output voltage VOUT1, a second output node for generating a second output voltage VOUT2, A switching unit 9, a first power generation unit 10 a, a second power generation unit 10 b, and a power control unit 22 are provided.

  The switching unit 9 includes a switching element 25, a synchronous rectification switching element 26, and an inductor 23. The switching element 25 is connected between the input node (input power supply voltage VIN) and one end of the inductor 23, and the switching element 26 for synchronous rectification is connected between one end of the inductor 23 and the ground voltage. The input power supply voltage VIN is a DC power supply voltage such as 12 V, and is supplied from a battery or the like.

  The first power supply generator 10a generates a first output voltage VOUT1 at a first output node, a switching element 27 connected between the first output node (VOUT1) and the other end of the inductor 23, and a first output. And a smoothing capacitor C24 connected between the node (VOUT1) and the ground voltage. Similarly, the second power supply generation unit 10b generates a second output voltage VOUT2 at the second output node, and is connected between the second output node (VOUT2) and the other end of the inductor 23, A smoothing capacitor C29 connected between the second output node (VOUT2) and the ground voltage is provided. The first output voltage VOUT1 is supplied to a load 5 such as an ADC, and the second output voltage VOUT2 is supplied to a load 6 such as an MCU.

  The loads 5 and 6 are mounted as individual IC packages or one IC package, for example, on a wiring board constituting an electronic control unit (ECU) for a vehicle. For example, in an electronic control unit (ECU) for a vehicle and the like, safety is required in a noisy environment, so stabilization of the output voltage is important. Among them, in particular, it is required to supply a highly accurate voltage to the load 5 of an analog circuit typified by an ADC or the like, and the stability requirement of the first output voltage VOUT1 is higher than that of the second output voltage VOUT2. . Although not particularly limited, the first output voltage VOUT1 is 5.0V or the like, and the second output voltage VOUT2 is 3.3V or the like.

  Next, the operation will be described. When the switching element 25 is controlled to be on and the synchronous rectification switching element 26 is controlled to be off, a current from the input power supply voltage VIN flows to the inductor 23 and energy is accumulated in the inductor 23. When the switching element 25 is controlled to be turned off and the switching element 26 for synchronous rectification is controlled to be turned on, a current flows through the inductor 23 via the switching element 26 for synchronous rectification, and the energy accumulated in the inductor 23 is discharged. Is done.

  At this time, the power supply control unit 22 generates control signals V23 and V24 to control on / off of the switching elements 25 and 26, respectively. The control signal V24 is generated with an opposite phase to the control signal V23. The control signals V23 and V24 set the average current value of the current flowing through the inductor 23 to the total current value of a predetermined load current Io1 flowing through the load (ADC) 5 and a predetermined load current Io2 flowing through the load (for example, MCU) 6. The signal has a pulse width that matches.

  When the switching element 27 is controlled to be on and the switching element 28 is controlled to be off, the smoothing capacitor C24 is charged and the smoothing capacitor C29 is discharged. When the switching element 28 is controlled to be on and the switching element 27 is controlled to be off, the smoothing capacitor C29 is charged and the smoothing capacitor C24 is discharged. At this time, the power supply controller 22 generates control signals V21 and V22 to control the switching elements 27 and 28, respectively. The control signal V21 of the switching element 27 is generated based on the voltage fed back from the first output voltage VOUT1 so that the first output voltage VOUT1 becomes a predetermined output voltage. The control signal V22 of the switching element 28 is generated with an opposite phase to the control signal V21.

  FIG. 2 is a waveform diagram illustrating a schematic operation example when the first output voltage is generated in the regulator device of FIG. 1. In order to realize the first output voltage VOUT <b> 1 having a high stability requirement, a first range of the control threshold is set in the power supply control unit 22 in advance. Here, the first range is set by two control threshold values VTH1 + VREF1 and VTH2 + VREF1. These two control threshold values are set based on the target value of the ripple voltage that allows the first output voltage VOUT1.

  The power supply control unit 22 receives the feedback voltage from the first output voltage VOUT1, and when it becomes larger than the upper limit control threshold VTH1 + VREF1 (at time t2 in FIG. 2), the power supply control unit 22 turns off the switching element 27 and turns off the switching element 28. Control signals V21 and V22 are generated to turn on. On the other hand, when the feedback voltage from the first output voltage VOUT1 becomes smaller than the lower limit control threshold value VTH2 + VREF1 (at time t1 in FIG. 2), the control signal V21, the switching element 27 is turned on and the switching element 28 is turned off. V22 is generated. That is, the power supply control unit 22 controls on / off of the switching element 28 with the opposite phase of the switching element 27.

  Thereafter, such an operation is repeated. As described above, the power supply control unit 22 controls the on / off of the switching element 27 so that the first output voltage VOUT1 is shifted in the first range based on the two control threshold values VTH1 + VREF1 and VTH2 + VREF1. As a result, the ripple voltage of the first output voltage VOUT1 is suppressed to the first range. On the other hand, the ripple voltage of the second output voltage VOUT2 is determined by the control method for generating the control signals V23 and V24 and the changes of the loads 5 and 6. An example of a control method for generating the control signals V23 and V24 will be described with reference to FIGS.

<Detailed configuration of regulator device>
FIG. 3 is a circuit diagram showing a detailed configuration example of the regulator device of FIG. The step-down switching regulator device shown in FIG. 3 is different from the configuration example of FIG. 1 in that a current sensor 43 and voltage sensors 44 and 45 are added, and the power supply control unit 22 has two power supply control units 41 and 42. Is different from the point that the switching elements 25 to 28 are each formed of a transistor. In this example, the switching element 25 is composed of a P-channel MOS transistor 46, the synchronous rectification switching element 26 is composed of an N-channel MOS transistor 47, and the switching elements 27 and 28 are P-channel MOS transistors 48 and 49, respectively. Consists of.

  The power control unit (second power control unit) 41 generates control signals V23 and V24, and the power control unit (first power control unit) 42 generates control signals V21 and V22. The current sensor 43 is a circuit that observes the current flowing through the inductor 23 directly or indirectly and converts it to a current voltage VI that can be input to the power supply control unit 41. The voltage sensor 44 is a circuit that observes the first output voltage VOUT1 and converts it to a feedback voltage VF1 that can be input to the power supply control unit 41 and the power supply control unit 42. The voltage sensor 45 is a circuit that observes the second output voltage VOUT2 and converts it to a feedback voltage VF2 that can be input to the power supply control unit 41. Specifically, the voltage sensors 44 and 45 are resistance voltage dividing circuits or the like, and output feedback voltages VF1 and VF2 proportional to the first and second output voltages VOUT1 and VOUT2, respectively.

  4 is a circuit diagram showing a configuration example of the first power supply control unit in FIG. 3, and FIG. 5 is a circuit diagram showing a configuration example of the second power supply control unit in FIG. As shown in FIG. 4, the power control unit (first power control unit) 42 includes a comparator 51 having a hysteresis function, a reference voltage VREF1, an inverter 52a, a transistor driver 53, and an input terminal 54. The comparator 51 having a hysteresis function is set with two control threshold values VTH1 + VREF1 and VTH2 + VREF1, and compares the feedback voltage VF1 from the voltage sensor 44 of FIG. 3 input to the input terminal 54 with the two control threshold values VTH1 + VREF1 and VTH2 + VREF1. The control signal V19 is generated.

  The inverter 52a inverts the control signal V19 from the comparator 51 to generate an inversion control signal V20. The transistor driver 53 adjusts the dead-off time between the input control signal V19 and the inverted control signal V20 so that the P-channel MOS transistors 48 and 49 of FIG. Is converted into control signals V21 and V22 that can be driven.

  As shown in FIG. 5, the power supply control unit (second power supply control unit) 41 includes a comparator 61 having a hysteresis function, a reference voltage VREF1 + VREF2, a voltage addition circuit 62, a transistor driver 63, and input terminals 64, 65, and 66. The The voltage adding circuit 62 receives all the feedback voltages VF1 and VF2 from the voltage sensors 44 and 45 of FIG. 3 input to the input terminals 64 and 65 and the current voltage VI from the current sensor 43 input to the input terminal 66. Addition and conversion into a total voltage VA that can be input to the comparator 61 having a hysteresis function.

  The comparator 61 is set with two control thresholds VTH3 + VREF1 + VREF2 and VTH4 + VREF1 + VREF2, and compares the total voltage VA from the voltage adding circuit 62 with the two control thresholds to generate a control signal V18. The transistor driver 63 adjusts the dead-off time of the input control signal V18 so that the P-channel MOS transistor 46 and the N-channel MOS transistor 47 of FIG. 47 is converted into control signals V23 and V24 that can drive the motor 47.

<Detailed operation of regulator device>
FIG. 6 is a waveform diagram showing an operation example of the regulator device of FIG. The operation of the regulator device of FIG. 3 has two types, a steady period (period in which the load is constant) and a sudden load change period. First, the operation in the steady period [1] will be described. In FIG. 6, for convenience, the feedback voltage VF1 from the voltage sensor 44 and the first output voltage VOUT1 are in a proportional relationship of 1: 1. However, this ratio is appropriately changed depending on the resistance voltage dividing ratio or the like so as to match the range of the operating voltage of each power supply control unit 41 and 42, for example, when the set voltage value of the first output voltage VOUT1 is large. Is possible.

  The control operation of the first and second power supply generation units 10a and 10b (P-channel MOS transistors 48 and 49) in the steady period [1] will be described. When the feedback voltage VF1 from the voltage sensor 44 becomes larger than the upper limit control threshold VTH1 + VREF1 (at time t4 in FIG. 6), the power supply controller (first power supply controller) 42 turns off the P-channel MOS transistor 48, Control signals V21 and V22 are generated to turn on the P-channel MOS transistor 49. When the feedback voltage VF1 from the voltage sensor 44 becomes smaller than the lower limit control threshold VTH2 + VREF1 (at time t3 (t5) in FIG. 6), the power supply control unit 42 turns on the P-channel MOS transistor 48 and Control signals V21 and V22 are generated so as to turn off the MOS transistor 49.

  During the period t3 to t4, the P-channel MOS transistor 48 is turned on, whereby the current IL flowing through the inductor 23 is charged in the capacitor C24, and the first output voltage VOUT1 rises. On the other hand, since the load 6 is driven by the discharge of the capacitor C29 by turning off the P-channel MOS transistor 49, the second output voltage VOUT2 drops. During the period t4 to t5, the load 5 is driven by the discharge of the capacitor C24 due to the P-channel MOS transistor 48 being turned off, so that the first output voltage VOUT1 drops. On the other hand, when the P-channel MOS transistor 49 is turned on, the current IL flowing through the inductor 23 is charged in the capacitor C29, and the second output voltage VOUT2 rises.

  The above operation is repeated, and the ripple of the feedback voltage VF1 (= VOUT1) from the voltage sensor 44 is suppressed between the two control threshold values VTH1 + VREF1 and VTH2 + VREF1 as shown in Expression (1).

VTH2 + VREF1 ≦ VF1 (= VOUT1) ≦ VTH1 + VREF1 (1)
Unlike the conventional PWM control method, the switching period (T _s1 ) of the P-channel MOS transistors 48 and 49 depends on the magnitudes of the predetermined load current Io1 flowing to the load 5 and the predetermined load current Io2 flowing to the load 6. Determined. As the average value of the inductor current IL (= total load current value Io1 + Io2) is larger than the predetermined load current Io1 that has flowed to the load 5, the charging speed of the capacitor C24 becomes faster, and the switching period (T _s1 ) becomes shorter. . That is, when the P-channel MOS transistor 48 is on, a part of the inductor current IL is supplied to the load 5 and the remaining current becomes the charging current of the capacitor C24, so that the inductor current IL is large without changing the load current Io1. Then, the charging speed of the capacitor C24 is increased.

During the steady period [1], the on-duty (T _o / T _s1 ) ratio of the control signal V21 flows to the predetermined load current Io1 flowing to the load 5 and to the load 6 as shown in the equation (2). It is determined by a proportional relationship with a predetermined load current Io2.

(T _o / T _s1 ) = Io1 / (Io1 + Io2) (2)
Further, since the control signal V22 of the second output voltage VOUT2 is in an opposite phase to the control signal V21, the ripple of the second output voltage VOUT2 has a switching period (T _s1 ) and a duty (T _o / T _s1 ) ratio, a predetermined load current Io2 flowing through the load 6, and a capacitance value of the capacitor C29.

  Next, the control operation of the switching unit 9 (P channel MOS transistor 46 and N channel MOS transistor 47) in the steady period [1] will be described. When the total voltage VA from the voltage addition circuit 62 becomes larger than the upper limit control threshold VTH3 + VREF1 + VREF2 (at time t7 in FIG. 6), the power supply controller (second power supply controller) 41 turns on the N-channel MOS transistor 47. The control signals V23 and V24 are generated so as to turn off the P-channel MOS transistor 46. When the total voltage VA becomes smaller than the lower limit control threshold VTH4 + VREF1 + VREF2 (at time t6 (t8) in FIG. 6), the power supply control unit 41 turns off the N-channel MOS transistor 47 and turns on the P-channel MOS transistor 46. Control signals V23 and V24 are generated as described above.

  During the period t6 to t7, since the input power supply voltage VIN is applied to one end of the inductor 23 by turning on the P-channel MOS transistor 46, the inductor current IL flowing through the inductor 23 increases. Here, when the P-channel MOS transistor 48 connected to the other end of the inductor 23 is ON (P-channel MOS transistor 49 is OFF), the rate of increase ΔIL / ΔT of the inductor current IL can be calculated by Expression (3). In Expression (3) (and each expression described later), “L” is the inductance of the inductor 23.

(ΔIL / ΔT) = (VIN−VOUT1) / L (3)
On the other hand, when the P-channel MOS transistor 49 connected to the other end of the inductor 23 is on (P-channel MOS transistor 48 is off), the increase rate ΔIL / ΔT of the inductor current IL can be calculated by the equation (4).

(ΔIL / ΔT) = (VIN−VOUT2) / L (4)
During the period t7 to t8, since the ground voltage is applied to one end of the inductor 23 by turning on the N-channel MOS transistor 47, the current IL flowing through the inductor 23 decreases. Here, when the P-channel MOS transistor 48 connected to the other end of the inductor 23 is on (P-channel MOS transistor 49 is off), the decrease rate ΔIL / ΔT of the inductor current IL can be calculated by Expression (5).

(ΔIL / ΔT) = − VOUT1 / L (5)
On the other hand, when the P-channel MOS transistor 49 connected to the other end of the inductor 23 is on (P-channel MOS transistor 48 is off), the decrease rate ΔIL / ΔT of the inductor current IL can be calculated by Expression (6).

(ΔIL / ΔT) = − VOUT2 / L (6)
By repeating the above operation, the total voltage VA (= VF1 + VF2 + VI) is suppressed within the third range based on the two control threshold values VTH3 + VREF1 + VREF2 and VTH4 + VREF1 + VREF2 as shown in Expression (7).

(VTH4 + VREF1 + VREF2) ≦ VA ≦ (VTH3 + VREF1 + VREF2) (7)
Since the sum of the ripples of both output voltages (VOUT1, VOUT2) is negligibly small compared to the ripple of the current voltage VI of the inductor current IL converted by the current sensor 43, the switching cycle (T _s2 ) is It is determined by the increase rate, decrease rate, and measurement sensitivity (= VI / IL) of the inductor current IL shown in (3) to (6). The smaller the inductance (L), the greater the input / output voltage difference (VIN-VOUT1, VIN-VOUT2), or the greater the measurement sensitivity of the inductor current IL (= VI / IL), the greater the conversion by the current sensor 43. Since the rate of change of the ripple of the current voltage VI becomes high, the switching period (T _s2 ) becomes short.

During the steady period [1], the on-duty (T _i / T _s2 ) ratio of the control signal V23 is equal to the on-duty (T _o / T _s1 ) ratio of the control signal V21, the input power supply voltage VIN, Using the second output voltages VOUT1 and VOUT2, it is determined by equation (8).

  Next, the control operation at the time of sudden load change will be described. Here, a rapid load increase will be described as an example. At time t9 in FIG. 6, the load suddenly increases. As a result, the inductor current IL temporarily becomes smaller than the actual load current (Io1 + Io2), so that a ripple (decrease) occurs in the output voltage. If the P-channel MOS transistors 48 and 49 are controlled by a PWM control method or the like, ripples may occur in both output voltages (VOUT1 and VOUT2). However, in the control method of the present embodiment, the ripple of the first output voltage VOUT1 is caused by the two control threshold values VTH1 + VREF1 and VTH2 + VREF1 by the power supply control unit (first power supply control unit) 42 as shown in Expression (1). Be suppressed in between. For this reason, even when one or both of the load currents Io1 and Io2 increase rapidly, the stability of the first output voltage VOUT1 is ensured.

  When the output voltage decreases, the total voltage VA of both the output voltages (VOUT1, VOUT2) and the current voltage VI of the inductor current IL converted by the current sensor 43 also decreases. When the total voltage VA becomes smaller than the lower limit control threshold VTH4 + VREF1 + VREF2 (time t9), the power supply control unit (second power supply control unit) 41 turns off the N-channel MOS transistor 47 and turns on the P-channel MOS transistor 46. The control signals V23 and V24 are generated as described above. Thereafter, when the total voltage VA becomes larger than the upper limit control threshold value VTH3 + VREF1 + VREF2 (time t11), the control signals V23 and V24 are generated so that the N channel MOS transistor 47 is turned on and the P channel MOS transistor 46 is turned off.

As shown in FIG. 6, the larger the load variation, the longer the period (time t9 to t10) required for the inductor current IL to coincide with the actual load current (Io1 + Io2). Here, in the period from time t9 to t11 including this period (time t9 to t10), the P-channel MOS transistor 46 is driven on by the control signal V23. For this reason, in the transition period of sudden load change, the ON period (T _i ) of the control signal V23 is longer than that in the steady state, and the switching period (T _s2 ) is also longer than that in the steady state.

Here, the control method of the power supply control unit (second power supply control unit) 41 that controls the switching unit 9 is not necessarily limited to the hysteresis control method as shown in FIG. A PWM control method with a fixed period may be used. However, when the switching cycle (T _s2 ) is fixed, although depending on the specific control method and the magnitude of the sudden load change, the period until the steady state is reached again after the sudden load change occurs (that is, it becomes longer). The response to sudden load changes may be reduced). From this viewpoint, it is beneficial to use a control method with a variable switching cycle such as a hysteresis control method.

  Moreover, the power supply control part 41 should just be the structure which controls the switching part 9 so that the inductor electric current IL according to load current (Io1 + Io2) can be produced | generated. Depending on the case, the current sensor 43 of FIG. 3 and FIG. It is possible that the input terminal 66 is not provided. However, there may be a slight time lag from when the load current fluctuates until the output voltage fluctuates. Therefore, it is desirable to provide the current sensor 43 and the input terminal 66 from the viewpoint of further improving the responsiveness to a sudden load change.

When the load suddenly changes, the control operation of the P-channel MOS transistors 48 and 49 is the same as in the steady state. That is, as described above, the P-channel MOS transistor 48 is controlled so as to suppress the ripple of the first output voltage VOUT1. However, since the inductor current IL increases toward the coincidence with the load current (Io1 + Io2) as shown in the period from time t9 to t11 in FIG. 6, the control signal V21 is reached until the steady period [2] is reached. The ON period (T ₀ ) of each becomes shorter for each cycle, and the switching cycle (T _s1 ) also becomes shorter for each cycle.

  Further, as shown in the period of time t9 to t11 in FIG. 6, while the ripple of the first output voltage VOUT1 is suppressed, the inductor current IL and the actual load current are temporarily included in the second output voltage VOUT2. A ripple (decrease) corresponding to the difference from (Io1 + Io2) may occur. However, regarding the ripple of the second output voltage VOUT2, which has a low stability requirement, there is a problem in practical use, for example, by ensuring the response in the power supply control unit 41 or optimizing the capacitance value of the smoothing capacitor C29. It is sufficiently possible to suppress to a level where there is no.

In the stationary period [2], an operation similar to that in the stationary period [1] is performed. However, since the load current (Io1 + Io2) is larger in the stationary period [2] than in the stationary period [1], the switching period (T _s1 ) is shorter than in the stationary period [1].

  As described above, the regulator device according to the present embodiment generates a desired inductor current IL with one inductor 23 of the switching unit 9, and time-divides the inductor current IL through the plurality of switching elements 27 and 28. A plurality of output voltages (VOUT1, VOUT2) are generated by distributing in the above. At this time, the switching element 27 corresponding to the output voltage (VOUT1) is turned on / off so that the ripple voltage of the output voltage (VOUT1) having higher stability is within a predetermined range. Controlling this is one of the main features. The output voltage (VOUT2) on the side where the stability requirement is low is controlled by supplying the inductor current IL via the switching element 28 during the OFF period of the switching element 27. Specifically, the regulator device generates an inductor current IL that becomes “Io1 + Io2” on the time average, supplies a load current that becomes Io1 on the time average toward the load 5, and the remaining load that becomes Io2 on the time average Current is supplied to the load 6.

  As a result, it is possible to generate an output voltage (VOUT1) with high stability requirements while generating a plurality of output voltages (VOUT1, VOUT2) with one inductor 23. Further, the regulator device can be reduced in size and cost. As a result, it is possible to realize a regulator device that is particularly useful in a vehicle electronic control unit (ECU) or the like.

  Here, as a comparative example, for example, it is conceivable to use a PWM control method as shown in Patent Document 1 or the like. In this method, for example, in FIG. 1, a cycle in which the switching unit 27 is PWM controlled with the switching elements 27 and 28 turned on and off, and the switching unit 9 is PWMed with the switching elements 27 and 28 turned off and on, respectively. The control cycle is alternately repeated. In other words, the inductor 23 is used in a time division manner.

  However, when such a PWM control method is used, for example, when a sudden load change occurs in the load 6 to which the second output voltage VOUT2 is supplied, a relatively large ripple may occur in the first output voltage VOUT1. . In order to reduce such interference from other outputs, a complicated compensation circuit is required. On the other hand, in the control method of the present embodiment, an output voltage (VOUT1) that requires high stability can be generated without using such a compensation circuit while using one inductor 23.

(Embodiment 2)
<< Detailed Configuration of Regulator Device (Modification) >>
FIG. 7 is a circuit block diagram showing a detailed configuration example of the regulator device of FIG. 1 in the regulator device according to the second embodiment of the present invention. In FIG. 7, the same components as those in FIG. 3 are denoted by the same reference numerals. The regulator device shown in FIG. 7 is different in that the power supply control units 41 and 42 in FIG. 3 are configured by an MCU that performs digital control, and the function of the current sensor 43 in FIG. 3 is incorporated in the MCU.

  In recent years, with the development of MCUs, digitization of control units of switching regulators has been progressing. Compared with a switching regulator using an analog control unit, in a switching regulator using a digital control unit, functions of some external components can be integrated into the MCU, so that the number of external components can be reduced. In addition, by digitizing the control unit of the switching regulator, control parameters can be freely adjusted by a program, and control flexibility is improved.

  The step-down switching regulator shown in FIG. 7 includes a digital control unit 81 in addition to the switching unit 9, the first and second power generation units 10a and 10b, and the voltage sensors 44 and 45 similar to those in FIG. The digital control unit 81 includes ADCs 82 and 83, an I / O terminal 84, a register control circuit (RCU) 85, registers (REG) 96 to 102, multipliers 86 to 88, an adder 89, a current predictor 90, and a prediction controller. 91, 94, a current hysteresis controller 92, an EMI controller 93, and a voltage hysteresis controller 95.

  The ADC 82 and the ADC 83 are circuits for converting the feedback voltage VF1 from the voltage sensor 44 and the feedback voltage VF2 from the voltage sensor 45 into a digital signal VDF1 and a digital signal VDF2, respectively. The I / O terminal 84 is a terminal for connecting to an external control unit. The voltage hysteresis controller 95 is a controller having the same role as the power supply control unit (first power supply control unit) 42 in FIG. 4, for example. The current hysteresis controller 92 is a controller having the same role as, for example, the power supply control unit (second power supply control unit) 41 of FIG.

  The register control circuit (RCU) 85 is a circuit for controlling the registers (REG) 96 to 102 that store parameters used for control by an external control signal input from the I / O terminal 84. The REG 96 stores the gain parameter P1 of the digital signal VDF1. The REG 97 stores the gain parameter P2 of the digital signal VDF2. The REG 98 stores the gain parameter P3 of the digital signal VDF1. REG99 and REG100 store upper and lower control thresholds VTH1 + VREF1 and VTH2 + VREF1 set in the voltage hysteresis controller 95, respectively. The REG 101 and the REG 102 store upper and lower control thresholds VTH3 + VREF1 + VREF2 and VTH4 + VREF1 + VREF2 set in the current hysteresis controller 92, respectively.

  The multiplier 86 multiplies the digital signal VDF1 and the gain parameter stored in the REG 96. The multiplier 87 multiplies the digital signal VDF2 and the gain parameter stored in the REG 97. The multiplier 88 multiplies the digital signal VDF1 and the gain parameter stored in the REG 98. The adder 89 is an adder having the same role as, for example, the voltage addition circuit 62 in FIG. The prediction controllers 91 and 94 are differential controllers for canceling a delay caused by digital control.

  The EMI controller 93 adjusts the control threshold values VTH1 + VREF1, VTH2 + VREF1, VTH3 + VREF1 + VREF2, VTH4 + VREF1 + VREF2 of the voltage hysteresis controller 95 and the current hysteresis controller 92 in order to reduce switching noise of the switching regulator. The current predictor 90 predicts the inductor current IL flowing in the inductor 23 from the digital signals VDF1 and VDF2 converted by the ADCs 82 and 83 and the control signal V21 of the P-channel MOS transistor 48 from the voltage hysteresis controller 95, and the current voltage The signal VDI is output.

<< Detailed operation of the regulator device (modification) >>
Next, a more detailed operation of the digital control unit 81 will be described. First, based on a target specification of a predetermined allowable ripple in each output voltage VOUT1, VOUT2, each control threshold value VTH1 + VREF1, VTH2 + VREF1, VTH3 + VREF1, + VREF2, VTH4 + VREF1 + VREF2, and each gain parameter P1, P2, P3 are transmitted from the I / O terminal 84 via the RCU 85. Is set. The ADC 82 and the ADC 83 convert the feedback voltage VF1 from the voltage sensor 44 and the feedback voltage VF2 from the voltage sensor 45 into digital signals VDF1 and VDF2, respectively. The multipliers 86, 87, 88 multiply the digital signals VDF1, VDF2 corresponding to the multipliers 86, 87, 88, respectively, and gain parameters P1, P2, P3, and output amplified signals VP1, VP2, VP3, respectively.

  The adder 89 adds the amplified signals VP1 and VP2 and the current / voltage signal VDI of the inductor current predicted by the current predictor 90, and outputs a total signal VDA. The prediction controller 91 receives the total signal VDA and generates a control signal VDAC1 in which a delay caused by digital control is canceled. The current hysteresis controller 92 controls the P-channel MOS transistor 46 and the N-channel MOS transistor 47 with the control signals V23 and V24, respectively, so that the control signal VDAC1 falls within a third range based on the control threshold values VTH3 + VREF1 + VREF2, VTH4 + VREF1 + VREF2. . The control threshold values VTH3 + VREF1 + VREF2, VTH4 + VREF1 + VREF2 are set in the REGs 101 and 102. Due to the control signals V23 and V24, the average current value of the current flowing through the inductor 23 matches the total current value of the predetermined load current Io1 flowing through the load 5 and the predetermined load current Io2 flowing through the load 6.

  The prediction controller 94 receives the amplified signal VP3 and generates a control signal VDAC2 in which a delay caused by digital control is canceled. The voltage hysteresis controller 95 generates control signals V21 and V22 for controlling the P-channel MOS transistors 48 and 49 based on the control signal VDAC2 and the control threshold values VTH1 + VREF1 and VTH2 + VREF1 set in REG99 and 100. As a result, as in the case of the first embodiment, the first output voltage VOUT1 is suppressed within the first range based on the control threshold values VTH1 + VREF1, VTH2 + VREF1. Further, the ripple of the second output voltage VOUT2 can be sufficiently suppressed to a level that does not cause any particular problem.

  Here, the operation of the prediction controllers 91 and 94 will be supplemented as a representative example. In digital control, control is performed for each clock cycle, but a delay occurs in control according to the length of the clock cycle. For example, in the case of hysteresis control, the P-channel MOS transistor 48 cannot be immediately switched even if the control threshold values VTH1 + VREF1, VTH2 + VREF1 are out of the range, and the ripple may increase. In order to solve this, the predictive controller 94 outputs a predetermined time after elapse of a predetermined time based on the time-series change amount of the past data (here, the amplified signal VP3) before the control threshold value is deviated. The control signal VDAC2 is generated based on the predicted data. Specifically, for example, the change characteristic of the amplified signal VP3 can be expressed by approximating the rising edge and the falling edge with a predetermined function (for example, a linear function) as indicated by the feedback voltage VF1 in FIG. Future data can be predicted based on the amount of change over time.

  In this way, the predictive controller 94 predicts the feedback voltage VF1 that is expected to be fed back from the voltage sensor 44 thereafter, and outputs it as the control signal VDAC2. The voltage hysteresis controller 95 performs the control based on the control signal VDAC2 from the prediction controller 94. As a result, the voltage hysteresis controller 95 does not switch the P-channel MOS transistor 48 in response to the fact that the control threshold value is actually out of the range. Therefore, switching is performed in anticipation of the point of departure.

FIG. 8 is an explanatory diagram showing an operation example of the EMI controller in FIG. The control targets of the EMI controller (control threshold controller) 93 are the REGs 101 and 102 of the current hysteresis controller 92 and the REGs 99 and 100 of the voltage hysteresis controller 95. Here, the voltage hysteresis controller 95 is representative. This will be described as an example. When the control thresholds VTH1 + VREF1, VTH2 + VREF1 set in REG99, 100 are fixed, the switching cycle (T _s2 ) shown in FIG. 6 is constant during steady state, and switching noise due to concentration of the switching frequency at a specific frequency is generated. It becomes a problem.

In order to solve this problem, for example, the EMI controller 93 sets the control threshold values VTH1 + VREF1, VTH2 + VREF1 (that is, the first range) set in the REG99, 100 within the ripple allowable range 103 as shown in FIG. Change randomly in time series. The voltage hysteresis controller 95 generates the control signal V21 (V22) in response to the control signal VDAC2 reaching the randomly changed control threshold value. As a result, the switching period (T _s2 ) is not constant even during steady state, and the switching frequency is appropriately dispersed, so that switching noise can be reduced.

  Next, the operation of the current predictor 90 will be described. Here, in FIG. 7, it is assumed that the feedback voltage VF1 from the voltage sensor 44 and the first output voltage VOUT1 are in a proportional relationship of 1: 1. It is also assumed that the feedback voltage VF2 from the voltage sensor 45 and the second output voltage VOUT2 are also in a proportional relationship of 1: 1.

  When the control signal V21 [n−1] of the P-channel MOS transistor 48 one cycle before is low, the current predictor 90 generates a current voltage signal VDI [n] that is a predicted value of the inductor current IL [n] by the equation Calculate based on (9). On the other hand, when the control signal V21 [n−1] of the P-channel MOS transistor 48 one cycle before is high, the current predictor 90 generates a current voltage signal VDI [n] that is a predicted value of the inductor current IL [n]. , Based on the equation (10).

In Equation (9) and Equation (10), “T _s ” is the ADC sampling period, “K” is a parameter for converting the current value to the voltage value, and “C ₂₄ ” and “C ₂₉ ”. Are the capacitance values of the smoothing capacitors C24 and C29, respectively. In addition, the operation of the current predictor 90 described here is, for example, the case where noise caused by parasitic resistance and parasitic inductance existing in the capacitors C24 and C29, spike noise when the switching element is turned on / off, etc. are ignored. Is the action. Since it is not necessary to provide the current sensor 43 by the current predictor 90, the number of external parts can be reduced.

  As described above, by using the regulator device according to the second embodiment, in addition to the various effects described in the first embodiment, for example, the following effects can be obtained. First, since various control threshold values and gain parameters can be easily changed by a register (REG), it is possible to flexibly cope with various required specifications such as voltage specifications and ripple specifications. In addition, the digital control unit 81 can be constituted by general parts such as a microcomputer (MCU) and an FPGA (Field Programmable Gate Array), and a part of the regulator device (here, current sensor) is reduced. Therefore, the cost of the regulator device can be reduced. Furthermore, switching noise can be reduced by the EMI controller 93.

(Embodiment 3)
<< Detailed configuration of regulator device (application example) >>
FIG. 9 is a circuit diagram showing a detailed configuration example of the regulator device according to the third embodiment of the present invention. The regulator device of FIG. 9 is a configuration example in which the configuration example of the two outputs described in FIG. 3 of the second embodiment is expanded to three outputs. 9, the same components as those in FIG. 3 are denoted by the same reference numerals. The step-down switching regulator of FIG. 9 generates the third output voltage VOUT3 and the point that the power supply control units 41 and 42 of FIG. 3 are replaced with the power supply control units 32 and 33, respectively, as compared with the case of FIG. The difference is that a third output node, a third power supply generation unit 10c, and a voltage sensor 31 are added.

  Similar to the first and second resistance control units 10a and 10b, the third power supply generation unit 10c includes a P-channel MOS transistor 50 serving as a switching element and a smoothing capacitor C30. The voltage sensor 31 observes the third output voltage VOUT3 generated at one end of the smoothing capacitor C30 and converts it to a feedback voltage VF3 that can be input to the power supply control unit 32. The third output voltage VOUT3 is supplied to a load (for example, MCU) 7. Here, the stability requirement of the first output voltage VOUT1 is higher than the second output voltage VOUT2, and the stability requirement of the first output voltage VOUT1 and the second output voltage VOUT2 is higher than the third output voltage VOUT3. To do.

  FIG. 10 is a circuit diagram showing a configuration example of the first power supply control unit in FIG. 9, and FIG. 11 is a circuit diagram showing a configuration example of the second power supply control unit in FIG. As shown in FIG. 10, the power supply control unit (first power supply control unit) 33 includes an input terminal 55 in addition to the input terminal 54, the comparator 51 having a hysteresis function, the reference voltage VREF1, and the inverter 52a shown in FIG. , A comparator 56 having a hysteresis function, a reference voltage VREF2, an inverter 52b, a transistor driver 59, and logic circuits 57 and 58. The comparator 56 having a hysteresis function is set with two control threshold values VTH5 + VREF2 and VTH6 + VREF2, and compares the feedback voltage VF2 from the voltage sensor 45 inputted to the input terminal 55 with the two control threshold values VTH5 + VREF2 and VTH6 + VREF2, and controls the control signal. V25 is generated.

  The logic circuit 57 performs a logical sum (OR) operation using the input control signals V25 and V20, and generates a control signal V26. The inverter 52b inverts the control signal V26 from the logic circuit 57 to generate an inversion control signal V27. The logic circuit 58 performs a logical sum (OR) operation using the input control signals V27 and V20, and generates a control signal V28. The transistor driver 59 adjusts the dead-off time of the input control signals V19, V26, V28 so that two or more of the P-channel MOS transistors 48, 49, 50 are not turned on simultaneously, and the P-channel MOS transistor 48 , 49, 50 are converted into control signals V21, V22, V29 that can be driven.

  11, in addition to the transistor driver 63 shown in FIG. 5, the power supply control unit (second power supply control unit) 32 includes a comparator 69 having a hysteresis function, a reference voltage VREF1 + VREF2 + VREF3, and a voltage addition circuit 68. Input terminals 64, 65, 66, 67. The voltage adding circuit 68 includes feedback voltages VF1, VF2, and VF3 from the voltage sensors 44, 45, and 31 that are input from the input terminals 64, 65, and 66, and a current voltage VI from the current sensor 43 that is input from the input terminal 67. Are added to each other and converted to a total voltage VA that can be input to the comparator 69 having a hysteresis function.

  The comparator 69 having a hysteresis function is set with two control threshold values VTH3 + VREF1 + VREF2 + VREF3 and VTH4 + VREF1 + VREF2 + VREF3, and compares the total voltage VA from the voltage adding circuit 68 with these two control threshold values. Based on the comparison result, the comparator 69 generates a control signal V18 for controlling the P-channel MOS transistor 46 serving as a switching element and the N-channel MOS transistor 47 serving as a synchronous rectification switching element.

  Next, an operation example of the regulator device according to the third embodiment will be described. The operation of the switching unit 9 in FIG. 9 is the same as that of the first embodiment except that the control by the power supply control unit 32 is performed so that the load current Io3 of the load 7 is further added to the inductor current IL. Detailed description will be omitted. The control operation of the P channel MOS transistors 48, 49, 50 will be described with reference to FIG.

  The power supply control unit (first power supply control unit) 33 turns off the P-channel MOS transistor 48 (here, at a high level) when the feedback voltage VF1 from the voltage sensor 44 becomes larger than the upper limit control threshold VTH1 + VREF1. A control signal V19 is generated. On the other hand, when the feedback voltage VF1 from the voltage sensor 44 becomes smaller than the lower limit control threshold VTH2 + VREF1, the power supply control unit 33 generates the control signal V19 to turn on the P-channel MOS transistor 48 (here, low level). . The transistor driver 59 generates a control signal V21 for controlling on / off of the P-channel MOS transistor 48 based on the control signal V19. Thereby, the ripple of the feedback voltage VF1 (= VOUT1) from the voltage sensor 44 is suppressed between the two control threshold values VTH1 + VREF1 and VTH2 + VREF1.

  The power supply control unit 33 generates a high-level control signal V25 when the feedback voltage VF2 from the voltage sensor 45 becomes larger than the upper limit control threshold VTH5 + VREF2. On the other hand, when the feedback voltage VF2 from the voltage sensor 45 becomes smaller than the lower limit control threshold VTH6 + VREF2, the power supply control unit 33 generates a low-level control signal V25. The logic circuit 57 calculates the logical sum (OR) of the control signal V25, the inverted control signal V20 from the inverter 52a, and generates the control signal V26. The transistor driver 59 generates a control signal V22 for controlling on / off of the P-channel MOS transistor 49 based on the control signal V26. As a result, the P-channel MOS transistor 49 for controlling the second output voltage VOUT2 is controlled to be turned on only while the P-channel MOS transistor 48 for controlling the first output voltage VOUT1 is off. As a result, the control priority of the first output voltage VOUT1 is higher than that of the second output voltage VOUT2.

  Further, the logic circuit 58 calculates a logical sum (OR) of the inversion control signal V20 from the inverter 52a and the inversion control signal V27 from the inverter 52b, and generates a control signal V28. The transistor driver 59 generates a control signal V29 for controlling on / off of the P-channel MOS transistor 50 based on the control signal V28. As a result, the third output voltage VOUT3 is changed only while the P-channel MOS transistor 48 that controls the first output voltage VOUT1 is off and the P-channel MOS transistor 49 that controls the second output voltage VOUT2 is off. The P channel MOS transistor 50 to be controlled is controlled to be on. As a result, the control priority of the first and second output voltages VOUT1 and VOUT2 is higher than that of the third output voltage VOUT3.

  By such an operation, the first output voltage VOUT1 with the highest stability requirement can be suppressed within a first range based on two predetermined control threshold values VTH1 + VREF1, VTH2 + VREF1. Furthermore, the second output voltage VOUT2 having the second highest requirement for stability can be suppressed within a second range based on two predetermined control threshold values VTH5 + VREF2 and VTH6 + VREF2. As for the ripple of the third output voltage VOUT3 whose stability requirement is low, as in the case of the first embodiment, for example, ensuring the responsiveness in the power supply control unit 32 and optimizing the capacitance value of the smoothing capacitor C30. It is sufficiently possible to suppress to a level where there is no problem in actual use by making it.

  As described above, by using the regulator device according to the third embodiment, a plurality of output voltages (VOUT1 to VOUT3) are generated by a single inductor 23 as in the case of the first embodiment, and stability is required. High output voltages (VOUT1, VOUT2) can be generated. Further, the regulator device can be downsized. In the regulator device of the third embodiment, the configuration example in the case of three outputs has been shown. Similarly, the regulator device is expanded to four outputs or more by including a voltage hysteresis control unit according to the number of outputs. It is also possible.

  At this time, the power (inductor current IL) stored in the inductor 23 increases as the number of outputs increases. For example, when the switching element (48) corresponding to the first output voltage VOUT is on, a part of the inductor current IL is supplied to the load 5 and the rest is stored in the capacitor C24. As a result, as the number of outputs increases, the charging current of the capacitor C24 increases and the charging period of the capacitor C24 decreases. Charging of the capacitors C29 and C30 corresponding to other output voltages other than the first output voltage VOUT1 is performed in order in a period in which the switching element (48) corresponding to the first output voltage VOUT is off. As the number of outputs increases, the charging period of the capacitor C24 becomes shorter. Therefore, a sufficient charging period can be secured for the capacitors C29 and C30 corresponding to other output voltages.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention. For example, the above-described embodiment has been described in detail for easy understanding of the present invention, and is not necessarily limited to one having all the configurations described. Further, a part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of one embodiment. . In addition, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.

  For example, the regulator apparatus described in Embodiment 3 can of course apply digital control as described in Embodiment 2. In addition, here, the case where it is mainly applied to an electronic control unit (ECU) for a vehicle has been described as an example. However, the present invention is not necessarily limited to this, and various power supply voltages are required. The present invention can be widely applied to systems that require high stability with respect to some of the power supply voltages.

DESCRIPTION OF SYMBOLS 1, 2 Switching element 3, 4 Power element 5, 6, 7 Load 9 Switching part 10a 1st power supply generation part 10b 2nd power supply generation part 10c 3rd power supply generation part 12,22 Power supply control part 13 Output smoothing circuit 14 Step-down switching Regulator unit 15 First resistance control unit 16 First series regulator unit 17 Second series regulator unit 18 Second resistance control unit 23 Inductor 25-28 Switching element 31, 44, 45 Voltage sensor 32, 33, 41, 42 Power supply control unit 43 Current sensor 46 P channel MOS transistor 47 N channel MOS transistor 48 P channel MOS transistor 49 P channel MOS transistor 50 P channel MOS transistor 51, 56, 61, 69 Comparator 52a, 52b Inverter 53, 5 9,63 Transistor driver 54,55,64-67 Input terminal 57,58 Logic circuit 62,68 Voltage addition circuit 81 Digital control unit 82-83 ADC
84 I / O Terminal 85 Register Control Circuit 86-88 Multiplier 89 Adder 90 Current Predictor 91,94 Predictive Controller 92 Current Hysteresis Controller 93 EMI Controller 95 Voltage Stelliness Controller 96-102 Register 103 Ripple Allowable Range C19 , C20, C24, C29, C30 Capacitor IL Inductor current Io1-Io3 Load current V1, VIN Input power supply voltage V5-V7, V18-V29 Control signal V2 Intermediate output voltage V3, VOUT1 First output voltage V4, VOUT2 Second output voltage VA total voltage VDA total signal VDAC1, VDAC2 control signal VDF1, VDF2 digital signal VDI current voltage signal VF1-VF3 feedback voltage VI current voltage VOUT3 third output voltage VP1-VP3 amplified signal VREF1-V EF3 reference voltage

Claims (15)

An input node to which an input power supply voltage is supplied;
A first output node from which a first output voltage is generated;
A second output node from which a second output voltage is generated;
An inductor;
A first capacitor having one end connected to the first output node;
A second capacitor having one end connected to the second output node;
A first switch that applies the input power supply voltage to one end of the inductor when controlled to be on;
A second switch that applies a ground voltage to one end of the inductor when controlled to be on;
A third switch for outputting a current flowing through the inductor to the first output node when controlled to be turned on;
A fourth switch for outputting a current flowing through the inductor to the second output node when controlled to be turned on;
A first range of a control threshold is set in advance, and the on / off of the third switch is controlled so that the first output voltage changes in the first range, and the third switch is turned off during the off period of the third switch. And a first power supply controller that controls the fourth switch to turn on. The regulator device according to claim 1,
The first power supply control unit
A first comparator circuit that is preset with a first control threshold value that is an upper limit and a second control threshold value that is a lower limit, and performs hysteresis control based on the first and second control threshold values;
A first driver circuit for controlling on / off of the third and fourth switches based on an output of the first comparator circuit;
The first comparator circuit receives a first feedback voltage proportional to the first output voltage, and switches the third switch from OFF to ON when the first feedback voltage reaches the second control threshold. A control signal for switching the third switch from on to off when the first feedback voltage reaches the first control threshold,
The first driver circuit controls on / off of the third switch based on a control signal from the first comparator circuit, and controls on / off of the fourth switch with an opposite phase of the third switch. Regulator device. The regulator device according to claim 2, further comprising:
A current sensor that observes the current flowing through the inductor and outputs a current voltage having a voltage value corresponding to the current value of the current;
A second power supply controller for controlling on / off of the first and second switches,
The second power supply controller includes a voltage addition circuit that adds a second feedback voltage proportional to the second output voltage, the first feedback voltage, and the current voltage, and is output from the voltage addition circuit. A regulator device that controls on / off of the first and second switches based on a total voltage. The regulator device according to claim 3, wherein
The second power supply control unit
A second comparator circuit that is preset with a third control threshold that is an upper limit and a fourth control threshold that is a lower limit, and performs hysteresis control based on the third and fourth control thresholds;
A second driver circuit for controlling on / off of the first and second switches based on an output of the second comparator circuit;
The second comparator circuit outputs a control signal for switching the first switch from OFF to ON when the total voltage output from the voltage addition circuit reaches the fourth control threshold, and the total voltage Outputs a control signal for switching the first switch from on to off when the third control threshold is reached,
The second driver circuit controls on / off of the first switch based on a control signal from the second comparator circuit, and controls on / off of the second switch in an opposite phase of the first switch; Regulator device. The regulator device according to claim 4, wherein
The regulator device is a regulator device mounted on an electronic control device for a vehicle. An input node to which an input power supply voltage is supplied;
A first output node from which a first output voltage is generated;
A second output node from which a second output voltage is generated;
A third output node from which a third output voltage is generated;
An inductor;
A first capacitor having one end connected to the first output node;
A second capacitor having one end connected to the second output node;
A third capacitor having one end connected to the third output node;
A first switch that applies the input power supply voltage to one end of the inductor when controlled to be on;
A second switch that applies a ground voltage to one end of the inductor when controlled to be on;
A third switch for outputting a current flowing through the inductor to the first output node when controlled to be turned on;
A fourth switch for outputting a current flowing through the inductor to the second output node when controlled to be turned on;
A fifth switch for outputting a current flowing through the inductor to the third output node when controlled to be turned on;
A first range and a second range of control thresholds are set in advance, and the on / off of the third switch is controlled so that the first output voltage changes in the first range. The on / off of the fourth switch is controlled so that the second output voltage changes in the second range in the off period, and the fifth switch is turned on in the off period of the third and fourth switches. And a first power supply control unit that controls the regulator device. The regulator device according to claim 6, further comprising:
A current sensor that observes the current flowing through the inductor and outputs a current voltage having a voltage value corresponding to the current value of the current;
A second power supply controller for controlling on / off of the first and second switches,
The second power supply controller includes a first feedback voltage proportional to the first output voltage, a second feedback voltage proportional to the second output voltage, and a third feedback voltage proportional to the third output voltage; A regulator device comprising a voltage addition circuit for adding the current voltage, and controlling on / off of the first and second switches based on a total voltage output from the voltage addition circuit. The regulator device according to claim 7, wherein
The regulator device is a regulator device mounted on an electronic control device for a vehicle. An input node to which an input power supply voltage is supplied;
A first output node from which a first output voltage is generated;
A second output node from which a second output voltage is generated;
An inductor;
A first capacitor having one end connected to the first output node;
A second capacitor having one end connected to the second output node;
A first switch that applies the input power supply voltage to one end of the inductor when controlled to be on;
A second switch that applies a ground voltage to one end of the inductor when controlled to be on;
A third switch for outputting a current flowing through the inductor to the first output node when controlled to be turned on;
A fourth switch for outputting a current flowing through the inductor to the second output node when controlled to be turned on;
A first range of a control threshold is set in advance, and the on / off of the third switch is controlled so that the first output voltage changes in the first range, and the third switch is turned off during the off period of the third switch. A digital control unit that controls the fourth switch to turn on,
The digital control unit
A first analog-to-digital converter that converts a first feedback voltage proportional to the first output voltage into a first digital signal;
A second analog-to-digital converter that converts a second feedback voltage proportional to the second output voltage into a second digital signal;
A first register that holds the first range as a digital set value and is accessible from the outside;
And a voltage hysteresis controller that controls on / off of the third switch using the digital set value held in the first register and the first digital signal. The regulator device according to claim 9, wherein
The digital control unit further includes a control threshold controller that randomly changes the first range held in the first register in a time-series manner. The regulator device according to claim 10, wherein
The digital control unit further includes on / off information of the third switch, and amounts of change of the first and second digital signals based on sampling periods of the first and second analog-digital converters. A regulator apparatus comprising: a current predictor that predicts a current flowing through the inductor using the capacitance values of the first and second capacitors. The regulator device according to claim 11, wherein
The digital control unit further includes:
A first multiplier for multiplying the first digital signal by a first multiplication coefficient;
A second multiplier for multiplying the second digital signal by a second multiplication coefficient;
A second register that holds the first and second multiplication coefficients as digital setting values and is accessible from the outside;
An adder for adding the output of the first multiplier, the output of the second multiplier, and the output of the current predictor;
The digital control unit is a regulator device that controls on / off of the first and second switches based on an output of the adder. The regulator device according to claim 12,
The digital control unit further includes:
A current hysteresis controller for controlling on and off of the first and second switches based on the output of the adder;
A third register that holds a third range of a preset control threshold as a digital set value and is accessible from the outside,
The current hysteresis controller controls the on / off of the first and second switches so that the output of the adder falls within the third range held by the third register. The regulator device according to claim 13, wherein
The control threshold controller further changes the third range held in the third register randomly in a time series. The regulator device according to claim 14, wherein
The digital control unit further includes:
A third multiplier for multiplying the first digital signal by a third multiplication coefficient;
A fourth register that holds the third multiplication coefficient as a digital set value and is accessible from the outside;
A prediction controller that predicts a digital signal output from the third multiplier after a predetermined time has elapsed based on a time-series change amount of the digital signal output from the third multiplier;
The voltage hysteresis controller is a regulator device that controls on / off of the third switch using a digital set value held in the first register and a digital signal predicted by the prediction controller.

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