JP6086097B2 - Multistage phase change material and multilevel recording phase change memory device - Google Patents

Description

  The present invention relates to a multistage phase change material suitable for a multilevel recording phase change memory element and a multilevel recording phase change memory element using the material.

  In recent years, with the rapid market expansion of electronic devices, magnetoresistive memory (MRAM: Magnetic Random Access Memory), resistance change memory (ReRAM: Resistive Random Access Memory), and phase change memory as next-generation non-volatile memories that replace Flash memories. (PCRAM: Phase Change Random Access Memory) has been actively researched and developed. Among them, the memory cell of the phase change memory has a simple structure, and is superior to other memories in terms of manufacturing cost and integration.

  A phase change material is used for the information recording layer of the phase change memory, and reversible electrical resistance change between the amorphous phase (high electrical resistance) and the crystalline phase (low electrical resistance) of the phase change material is used. Thus, information is recorded in the memory cell.

Large as the phase resistance of the amorphous phase change material and the ratio of the electric resistance of the crystalline phase is 10 ² or more, the one characteristic also to the phase change memory that read margin is wide recording information is better than other memory One.

  The phase change material in the amorphous phase changes to the crystal phase by heating to a temperature above the crystallization temperature Tx, and the phase change material in the crystal phase rapidly cools after being heated to a melting point Tm higher than the crystallization temperature Tx. It changes to an amorphous phase.

For the phase change of the memory cell of the phase change memory, Joule heat generated by applying current / voltage to the phase change material is used. For example, the memory cell is brought into the reset state [1] by Joule heating the phase change material to a melting point _Tm or higher to form an amorphous phase having a high electrical resistance, and the phase change material is set to a crystallization temperature _Tx or higher and a melting point Tx. _The memory cell is set to a set state [0] by Joule heating to less than _m to form a crystal phase with low electrical resistance. Information is recorded in the memory cell using the difference between [1] and [0].

Currently, Ge ₂ Sb ₂ Te ₅ (GST) used for optical disks such as DVD-RAM (Digital Versatile Disk-Random Access Memory) is widely studied as a phase change material for phase change memory (eg, non-patented). References 1 and 2).

On the other hand, with an increase in performance of memory devices, further increase in capacity of phase change memory is required. As one of the technologies that make it possible to increase the capacity, there is a multi-value recording technology (see Non-Patent Document 3, for example). Generally, two states having different electrical resistances (reset state and set state) are set to 1 and 0, respectively, and 1-bit information is written into the memory cell. However, in multi-value recording, it is possible to increase the recording capacity of the phase change memory by providing the phase change material with a plurality of states having more than two different electric resistances despite the same memory cell size. In order to write 2 bits in one cell, 2 ² = 4 states of 11, 10, 01, 00 are necessary, and in order to write n bits of information in one cell, 2 ⁿ states are necessary. Become.

  In addition, the memory cell device is also required to have a large number of rewrites. It is considered that the main cause of repeated failure due to the phase change memory is peeling or formation of voids between the phase change material of the memory cell and the electrode material (see Non-Patent Document 3). Since there is a volume difference of about 8% between the amorphous phase and the crystalline phase of the GeSbTe compound, stress is accumulated at the interface of the phase change material by repeating the phase change, leading to failure (see Non-Patent Document 4). Therefore, in order to increase the number of times that rewriting can be repeated, it is desirable that the volume difference between the amorphous phase and the crystalline phase is small.

  Patent Document 1 discloses a technique for recording multilevel information in one memory cell. In this Patent Document 1, a memory material having a wide variable range of electrical resistance values and having the ability to set one of a plurality of resistance values within the variable range in response to a selected electrical input signal. It is described as being used. However, it is very difficult to control the phase state of one memory material step by step compared to controlling the two phase states, the crystalline phase and the amorphous phase, and the resistance margin between each state is reduced. The possibility of erroneous data rewriting and erroneous reading increases.

  Patent Document 2 discloses a technique for programming a desired resistance state in a phase change memory cell by controlling current pulses and / or voltage pulses. The level of current and / or voltage applied corresponds to the temperature occurring in the phase change material. Therefore, it is described that by controlling the temperature, multi-level recording can be realized by providing an intermediate state between a complete crystal state having a low electrical resistance and an amorphous state having a high electrical resistance. However, as in Patent Document 1, it is difficult to control the intermediate state using current and / or voltage pulses, and the possibility of erroneous data rewriting and erroneous reading increases.

  Patent Document 3 discloses a technique in which one memory cell is formed by a plurality of partial memory layers, and multi-value information is recorded by electric resistances of the plurality of partial memory layers. However, it is described that the plurality of partial memory layers are formed such that at least one of the layer width and the layer length (distance between electrodes) is different between the partial memory layers. However, since a plurality of partial memory layers are formed for one memory cell, there is a possibility that the area per one memory becomes large as a memory cell for multilevel recording.

  Patent Document 4 discloses a technique for recording multivalued information using a stacked two-layer cell array. However, multilevel recording is described as using four combinations of data states of two memory cells that are simultaneously accessed between two cell arrays stacked by sharing a word line. However, since two memory cells are used, the control becomes complicated such that a sense amplifier circuit for multi-value storage is required.

Non-Patent Document 5 discloses a crystal-amorphous superlattice structure produced by alternately forming 40 layers of GeTe compounds and Sb ₂ Te ₃ compounds. According to Non-Patent Document 5, in addition to the state in which all the constituent layers are in a crystalline phase and the state in which all the constituent layers are in an amorphous phase, the electric pulse is controlled to partially mix the amorphous phase and the crystalline phase. It is described that an intermediate resistance state can be realized by forming a layer. However, stacking phase change materials in multiple layers leads to a complicated manufacturing process.

Non-Patent Document 6 discloses a technique for multilevel recording using a Ge—Sb—Se phase change material. The Ge ₁₅ Sb ₈₅ Se _0.8 amorphous thin film shows two-stage crystallization behavior at 528K and 602K as the temperature rises. By making a device using this alloy, a three-stage resistance state by electric pulse control can be achieved. It is described that it is obtained. However, the composition for clearly changing the electric resistance in two steps is only when the Se concentration is 0.8%, and the intermediate state of sufficient resistance cannot be obtained at 0% or 1.5%. The width of is small. Furthermore, Ge ₁₅ Sb _85, which is the mother alloy, has been reported to have a large volume change of about 8% between the amorphous phase and the crystalline phase, and thus has a high possibility of adversely affecting the repetition characteristics (for example, non- Patent Document 7). In addition, when recording with two or more values, at least four resistance states are required, so that only three states can be obtained with a two-stage phase change material alone, which is not sufficient.

Non-Patent Document 8 discloses a technique for realizing a three-stage resistance state by laminating two different types of phase change materials, Ge ₁ Cu ₂ Te ₃ and Ge ₂ Sb ₂ Te ₅ . When there are two different types of phase change materials, the series resistance of the cell may be four stages of R _A1 + R _A2 , R _A1 + R _C2 , R _C1 + R _A2 , and R _C1 + RC ₂ . Here, A and C are an amorphous state and a crystalline state, respectively, 1 and 2 are a phase change material 1 and a phase change material 2, and a relationship of R _A1 >> R _A2 >> R _C1 ≈R _C2 is established. To do. This is because the crystal phase of the phase change material does not change the electrical resistance by orders of magnitude even when the alloy composition changes, whereas the amorphous phase causes the electrical resistance to change orders of magnitude when the alloy composition changes. However, in the case of series resistance, since the overall electrical resistance is generally determined by the state of the phase change material having a high electrical resistance, R _A1 + R _A2 and R _A1 + RC ₂ are independent of the phase change material 2 state. It is determined by the electric resistance of R _A1 of material 1. That is, R _A1 + R _A2 ≈R _A1 + R _C2 , and no significant difference appears in the electric resistance between the two. Therefore, in the combination of two types of phase change materials, there are three states with a significant difference in electrical resistance. On the other hand, in order to achieve the 2-bit state, there are four stages of electrical resistance states. Therefore, Non-Patent Document 8 reports that there is a possibility that a four-stage resistance state can be realized if a three-layer stacked structure is produced by combining materials of Si _3.9 Sb _45.6 Te _50.5. Yes. However, it is difficult to stack three different materials and further satisfy their melting point, crystallization temperature, and electric resistance control. In particular, if a material that is not desired undergoes a phase change during rewriting, it may lead to erroneous rewriting.

Non-Patent Document 9 discloses a technique for realizing a three-stage resistance state by alternately stacking two kinds of phase change materials of Sb ₅₀ Se ₅₀ and Ga ₃₀ Sb ₇₀ at least six times. However, since only two phase change materials are used, the resistance state is limited to three stages, and the production by stacking films further complicates the manufacturing process.

  As described above, in the multi-value recording phase change memory proposed so far, 1) In the case of controlling the electrical resistance of one phase change material, the margin of electrical resistance in each state is low and the reliability is poor. 2) In the case of using a plurality of partial memory layers and memory cells, the circuit area per memory cell increases and the control becomes complicated. 3) In the case of using only an alloy whose resistance changes in two stages, there are four stages. 4) When three phase change materials are laminated, there are problems such as complicated processes and difficulty in controlling melting point, crystallization temperature, electric resistance, etc. However, there is no technology that can withstand practical use.

Japanese National Patent Publication No. 11-510317 JP 2007-33068 Gazette Japanese Patent No. 4492816 Japanese Patent No. 4660095

Supervision: Masahiro Okuda, Next Generation Optical Recording Technology and Materials, CM Publishing, 2004 Supervision: Mitsumasa Koyanagi, the latest technology of next-generation semiconductor memory, CM Publishing, 2009 S. Raux et al. , Phase Change Materials: Science and Applications, Springer, 2009 R. Detleple et al. , “Identification of Te alloys with suitable phase change charactaristics”, Applied Physics Letters, 83 (2003) p. 2572 T. T. C. Chong et al. "Crystalline Amorphous Semiconductor Superlattice", Physical Review Letters, 100 (2008) p. 136101 Y. Gu et al. “Novel phase-change material GeSbSe for application of three-phase phase-access access memory”, Solid-State Electronics, 54 (2010) p. 443 S. Raux et al. "Phase transitions in Ge-Sb phase change materials", Journal of Applied Physics, 105 (2009) p. 064918 Y. Saito et al. "Multiresistance Characteristics of PCRAM With Ge1Cu2Te3 and Ge2Sb2Te5 Films", IEEE Electron Device Letters, 33 (2012) p. 1399 Y. Hu et al. , “Superlatice-like Sb50Se50 / Ga30Sb70 thin films for high-speed and high density phase change memory application”, Applied Physics 103 (20). 152107

  The present invention has been made for the purpose of improving the problems of the conventional multi-value recording phase change memory described above, and is a novel multi-stage phase suitable for obtaining a multi-value recording phase change memory device having excellent practicality. It is an object to provide a multi-value recording phase change memory using a change material.

  As a result of diligent research in view of the above object, the present inventors have obtained the knowledge that an amorphous phase is obtained in a material containing Ge, Cu and Te, and a two-stage change in electrical resistance occurs as the temperature rises. Then, by combining this material with a phase change material showing a one-step change in electric resistance, it was found that four resistance states, that is, two-bit multilevel recording can be performed with only two types of phase change materials. .

Based on the above findings, as one aspect of the present invention, the first phase change layer formed of a phase change material whose electrical resistance exhibits a one-step change with increasing temperature, and the two-step electrical resistance with increasing temperature. And a second phase change layer formed of the above-described multi-stage phase change material exhibiting a change of the above-described multi-stage phase change material, wherein the multi-stage phase change material has a general chemical formula, Ge _x Cu _y Te _100-xy Wherein x is 18.0 (at.%) Or more and 36.0 (at.%) Or less, y is 16.0 (at.%) Or more, 32.0 (at %) Is a multistage phase change material selected such that 45 (at.%) ≦ x + y ≦ 55 (at.%) Within the following range, and the electrical resistance of the first phase change layer is: In one stage at a temperature lower than the temperature at which the first stage electrical resistance change occurs in the second phase change layer. 4 values (2 bits) of information can be written, in which the electrical resistance of the amorphous phase of the first phase change layer is higher than the electrical resistance of the amorphous phase of the second phase change layer. A recording phase change memory element is provided.

  In the multi-value recording phase change memory element, the phase change material may include a GeTe-based material.

According to another aspect of the present invention, there is provided a first phase change layer formed of a phase change material whose electric resistance exhibits a one-step change with increasing temperature, and a two-step change in electric resistance with increasing temperature. comprising a memory layer including a second phase change layer formed in to a multi-stage phase-change material, the composition, the multi-stage phase change material, the general formula is represented by _{Ge x Cu y Te 100-x} -y Wherein x is 18.0 (at.%) Or more and 36.0 (at.%) Or less, and y is 16.0 (at.%) Or more and 32.0 (at.%) Or less. In the range of 45 (at.%) ≦ x + y ≦ 55 (at.%), The electrical resistance of the first phase change layer is the second phase change material. Between the temperature at which the first stage electrical resistance change occurs in the phase change layer and the temperature at which the second stage electrical resistance change occurs The electric resistance of the first phase change layer is lower than the electric resistance of the amorphous phase of the second phase change layer in four steps (2 bits). A multi-value recording phase change memory device capable of writing the information is provided.

  In the multilevel recording phase change memory element, the phase change material may include a GaSb-based material.

  In the multilevel recording phase change memory element, the memory layer is a stacked body of the first phase change layer and the second phase change layer, and the stacked body is configured to supply a current to the memory layer. You may arrange | position between 1 electrode layer and 2nd electrode layer.

  In the multilevel recording phase change memory element, another electrode layer may be disposed between the first phase change layer and the second phase change layer.

  A multi-value recording phase change memory element using a novel multi-stage phase change material suitable for obtaining a multi-value recording phase change memory element excellent in practical use is provided.

FIG. 1 is a table showing compositions and physical properties of phase change materials according to examples and comparative examples. FIG. 2A is a graph showing the temperature dependence of the electrical resistance of the phase change material thin film according to the example and the comparative example. FIG. 2B is a graph showing the temperature dependence of the electrical resistance of the phase change material thin film according to the example. FIG. 3A is a graph showing a change in film thickness accompanying a phase change of the phase change material thin film according to the comparative example. FIG. 3B is a graph showing a change in film thickness accompanying a phase change of the phase change material thin film according to the example. FIG. 3C is a graph showing a volume change accompanying a phase change of the phase change material thin film according to the example and the comparative example. FIG. 4A is a graph showing the relationship between the ratio of Ge and volume change. FIG. 4B is a graph showing the relationship between the Cu ratio and volume change. FIG. 5 is a table showing the relationship between the combination of two types of phase change materials and the feasibility of multilevel recording. FIG. 6 is a graph showing the temperature dependence of the electrical resistance of the phase change material thin film according to the example and the comparative example. FIG. 7 is a schematic cross-sectional view illustrating the structure of the multilevel recording phase change memory cell according to the embodiment. FIG. 8A is a graph showing combinations of states that enable four stages of electrical resistance states and the resistance values in each state. FIG. 8B is a graph showing combinations of states that enable four stages of electrical resistance states and the resistance values in each state. FIG. 9 is a schematic cross-sectional view showing the structure of a multilevel recording phase change memory cell according to another embodiment.

  As a result of conducting various experiments on a phase change material based on Ge—Cu—Te, in order to pursue a material that exhibits two-stage electric resistance change and a small volume change due to crystallization, It has been found that the object of the present invention can be achieved in a material having the following characteristics. Some of the results of experiments conducted by the present inventors are shown in FIGS. 1 and 5 described later. Embodiments of the present invention will be described below.

The multistage phase change material according to the embodiment is a phase change material whose electric resistance changes in two stages, that is, a two-stage resistance change type phase change material, which contains Ge, Cu, and Te, and has the following chemical formula:
Ge _x Cu _y Te _100-xy
It has a composition expressed by. However, in the formula, x is 18.0 (at.%) Or more and 36.0 (at.%) Or less, and y is 16.0 (at.%) Or more and 32.0 (at.%) Or less. Are selected to satisfy 45 (at.%) ≦ x + y ≦ 55 (at.%). This two-stage resistance change type phase change material Ge _x Cu _y Te _100-xy (hereinafter also simply referred to as “GeCuTe”) is an amorphous material whose electric resistance changes in two steps depending on the temperature and has a relatively high electric resistance. It is possible to take three phase states: a phase, a first crystalline phase having a relatively low electrical resistance, and a second crystalline phase having a relatively low electrical resistance. The volume change at is very small.

  In the above chemical formula, Ge is in the range of 18.0 (at.%) To 36.0 (at.%), And Cu is 16.0 (at.%) To 32.0 (at.%). The reason why it is within the following range is that the electrical resistance does not change in two steps when Ge is more or less than this range, or when Cu is more or less than this range. In other words, when Ge and Cu are not in the above ranges, the three phase states of the amorphous phase, the first crystal phase, and the second crystal phase cannot be taken. Further, Ge is preferably in the range of 22.0 (at.%) Or more and 34.0 (at.%) Or less, and is preferably 25.0 (at.%) Or more and 32.0 (at.%). More preferably within the following range. Further, Cu is preferably in the range of 18.0 (at.%) To 29.0 (at.%), Preferably 21.0 (at.%) To 27.0 (at.%). More preferably within the following range.

  Furthermore, in the above chemical formula, the reason why (x + y) is in the range of 45 (at.%) ≦ x + y ≦ 55 (at.%) Is that when (x + y) is more or less than this range, GeCuTe This is because the first crystal phase and the second crystal phase do not have a desired crystal structure. Further, (x + y) is preferably in the range of 47 (at.%) ≦ x + y ≦ 53 (at.%).

  Within the above range, GeCuTe exhibits a two-step change in electrical resistance, and when it takes three phase states, an amorphous phase, a first crystalline phase, and a second crystalline phase, it is between the three phase states in GeCuTe. Volume change is very small.

In the above-mentioned GeCuTe, the first crystal phase generated by the first stage change from the amorphous phase has an orthorhombic structure, the crystallization temperature is about 240 ° C., and the electric resistivity is about 5 × 10 ^−4. It is considered to be GeCu ₂ Te ₃ exhibiting Ωcm. Further, the second crystal phase generated by the change in the second stage is GeTe having a rhombohedral structure, a crystallization temperature of about 320 ° C., and an electric resistivity of about 4 × 10 ⁻⁴ Ωcm. Conceivable.

  The above-mentioned GeCuTe can be applied to, for example, a material of a memory layer of a multi-value recording phase change memory element capable of writing ternary information alone. However, when applied to the material of the memory layer of the multi-value recording phase change memory element capable of writing quaternary (2-bit) information, the material for writing information for one value is insufficient. Therefore, the GeCuTe is combined with a phase change material for writing information for one value.

  That is, the multi-value recording phase change memory element according to the embodiment includes the first phase change formed of a phase change material whose electric resistance exhibits a one-step change with increasing temperature, that is, a one-step resistance change type phase change material. A memory layer comprising: a layer; and a second phase change layer formed of the above-described multi-stage phase change material exhibiting a two-stage change in electric resistance with increasing temperature, that is, a two-stage resistance change type phase change material. doing. Here, the electrical resistance of the first phase change layer changes in one stage at a temperature lower than the temperature at which the first stage electrical resistance change occurs in the second phase change layer. The electrical resistance of the amorphous phase of the first phase change layer is higher than the electrical resistance of the amorphous phase of the second phase change layer. This multi-value recording phase change memory element can write four-value (2-bit) information.

  Thus, the first phase change layer combined with the two-stage resistance change type phase change material GeCuTe of the second phase change layer is compared with the two-stage resistance change type phase change material. Thus, a material having a low crystallization temperature and a high electric resistance of the amorphous phase is selected. The reason for this is that when the crystallization temperature of the one-stage resistance change type phase change material is equal to or higher than the crystallization temperature of the two-stage resistance change type phase change material, the two materials are not applied when a crystallization pulse is applied to the memory layer. This is because crystallization occurs at the same time, and a four-stage electrical resistance state cannot be obtained. Further, when the electrical resistance of the amorphous phase of the one-stage resistance change type phase change material is approximately the same as the electrical resistance of the amorphous phase of the two-stage resistance change type phase change material, even if the first stage resistance change type phase change material is crystallized, This is because if the step resistance change type phase change material is in an amorphous phase, the difference between the state with the highest resistance and the state with the second highest resistance becomes small, and four states of electrical resistance cannot be obtained. Although there is no restriction | limiting in particular as a 1 step | paragraph resistance change type | mold phase change material which has such a characteristic, It is preferable that GeTe type material is included, and it is more preferable that GeTe is included. The composition of GeTe is not necessarily exactly 1: 1, and Ge: Te may have an error of about ± 5%.

  In addition, the multi-value recording phase change memory element according to the embodiment includes a first phase change formed of a phase change material whose electric resistance exhibits a one-step change with increasing temperature, that is, a one-step resistance change type phase change material. A memory layer comprising: a layer; and a second phase change layer formed of the above-described multi-stage phase change material exhibiting a two-stage change in electric resistance with increasing temperature, that is, a two-stage resistance change type phase change material. doing. Here, the electrical resistance of the first phase change layer is between the temperature at which the first stage electrical resistance change occurs in the second phase change layer and the temperature at which the second stage electrical resistance change occurs. The electrical resistance changes in one step with temperature. The electrical resistance of the amorphous phase of the first phase change layer is lower than the electrical resistance of the amorphous phase of the second phase change layer. This multi-value recording phase change memory element can write four-value (2-bit) information.

As described above, the one-stage resistance change-type phase change material of the first phase change layer combined with the two-stage resistance change-type phase change material GeCuTe of the second phase change layer includes the crystallization temperature of the one-stage resistance change-type phase change material. Is in the range between the first crystallization temperature and the second crystallization temperature of the two-stage resistance change type phase change material, and the electric resistance of the amorphous phase of the one-stage resistance change type phase change material is the two-stage resistance change type. A material is selected that is lower than the electrical resistance of the amorphous phase of the phase change material. The reason for this is that when the electric resistance of the amorphous phase of the one-step resistance change type phase change material is lower than the electric resistance of the amorphous phase of the two-step resistance change type phase change material, the crystallization temperature of the one-step resistance change type phase change material is the highest. If it is high, the electric resistance of the amorphous phase of the one-stage resistance change type phase change material is not related to whether the two-stage resistance change type phase change material is in the state of the first crystal phase or the second crystal phase. This is because the overall resistance is determined and a four-stage resistance state cannot be obtained. Further, when the crystallization temperature of the one-step resistance change type phase change material is the lowest, the amorphous of the two-step resistance change type phase change material is used regardless of whether the one-step resistance change type phase change material is an amorphous phase or a crystalline phase. This is because the overall resistance is determined by the electrical resistance of the phases, and the four electrical resistance states cannot be obtained. The stage variable-resistance phase change material having such properties is not particularly limited, preferably includes a GaSb-based materials, and more preferably contains Ga ₂₄ Sb _76. The composition of GeSb does not need to be exactly 24:76 for Ge: Sb, and may have an error of about ± 5%.

In the multilevel recording phase change memory element described above, the memory layer may be a stacked body of a second phase change layer and a first phase change layer. The stacked body may be provided on the substrate and disposed between the first electrode layer and the second electrode layer for energizing the memory layer. Specifically, the multi-value recording phase change memory element includes a first phase change layer formed on a substrate (which may have an insulating layer) and a first phase change layer formed on the first phase change layer. Two phase change layers; a first electrode layer and a second electrode layer formed at an end of the first phase change layer and an end of the second phase change layer, respectively; The exposed portion of the second phase change layer is preferably covered with an insulating layer. As the insulating _layer, such as _{SiO 2, ZnS-SiO 2,} Si 3 N 4 is illustrated. Examples of the two electrode layers include W, TiN, Al, and Cu. Note that the positional relationship between the first phase change layer and the second phase change layer may be reversed.

  Furthermore, in the above multilevel recording phase change memory element, another electrode layer may be disposed between the second phase change layer and the first phase change layer. Specifically, the multi-value recording phase change memory element is further provided between the first electrode layer and the first phase change layer, and between the first phase change layer and the second phase change layer. There is preferably an exothermic electrode layer between them. Examples of the exothermic electrode layer include metals such as W and TiW, nitrides such as TiN, and oxides. The exposed portions of the first phase change layer and the second phase change layer are covered with an insulating layer. Note that the positional relationship between the first phase change layer and the second phase change layer may be reversed.

  Next, the manufacturing method of the multistage phase change material according to the embodiment, that is, the two-stage resistance change type phase change material GeCuTe will be described. As a manufacturing method of GeCuTe, a multistage phase change material is formed on various substrates or insulating layers by physical vapor deposition (sputtering or the like) using various targets containing Ge, Cu and Te. More specifically, each pure metal (Ge, Cu and Te) or each binary alloy (Ge-Te alloy and Cu-Te alloy) is used as a target, and the concentration of each element is varied by changing the film formation output by multi-source sputtering. A multi-stage phase change material is formed while adjusting the above. Alternatively, a multistage phase change material is formed by sputtering using a ternary alloy target (Ge—Cu—Te alloy) whose components are adjusted in advance. The substrate temperature during film formation can be changed from room temperature to a desired temperature as required. When the substrate temperature is lower than the crystallization temperature of the material to be manufactured, the material exhibits an amorphous phase, and when the substrate temperature is higher than the crystallization temperature, the material exhibits a crystalline phase.

  The multi-stage phase change material of the embodiment described above includes not only the amorphous phase and the crystalline phase (the second crystalline phase described above), but also an intermediate phase (described above) that exists over at least 30 ° C. in the temperature range. The first crystal phase), showing a three-stage electrical resistance state, and the volume change is 4% or less. Therefore, by combining this multi-stage phase change material (two-stage resistance change type phase change material) and a general phase change material (single stage resistance change type phase change material), only two types of materials are used. , Four electrical resistance states can be obtained, and 2-bit recording can be realized. Further, since the volume change is small, failure due to repetitive operation hardly occurs, and a high number of rewrites can be realized. As a result, a highly practical multi-value recording phase change memory element can be configured using this multi-stage phase change material.

First, examples of the multistage phase change material will be described.
FIG. 1 is a table showing compositions and physical properties of phase change materials according to examples and comparative examples. The samples of Examples 1 to 3 are phase change material thin films formed of a multistage phase change material, that is, a two-stage resistance change type phase change material. On the other hand, the samples of Comparative Examples 1 to 3 are phase change material thin films formed of a general phase change material, that is, a one-step resistance change type phase change material. The samples of Examples 1 to 3 and Comparative Examples 1 to 3 were formed with a film thickness of 200 nm on a SiO ₂ / Si substrate using an RF sputtering apparatus. In sputtering, a GeTe alloy and a CuTe alloy were used as targets, and the film formation output of each target was adjusted to produce an amorphous phase thin film of a phase change material having a desired composition. The samples of Examples 1 to 3 (two-stage resistance change type phase change material) had a composition of Ge _x Cu _y Te _100-xy . However, x is 27.2 (at.%) Or more and 31.4 (at.%) Or less, y is 21.1 (at.%) Or more and 24.3 (at.%) Or less, (x + y) is The composition range was 51.5 (at.%) Or more and 52.5 (at.%) Or less. The samples of Comparative Examples 1 to 3 (one-stage resistance change type phase change material) have compositions of GeTe, Ge _46.2 Cu _5.1 Te _48.7, and Ge _17.4 Cu _33.6 Te _49.0 . there were. The composition of each sample was measured by a scanning electron microscope-energy dispersive X-ray spectroscopy (SEM-EDS; Scanning Electron Microscopy-Energy Dispersive Spectroscopy).

FIG. 1 shows the crystallization temperature T _x ( ^o C), the volume change (%) due to crystallization, and the type of resistance change of the samples of Examples 1 to 3 and Comparative Examples 1 to 3. Here, regarding the crystallization temperature Tx, the electric resistance in the temperature rising process (temperature rising rate: 10 ^{° C./min} ) was measured using a two-terminal method, and the temperature was set to a temperature at which the electric resistance started to rapidly decrease. Regarding the volume change, the film thickness (t _A ) of the amorphous phase before temperature increase and the film thickness (t _C ) of the crystal phase after temperature increase and cooling are measured by atomic force microscopy, and ((t _C / t _A ) -1) x 100 (%). The type of resistance change was judged from the behavior of the electrical resistance change during the temperature rising process.

  As shown in FIG. 1, the phase change material thin films of Comparative Examples 1 to 3 showed a one-step change in electrical resistance, that is, a change from an amorphous phase to a crystalline phase. The phase change material thin film exhibited a two-step change in electrical resistance, ie, a change from the amorphous phase to the first crystal phase and a change from the first crystal phase to the second crystal phase. In other words, the phase change material thin films of Comparative Examples 1 to 3 had one crystallization temperature, whereas the phase change material thin films of Examples 1 to 3 had two crystallization temperatures. Hereinafter, the comparative example 1 and examples 2 and 3 will be described in detail.

FIG. 2A shows changes in electrical resistance at the time of temperature increase / decrease obtained by the two-terminal method for the phase change material thin films of Comparative Example 1 and Example 2. However, the vertical axis and the horizontal axis indicate electric resistance (Ω) and temperature (° C.), respectively, and the curves M1 and M2 indicate the phase change material thin films of Comparative Example 1 and Example 2, respectively. As shown in FIG. 2A, the phase change material thin film (curve M1) of Comparative Example 1 has an extremely high electric resistance in the amorphous phase, but the electric resistance sharply increases at the crystallization temperature Tx at which crystallization is considered to have occurred. Diminished. Thus, although the electrical resistance of the phase change material thin film of Comparative Example 1 changed in one stage, the electrical resistance hardly changed during the temperature lowering process after crystallization. On the other hand, in the phase change material thin film (curve M2) of Example 2, the electrical resistance sharply decreased at the first crystallization temperature T _{x1 at} which the first crystallization, that is, the first crystallization was considered to occur, It did not go down. Thereafter, when the temperature was further increased, the electric resistance suddenly decreased again at the second crystallization temperature T _{x2 at} which the next crystallization, that is, the second crystallization was considered to have occurred. The electrical resistance of the crystal phase after complete crystallization hardly changed between the phase change material thin film of Comparative Example 1 and the phase change material thin film of Example 2. Thus, from the change during the temperature rise of the electrical resistance, the electrical resistance, that is, the change in one or two stages of the crystal structure, and the temperature at which the change occurs, that is, the crystallization temperature T _x can be known. Therefore, based on this result, the type of resistance change and the crystallization temperature in FIG. 1 were determined. In the example of FIG. 2A, for the phase change material thin film of Comparative Example 1, the crystallization temperature T _x was 188 ° C. from the curve M1, and the type of resistance change was one stage. On the other hand, for the phase change material thin film of Example 2, from curve M2, the crystallization temperature T _x is 238 ° C. for the first crystallization temperature T _x-1 and 320 ° C. for the second crystallization temperature T _x-2 . The type of resistance change was two-stage.

FIG. 2B shows a change in electrical resistance at the time of temperature increase / decrease obtained by the two-terminal method for the phase change material thin film of Example 3. However, the vertical and horizontal axes are the same as in FIG. 2A. Curve M3 shows the phase change material thin film of Example 3. As shown in FIG. 2B, in the phase change material thin film (curve M3) of Example 3, the first crystallization temperature T _x-1 is 225 ° C., the second crystallization temperature T _x-2 is 318 ° C., There were two types of resistance change. In addition, when the temperature is raised to a temperature not lower than the first crystallization temperature T _{x-1 and not} higher than the second crystallization temperature T _x-2 , that is, after the temperature is lowered after the first crystallization, the electricity in the first crystallization is obtained. The resistance was maintained as it was and remained almost unchanged up to room temperature. Similarly, when the temperature is raised to a temperature equal to or higher than the second crystallization temperature T _x−2 , that is, after the second crystallization, the electric resistance in the second crystallization is maintained as it is, and the temperature almost reaches room temperature. It didn't change. Since the electric resistance after the first crystallization and the electric resistance after the second crystallization are different by one digit or more at room temperature, these states have a sufficient difference for reading data. I found out.

2A and 2B, in the phase change material thin films of Comparative Example 2 and Comparative Example 3, the crystallization temperatures _Tx are 226 ° C. and 223 ° C., and the resistance change type is one. It was a stage. In the phase change material thin film of Example 1, the first crystallization temperature T _x-1 was 240 ° C., the second crystallization temperature T _x-2 was 321 ° C., and the resistance change type was two-stage. .

  Further, as shown in FIG. 1, the phase change material thin films of Comparative Examples 1 to 3 showed a large volume change due to the phase change from the amorphous phase to the crystal phase, whereas the phase changes of Examples 1 to 3 The material thin film showed a very small volume change due to the phase change from the amorphous phase to the crystalline phase. Hereinafter, Comparative Examples 1 and 2 and Examples 2 and 3 will be described in detail.

  FIG. 3A shows the film thickness change between the amorphous phase and the crystal phase of the phase change material thin film of Comparative Example 2. The vertical axis represents the thickness (nm) of the phase change material thin film, and the region having a thickness of 0 nm is the surface of the substrate and is the portion without the phase change material thin film. The horizontal axis indicates the distance in the measuring apparatus, and is an amount that is unrelated to the volume change of the phase change material thin film. A shows the measurement result of the amorphous phase, and C shows the measurement result of the crystal phase. The phase change material thin film of Comparative Example 2 was formed of a one-step resistance change type phase change material, and the thickness was reduced by several tens of nm by crystallization from the amorphous phase (A) to the crystal phase (C). That is, the volume was reduced by crystallization from the amorphous phase to the crystalline phase.

  On the other hand, FIG. 3B shows the film thickness change between the amorphous phase and the crystal phase of the phase change material thin film of Example 3. The vertical and horizontal axes and A and C are the same as in FIG. 3A. The phase change material thin film of Example 3 is formed of a two-stage resistance change type phase change material. Even if the amorphous phase (A) is crystallized (second crystallization) to become a crystalline phase (C). The thickness hardly changed. That is, there was no significant difference between the volume of the amorphous phase and the volume of the crystal phase.

  FIG. 3C shows the volume change before and after the crystallization of the phase change material thin film of Comparative Example 1 and Example 2. The volume change was measured in the same manner as in FIGS. 3A and 3B. Since the phase change material thin film of Comparative Example 1 shows a one-step resistance change, when the volume was compared between the amorphous phase and the crystal phase after heat treatment at 350 ° C., the volume decreased by 7.8% due to crystallization. did. On the other hand, since the phase change material thin film of Example 2 shows a two-step resistance change, it is between the amorphous phase and the first crystal phase heat-treated at 300 ° C. and between the amorphous phase and the second heat-treated at 350 ° C. When the volume was compared with each of the crystal phases, the volume was increased by 3.2% by the first crystallization, and the volume was increased by 0.6% by the second crystallization. From the above results, it was found that the volume change was large in the one-stage resistance change type phase change material, but the volume change was very small in the two-stage resistance change type phase change material. Therefore, it was found that the two-stage resistance change type phase change material can be rewritten for a long time.

  As in the case of FIGS. 3A and 3B described above, in the phase change material thin films of Comparative Example 2 and Comparative Example 3, the volume change was decreased by 8.3% and increased by 3.4%. It was big. On the other hand, in the phase change material thin film of Example 1 and Example 3, the volume change was very small with a decrease of 0.3% and a decrease of 0.9%.

  4A is a graph showing the relationship between the Ge ratio (at.%) And volume change (%) based on Table 1. FIG. Referring to FIG. 4A, it can be seen that there is a correlation between the Ge ratio, volume change, and two-stage resistance change. Here, assuming that the volume change is within about ± 3%, the ratio of Ge is 18.0 (at.%) Or more and 36.0 (at.%). Within the following range. Preferably, it is in the range of 22.0 (at.%) Or more and 34.0 (at.%) Or less. More preferably, it is in the range of 25.0 (at.%) To 32.0 (at.%).

  On the other hand, FIG. 4B is a graph showing the relationship between the Cu ratio (at.%) And the volume change (%) based on Table 1. Referring to FIG. 4B, it can be seen that there is a correlation between the Cu ratio, volume change, and two-stage resistance change. Here, assuming that the volume change is within about ± 3%, the Cu content is 16.0 (at.%) Or more and 32.0 (at.%). Within the following range. Preferably, it is in the range of 18.0 (at.%) Or more and 29.0 (at.%) Or less. More preferably, it is in the range of 21.0 (at.%) Or more and 27.0 (at.%) Or less.

First, an embodiment according to a multi-value recording phase change memory element will be described.
FIG. 5 shows an example of a combination of materials capable of multi-value recording when a two-stage resistance change type phase change material and a one-stage resistance change type phase change material are combined, and a comparison of combinations where multi-value recording is impossible. An example is a table showing the physical properties of materials in relation to them. The composition of the material, the electrical resistance of the amorphous phase, the crystallization temperature, the electrical resistance of the crystalline phase, and the possibility of multivalue recording were shown. However, the electrical resistance of the amorphous phase of the two-stage resistance change type phase change material is R _A2 , the first crystallization temperature is T _x2-1 , the electrical resistance of the first crystal phase is R _C2-1 , and the second crystallization temperature. the _{T X2-2,} the electrical resistance of the second crystal phase and _{R C2-2.} Further, the electric resistance of the amorphous phase of the one-stage resistance change type phase change material is R _A1 , the crystallization temperature is T _x1 , and the electric resistance of the crystal phase is R _C1 . Examples 4 to 5 show combinations that allow multi-value recording, and Comparative Examples 4 to 7 show combinations that do not allow multi-value recording.

Example 4 is a combination of a two-stage resistance change type phase change material and a one-stage resistance change type material having a crystallization temperature lower than that of the two-stage resistance change type material and the highest electrical resistance of the amorphous phase. Specifically, it is a combination of Ge _28.8 Cu _23.4 Te _47.8 and GeTe. In this case, the two-stage resistance change type phase change material and the one-stage resistance change type phase change material have, for example, a relationship between a curve M2 and a curve M1 shown in FIG. 2A. As shown in Example 4 of FIG. 5, when R _A1 > R _A2 and T _x1 <T _x2-1 <T _x2-2 , “R _A1 + R _A2 ”, “R _C1 + R _A2 ”, “R _C1 + R” “ _C2-1 ” and “R _C1 + R _C2-2 ” realize a four-stage electrical resistance state. However, “R _A1 + R _A2 ”> “R _C1 + R _A2 ”> “R _C1 + R _C2-1 ”> “R _C1 + R _C2-2 ”. However, the value of R _A1 or T _X1 of the one-stage resistance change type phase change material _{depends on} the value of R _A2 , T _x2-1 , T _x2-2 of the two-stage resistance change type phase change material. The phase change material can be changed as appropriate by changing the composition or material of the phase change material. For example, the values of R _A1 and T _x1 can be appropriately changed by changing the composition ratio of Ge and Te in the GeTe-based material.

On the other hand, when T _x1 is larger than T _x2-1 and T _x2-2 , that is, when the temperature is high (Comparative Example 4 and Comparative Example 5), the current / voltage applied to crystallize the one-stage resistance change type phase change material The two-stage resistance change type phase change material is also crystallized by the pulse, and the above-described four-stage electric resistance state cannot be realized. Therefore, when R _A1 > R _A2 , T _{x1 needs} to be smaller than T _x2-1 and T _x2-2 , that is, a low temperature (Example 4).

Example 5 is a two-stage variable resistance phase change material, and there is a crystallization temperature between the first crystallization temperature and the second crystallization temperature of the two-stage variable resistance material, and the electrical resistance of the amorphous phase Is a combination of a two-stage resistance change type phase change material and a one-stage resistance change type material that is lower than the electrical resistance of the amorphous phase. Specifically, it is a combination of Ge _28.8 Cu _23.4 Te _47.8 and Ga ₂₄ Sb ₇₆ . In this case, the two-stage resistance change type phase change material and the one-stage resistance change type phase change material have, for example, a relationship between a curve M2 and a curve M1 shown in FIG. However, in FIG. 6, the vertical axis, the horizontal axis, and the respective symbols are the same as those in FIG. 2A. As shown in Example 5, when R _A1 <R _A2 and T _x2-1 <T _x1 <T _x2-2 , “R _A1 + R _A2 ”, “R _A1 + R _C2-1 ”, “R _C1 + R _{C2” −1} ”and“ R _C1 + R _C2-2 ”realizes a four-stage electrical resistance state. However, it is "R _A1 + R _A2 ">"R _A1 + R _C2-1 ">"R _C1 + R _C2-1 ">"R _C1 + R _C2-2 ". However, also in this case, the values of R _A1 and T _x1 of the one-stage resistance change type phase change material _{depend on} the values of R _A2 , T _x2-1 , and T _x2-2 of the two-stage resistance change type phase change material. By changing the composition or material of the one-step resistance change type phase change material, it can be changed as appropriate. For example, the values of R _A1 and T _x1 can be appropriately changed by changing the composition ratio of Ga and Sb of the GaSb-based material.

On the other hand, in the case of R _A2 > R _A1 and T _x1 > T _x2-2 > T _x2-1 (Comparative Example 6), the four-stage electrical resistance states are “R _A1 + R _A2 ”, “R _A1 + R”. _C2-1 ”,“ R _A1 + R _C2-2 ”, and“ R _C1 + R _C2-2 ”are conceivable, but the second crystal phase is the same regardless of whether the two-stage variable resistance phase change material is the first crystal phase. Anyway, since the overall electrical resistance is determined by the electrical resistance of the amorphous phase of the one-stage resistance change type phase change material, there is a significant difference between “R _A1 + R _C2-1 ” and “R _A1 + R _C2-2 ”. There is no difference in electrical resistance, and only three levels of electrical resistance can be obtained. Similarly, in the case of R _A2 > R _A1 and T _x2-2 > T _x2-1 > T _x1 (Comparative Example 7), the four-stage electrical resistance states are “R _A1 + R _A2 ”, “R _C1 + R”. _A2 ”,“ R _C1 + R _C2-1 ”, and“ R _C1 + R _C2-2 ”are conceivable, but the two-stage resistance variable phase, whether the one-stage resistance variable phase change material is an amorphous phase or a crystalline phase. Since the overall electrical resistance is determined by the electrical resistance of the amorphous phase of the change material, there is no significant difference in resistance between “R _A1 + R _A2 ” and “R _C1 + R _A2 ”. Only the state of resistance can be obtained.

From the above, when R _A1 > R _A2 and T _x1 <T _x2-1 <T _x2-2 (Example 4), or R _A1 <R _A2 and T _x2-1 <T _x1 <T _{x2 − In} the case of ₂ (Example 5), it can be seen that a four-stage state of electrical resistance can be realized by a combination of a one-stage resistance change type phase change material and a two-stage resistance change type phase change material.

  Using the combination of materials shown in Example 4 and Example 5, the phase change due to the pulse voltage application was investigated. FIG. 7 is a schematic cross-sectional view showing the structure of the multilevel recording phase change memory cell used in this experiment. The multilevel recording phase change memory cell includes a semiconductor substrate 1, an insulator layer 2 provided on the semiconductor substrate 1, a first electrode layer 3 as a lower electrode provided on the insulator layer 2, 1st phase change layer 5 provided on 1 electrode layer 3, 2nd phase change layer 6 provided on 1st phase change layer 5, 1st phase change layer 5 and 2nd An insulating layer 4 provided so as to surround the phase change layer 6 and a second electrode layer 7 as an upper electrode provided on the second phase change layer 6.

The multilevel recording phase change memory cell shown in FIG. 7 was manufactured as follows. First, a W film as an electrode material was formed by a sputtering method on a substrate in which SiO ₂ as an insulator layer ₂ was laminated on a Si substrate as a semiconductor substrate 1. And the 1st electrode layer 3 was formed by shape | molding the film | membrane of W with the photolithographic method. Next, a film of a one-stage resistance change type phase change material and a film of a two-stage resistance change type phase change material was formed in a total thickness of 200 nm on the first electrode layer 3 by a sputtering method. And the 1st phase change layer 5 and the 2nd phase change layer 6 were formed by shape | molding the laminated film with the photolithographic method. Here, the material of Example 4 or Example 5 of FIG. 5 was used as the two-stage resistance change type phase change material. Next, a film of SiO ₂ was formed as an insulator film so as to cover the first phase change layer 5, the second phase change layer 6, and the first electrode layer 3. Then, the SiO ₂ film was polished by a CMP (Chemical Mechanical Polishing) method to cue the second phase change layer 6. Thereby, the SiO ₂ insulator layer 4 was formed so as to surround the first phase change layer 5 and the second phase change layer 6. Thereafter, a W film was formed as an electrode material by sputtering so as to cover second phase change layer 6 and insulator layer 4. And the 2nd electrode layer 7 was formed by shape | molding the film | membrane of W with the photolithographic method. The first phase change layer 5 and the second phase change layer 6 may be either a one-stage resistance change type phase change material and either may be a two-stage resistance change type phase change material.

FIG. 8A shows four electric resistances obtained by the pulse voltage application experiment in the case where the material of Example 4 in FIG. 5 is used as the material of the first phase change layer 5 and the second phase change layer 6. Indicates the state. Here, the experiment was performed by fixing the voltage pulse width to 50 μs and gradually changing the voltage. As shown in the figure, it changes to four resistance states with voltage application, and it can be seen that a sufficient difference in electrical resistance is obtained between the states. Here, (R _A1 ) is the electric resistance of the amorphous phase of the one-stage resistance change type phase change material, (R _C1 ) is the electric resistance of the crystal phase of the one-stage resistance change type phase change material, and (R _A2 ) is the two-stage resistance change. The electrical resistance of the amorphous phase of the type phase change material, (R _C2-1 ) is the electrical resistance of the first crystal phase of the two-stage resistance change type phase change material, and (R _C2-2 ) is the two-stage resistance change type phase change. It is the electrical resistance of the second crystalline phase of the material.

  On the other hand, FIG. 8B shows four electric currents obtained by the pulse voltage application experiment in the case where the material of Example 5 in FIG. 5 is used as the material of the first phase change layer 5 and the second phase change layer 6. Indicates the state of resistance. Also in this case, as shown in the figure, it changes to four resistance states with voltage application, and it can be seen that a sufficient difference in electrical resistance is obtained between the states.

  The structure of the multi-value recording phase change memory cell is not limited to the embodiment of FIG. 7, and may have other structures. FIG. 9 is a schematic cross-sectional view showing the structure of a multilevel recording phase change memory cell according to another embodiment. The multilevel recording phase change memory cell includes a semiconductor substrate 8, an insulator layer 9 provided on the semiconductor substrate 8, a first electrode layer 10 as a lower electrode provided on the insulator layer 9, Exothermic electrode layer 12 provided on one electrode layer 10, first phase change layer 14 provided on exothermic electrode layer 12, and exothermicity provided on first phase change layer 14 Electrode layer 13, second phase change layer 15 provided on exothermic electrode layer 13, exothermic electrode layer 12, first phase change layer 14, exothermic electrode layer 13 and second phase change layer 15, an insulating layer 11 provided so as to surround 15, and a second electrode layer 16 as an upper electrode provided on the second phase change layer 15.

  The multistage phase change material of the present invention, that is, the two-stage resistance change type phase change material has a small volume change and can have three electrical resistance states while being a single material. A combination of phase change materials can achieve four levels of electrical resistance. Therefore, these phase change materials can be used for a highly reliable and highly integrated nonvolatile memory.

  The present invention has been described above based on the embodiments and examples. However, the present invention is not limited to the descriptions of the above embodiments and examples, and other modifications within the scope of the technical idea of the present invention. Naturally, examples, embodiments and the like are included.

Claims (6)

A first phase change layer formed of a phase change material that exhibits a one-step change in electrical resistance with increasing temperature;
A second phase change layer formed of a multi-stage phase change material that exhibits a two-step change in electrical resistance with increasing temperature;
Comprising a memory layer comprising:
The multistage phase change material is:
General chemical formula,
Ge _x Cu _y Te _100-xy
Wherein x is 18.0 (at.%) Or more and 36.0 (at.%) Or less, y is 16.0 (at.%) Or more, 32.0 (at A multi-stage phase change material selected such that 45 (at.%) ≦ x + y ≦ 55 (at.%) Within the following range:
The electrical resistance of the first phase change layer changes in one stage at a temperature lower than the temperature at which the first stage electrical resistance change occurs in the second phase change layer,
A multilevel recording phase change memory element capable of writing quaternary information, wherein an amorphous phase electrical resistance of the first phase change layer is higher than an amorphous phase electrical resistance of the second phase change layer.   The multi-value recording phase change memory device according to claim 1, wherein the phase change material includes a GeTe-based material. A first phase change layer formed of a phase change material that exhibits a one-step change in electrical resistance with increasing temperature;
A second phase change layer whose electrical resistance is formed by a multi-stage phase change material shows the change in the two-step with increasing temperature,
Comprising a memory layer comprising:
The multistage phase change material is:
General chemical formula,
Ge _x Cu _y Te _100-xy
Wherein x is 18.0 (at.%) Or more and 36.0 (at.%) Or less, y is 16.0 (at.%) Or more, 32.0 (at A multi-stage phase change material selected such that 45 (at.%) ≦ x + y ≦ 55 (at.%) Within the following range:
The electrical resistance of the first phase change layer is a temperature between a temperature at which the first stage electrical resistance change occurs and a temperature at which the second stage electrical resistance change occurs in the second phase change layer. The electrical resistance changes in one step,
A multilevel recording phase change memory element capable of writing quaternary information, wherein the electrical resistance of the amorphous phase of the first phase change layer is lower than the electrical resistance of the amorphous phase of the second phase change layer.   The multi-level recording phase change memory element according to claim 3, wherein the phase change material includes a GaSb-based material. The memory layer is a laminate of the first phase change layer and the second phase change layer,
5. The multi-value recording phase according to claim 1, wherein the stacked body is disposed between a first electrode layer and a second electrode layer for energizing the memory layer. 6. Change memory element.   The multilevel recording phase change memory element according to claim 5, wherein another electrode layer is disposed between the first phase change layer and the second phase change layer.

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