JP6041731B2 - インターポーザ、及び電子部品パッケージ - Google Patents
インターポーザ、及び電子部品パッケージ Download PDFInfo
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- JP6041731B2 JP6041731B2 JP2013067463A JP2013067463A JP6041731B2 JP 6041731 B2 JP6041731 B2 JP 6041731B2 JP 2013067463 A JP2013067463 A JP 2013067463A JP 2013067463 A JP2013067463 A JP 2013067463A JP 6041731 B2 JP6041731 B2 JP 6041731B2
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- 239000000758 substrate Substances 0.000 claims description 136
- 230000003014 reinforcing effect Effects 0.000 claims description 64
- 239000000853 adhesive Substances 0.000 claims description 34
- 230000001070 adhesive effect Effects 0.000 claims description 34
- 238000004519 manufacturing process Methods 0.000 claims description 14
- 238000010030 laminating Methods 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 description 39
- 238000000034 method Methods 0.000 description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 20
- 229910052710 silicon Inorganic materials 0.000 description 20
- 239000010703 silicon Substances 0.000 description 20
- 229910004298 SiO 2 Inorganic materials 0.000 description 19
- 229920005989 resin Polymers 0.000 description 16
- 239000011347 resin Substances 0.000 description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 15
- 229910052814 silicon oxide Inorganic materials 0.000 description 15
- 239000010949 copper Substances 0.000 description 13
- 229910052581 Si3N4 Inorganic materials 0.000 description 12
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 12
- 230000035882 stress Effects 0.000 description 12
- 239000010931 gold Substances 0.000 description 11
- 229910045601 alloy Inorganic materials 0.000 description 10
- 239000000956 alloy Substances 0.000 description 10
- 238000005229 chemical vapour deposition Methods 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 10
- 238000009713 electroplating Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 229910052802 copper Inorganic materials 0.000 description 9
- 238000012986 modification Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 8
- 229910052718 tin Inorganic materials 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 229920001187 thermosetting polymer Polymers 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 3
- 239000005388 borosilicate glass Substances 0.000 description 3
- 238000007772 electroless plating Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- -1 thickness Substances 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 150000001336 alkenes Chemical class 0.000 description 2
- 229920006332 epoxy adhesive Polymers 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- JRZJOMJEPLMPRA-UHFFFAOYSA-N olefin Natural products CCCCCCCC=C JRZJOMJEPLMPRA-UHFFFAOYSA-N 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910018503 SF6 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- KGBXLFKZBHKPEV-UHFFFAOYSA-N boric acid Chemical compound OB(O)O KGBXLFKZBHKPEV-UHFFFAOYSA-N 0.000 description 1
- 239000004327 boric acid Substances 0.000 description 1
- 238000000708 deep reactive-ion etching Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000002787 reinforcement Effects 0.000 description 1
- RMAQACBXLXPBSY-UHFFFAOYSA-N silicic acid Chemical compound O[Si](O)(O)O RMAQACBXLXPBSY-UHFFFAOYSA-N 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/467—Adding a circuit layer by thin film methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
[第1の実施の形態に係るインターポーザの構造]
まず、第1の実施の形態に係るインターポーザの構造について説明する。図1は、第1の実施の形態に係るインターポーザを例示する図であり、図1(a)が断面図、図1(b)が平面図である。
次に、第1の実施の形態に係るインターポーザの製造方法について説明する。図2〜図5は、第1の実施の形態に係るインターポーザの製造工程を例示する図である。なお、本実施の形態では、シリコンウェハ等を用いて複数のインターポーザとなる部分を作製後、個片化して各インターポーザとする工程の例を示すが、単品のインターポーザを作製する工程としてもよい。又、シリコンに代えてガラス(例えば、硼珪酸ガラス)等を用いてもよい。
図1に示すインターポーザ1を実際に作製し、反り量の測定を行った。なお、比較例1として、補強部材3を設けない図1の配線部材2のみのサンプルを作製し、反り量の測定を行った。又、比較例2として、図1の補強部材3に代えて、表面にシリコン酸化膜が形成されたシリコン基板のみ(図1の無機基板11、無機絶縁層12、及び第1無機絶縁膜25aのみ)を設けたサンプルを作製し、反り量の測定を行った。
第1の実施の形態の変形例1では、補強部材3を複数の部位から構成する例を示す。なお、第1の実施の形態の変形例1において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第2の実施の形態では、インターポーザ1にMEMS素子や半導体素子等の電子部品を実装した電子部品パッケージの例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部品についての説明は省略する。
第3の実施の形態では、電子部品パッケージ1Bを有機配線基板上に実装する例を示す。なお、第3の実施の形態において、既に説明した実施の形態と同一構成部品についての説明は省略する。
1B 電子部品パッケージ
2 配線部材
3 補強部材
3x、13x、15x、17x、19x、25x、27x 開口部
4 接着部
11 無機基板
11x 凹部
11z 貫通孔
12、13、15、17、19、25 無機絶縁層
13a、15a、17a、19a、25a 第1無機絶縁膜
13b、15b、17b、19b、25b 第2無機絶縁膜
14、16、18、20、26、28 配線層
21 金属層
27 有機絶縁層
51、61 電子部品
52 突起電極
53、81 接合部
54、82 アンダーフィル樹脂
70 有機配線基板
71 パッド
100 接着材
110 支持体
Claims (6)
- 第1無機基板を備えた配線部材と、接着部を介して前記配線部材上に接着された、第2無機基板を備えた補強部材と、を有し、
前記第1無機基板の前記接着部側の面には、第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層と配線層とが各々複数層積層され、前記第1無機基板の前記接着部側とは反対側の面には第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層と配線層と有機絶縁層とが積層され、
前記第2無機基板の前記接着部側の面には、第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層が複数層積層され、前記第2無機基板の前記接着部側とは反対側の面には第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層と有機絶縁層とが積層され、
前記補強部材には、前記第2無機基板、前記第2無機基板の両面に積層された前記無機絶縁層、及び前記有機絶縁層を貫通する開口部が設けられ、
前記第1無機基板の前記接着部側の前記無機絶縁層と、前記第2無機基板の前記接着部側の前記無機絶縁層とは同一層構成であって、前記接着部を中心として上下対称に配置され、
前記第1無機基板の前記接着部側とは反対側の前記無機絶縁層及び前記有機絶縁層と、前記第2無機基板の前記接着部側とは反対側の前記無機絶縁層及び前記有機絶縁層とは同一層構成であって、前記接着部を中心として上下対称に配置され、
前記第1無機基板及び前記第2無機基板の各々の前記接着部側とは反対側の最外絶縁層は有機絶縁層であるインターポーザ。 - 前記第1無機基板と前記第2無機基板とは同一の厚さであり、
前記接着部を中心として上下対称に配置された絶縁層同士は、同一の厚さである請求項1記載のインターポーザ。 - 前記補強部材は、前記配線部材の一方の側の外縁部に配置された枠状の部材であり、
前記補強部材の内側には電子部品搭載用のパッドとなる配線層が露出している請求項1又は2記載のインターポーザ。 - 請求項3記載のインターポーザの前記電子部品搭載用のパッドに電子部品が実装された電子部品パッケージ。
- 第1無機基板の両面に配線層及び絶縁層が設けられた配線部材を作製する工程と、
第2無機基板の両面に絶縁層が設けられた補強部材を作製する工程と、
前記配線部材上に接着部を介して前記補強部材を接着する工程と、を有し、
前記配線部材を作製する工程では、前記第1無機基板の一方の面側に、第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層と配線層とを各々複数層積層し、前記第1無機基板の他方の面側に第1無機絶縁膜及び第2無機絶縁膜を含む無機絶縁層と配線層と最外絶縁層となる有機絶縁層とを積層し、
前記補強部材を作製する工程では、前記第1無機基板の両面に設けられた絶縁層と同一層構成となるように、前記第2無機基板の両面に絶縁層を形成し、前記第2無機基板、前記第2無機基板の両面に積層された前記無機絶縁層、及び前記有機絶縁層を貫通する開口部を設け、
前記補強部材を接着する工程では、前記補強部材の前記有機絶縁層と前記配線部材の前記有機絶縁層が各々前記接着部側とは反対側を向くように、前記配線部材上に接着部を介して前記補強部材を接着するインターポーザの製造方法。 - 前記配線部材を作製する工程は、
前記第1無機基板の一方の側に、第1の温度で無機絶縁層を成膜する工程と、
前記第1無機基板の他方の側を研磨して薄型化する工程と、
前記第1無機基板の一方の側の前記無機絶縁層上に、接着材を介して支持体を仮接着する工程と、
前記第1無機基板の他方の側に第2の温度で硬化する有機絶縁層を形成する程と、を有し、
前記第1の温度は前記接着材の耐熱温度よりも高く、前記第2の温度は前記接着材の耐熱温度よりも低い請求項5記載のインターポーザの製造方法。
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