JP5991020B2 - Semiconductor device mainly composed of silicon carbide single crystal - Google Patents

Description

  In this specification, there is a range in which a switching element for switching on and off is formed by a trench gate electrode and a range in which a diode using a trench Schottky electrode is formed, and a silicon carbide single crystal is mainly used. A semiconductor device as a material is disclosed.

2. Description of the Related Art A semiconductor device using a silicon carbide single crystal having a high dielectric breakdown strength as a main material is known. One type of semiconductor device is a semiconductor device that includes a trench gate electrode and is formed with a switching element that switches between an on state and an off state by switching a voltage applied to the trench gate electrode. Further, a semiconductor device is known that also has a diode that allows a reflux current generated when the switching element is turned off to flow. An example of the above semiconductor device is described in Examples 8 to 10 of Patent Document 1 (paragraphs 0122 to 0173 and FIGS. 50 to 68).
In the above semiconductor device, the drain electrode of the switching element also serves as the cathode electrode of the diode, and the source electrode of the switching element also serves as the anode electrode of the diode. In the semiconductor device described above, the switching element exhibits a switching function when the drain potential is higher than the source potential. When the switching element is on, a current flows between the drain and the source, and when the switching element is off, the drain In addition to preventing current from flowing between the sources, the diode is required to have a characteristic that a forward current flows through the diode when the source potential is higher than the drain potential.
In the case of the above semiconductor device, if the switching element is off, it is necessary to prevent a current from flowing between the drain and the source even if the voltage difference between the drain and the source is large. In this specification, the voltage difference between the drain and the source when the off state is lost and a current flows between the drain and the source even though the switching element is off is referred to as a breakdown voltage. The voltage applied to the circuit that is turned on / off by the switching element is increasing, and the withstand voltage required for the semiconductor device is increasing.

JP 2009-302510 A

  The voltage that can be turned on and off in the semiconductor device of Patent Document 1 is still insufficient, and the drain current increases if the drain voltage is increased even when the semiconductor device is turned off. This specification discloses a technique for realizing a semiconductor device in which the drain current does not increase even if the drain voltage is increased if the breakdown voltage of the semiconductor device is increased and the semiconductor device is turned off.

  In order to increase the breakdown voltage of the semiconductor device, the reason why the drain current increases when the drain voltage is increased even when the semiconductor device is turned off was studied. As a result, an electric field concentration region is formed in an n-type single crystal layer (a layer that functions as a so-called breakdown voltage layer) located around the Schottky electrode, and an avalanche breakdown occurs in the electric field concentration region. Was found to increase. The semiconductor device disclosed in this specification includes means for preventing the occurrence of avalanche breakdown.

The semiconductor device disclosed in this specification includes an n-type single crystal layer of silicon carbide and a p-type single crystal layer of silicon carbide stacked on the n-type single crystal layer. Further, the trench penetrates the p-type single crystal layer from the surface of the p-type single crystal layer to reach the n-type single crystal layer and is insulated from the n-type single crystal layer and the p-type single crystal layer by the gate insulating film. A gate electrode and an n-type single crystal region of silicon carbide formed at a position facing the trench gate electrode through a gate insulating film and separated from the n-type single crystal layer by a p-type single crystal layer . Furthermore, a trench Schottky electrode penetrating the p-type single crystal layer from the surface of the p-type single crystal layer and reaching the n-type single crystal layer, and a region facing a range where the outer shape of the trench Schottky electrode is bent A p-type single crystal region of silicon carbide formed in the n-type single crystal layer.
Note that the n-type expression here is not limited to the impurity concentration. It is a general term for so-called n ⁻ type to n ⁺ type. The same applies to the p-type.

In the range where the trench gate electrode and the n-type single crystal region are formed, the n-type single crystal region becomes the source region, the p-type single crystal layer becomes the body layer, the n-type single crystal layer becomes the breakdown voltage layer, and the trench gate electrode With this potential, the state where the inversion region is formed in the p-type single crystal region in the range facing the trench gate electrode and the state where the inversion region is not formed are switched. A switching element region that is switched between a conductive state and a non-conductive state is formed between the n-type source region and the n-type breakdown voltage layer.
In the range where the trench Schottky electrode and the n-type single crystal layer are formed, when a Schottky diode is formed and a higher potential is applied to the source electrode also serving as the anode electrode than the drain electrode also serving as the cathode electrode, A forward current flows. When a higher potential is applied to the drain electrode than the source electrode, current is prevented from flowing between the trench Schottky electrode and the n-type single crystal layer.
When the p-type single crystal region is not formed in the n-type single crystal layer, the drain current increases when a high potential is applied to the drain electrode. As a result of research, as described above, when a high potential is applied to the drain electrode, an electric field concentration region is formed in the n-type single crystal layer around the Schottky electrode, and an avalanche breakdown occurs in the electric field concentration region. It has been found that the drain current increases for this reason. In particular, an electric field concentration region is formed in the n-type single crystal layer in a region facing the range where the outer shape of the trench Schottky electrode is bent (the range where the trench Schottky electrode is bent from the side surface to the bottom surface). It has been found.
In the semiconductor device disclosed in this specification, a p-type single crystal region is formed in an n-type single crystal layer in a region facing the range where the outer shape of the trench Schottky electrode is bent. When the p-type single crystal region is formed at the above position, the electric field concentration is relaxed and the occurrence of avalanche breakdown is suppressed. As a result, even when a high potential is applied to the drain electrode, no avalanche breakdown occurs and the drain current does not increase.
In the semiconductor device disclosed in this specification, since the p-type single crystal region is formed in the n-type single crystal layer, if the semiconductor device is turned off, the drain current does not increase even if the drain voltage is increased. The breakdown voltage of the semiconductor device can be increased.

The bottom surface of the trench Schottky electrode is preferably shallower than the bottom surface of the trench gate electrode.
In the state where the semiconductor device is turned off, a depletion layer spreads in the n-type single crystal from the interface between the n-type single crystal layer and the p-type single crystal layer in the range where the trench gate electrode is formed. If the bottom surface of the trench Schottky electrode is shallower than the bottom surface of the trench gate electrode, the depletion layer smoothly extends downward from the trench Schottky electrode, which advantageously works to prevent avalanche breakdown.

The bottom surface of the trench Schottky electrode may coincide with the bottom surface of the p-type single crystal layer or may be deeper than that.
In this case, the trench Schottky electrode is in direct contact with the n-type single crystal layer. A stable Schottky effect can be obtained.

  It is preferable that the p-type single crystal region extends from a shallow level to a deeper level than the bottom surface of the trench gate electrode. In this case, the depletion layer formed in the n-type single crystal layer in the range where the trench gate electrode exists extends toward the lower side of the p-type single crystal region, which advantageously works to prevent avalanche breakdown.

When one chip is viewed in plan, the total area of the trench gate electrodes is preferably larger than the total area of the trench Schottky electrodes.
The characteristics of the Schottky diode are mainly determined by the area of the drain electrode (also used as the cathode electrode). The formation area of the trench Schottky electrode does not significantly affect the characteristics of the Schottky diode. On the other hand, the characteristics of the switching element are greatly influenced by the formation area of the trench gate electrode. Therefore, when the area of one chip is limited, it is advantageous to increase the formation area of the trench gate electrode and reduce the formation area of the trench Schottky electrode in order to make the characteristics of the switching element and the diode compatible. . That is, the total area of the trench gate electrode is preferably larger than the total area of the trench Schottky electrode.

  According to the technique described in this specification, the p-type single crystal region is formed in the n-type single crystal layer in the region facing the range where the outer shape of the trench Schottky electrode is bent. The electric field concentration formed in the n-type single crystal layer existing around the trench Schottky electrode when in the off state is alleviated, and the occurrence of avalanche breakdown is suppressed. The breakdown voltage of the semiconductor device can be increased by utilizing the high breakdown electric field of silicon carbide.

2 is a partial cross-sectional view of the semiconductor device of Example 1. FIG. FIG. 3 is a plan view of the semiconductor device according to the first embodiment. FIG. 4 is a diagram in which an electric field distribution is added to the cross-sectional view of the semiconductor device of Example 1. The figure which shows the relationship between drain voltage and drain current. The enlarged view of FIG. FIG. 10 is a partial cross-sectional view of the semiconductor device of Example 2. FIG. 6 is a plan view of the semiconductor device according to the second embodiment. FIG. 6 is a plan view of a semiconductor device according to Example 3. 3 is a diagram three-dimensionally illustrating the structure of a semiconductor device of Example 3. FIG. FIG. 6 is a plan view of a semiconductor device according to a fourth embodiment. FIG. 10 is a plan view of a semiconductor device according to a fifth embodiment.

The main features of the embodiments described below are exemplified below. Each feature exhibits advantages by combining with other features, and also exhibits independent advantages by the features themselves.
(Feature 1) The source electrode also serves as the anode electrode, and the drain electrode also serves as the cathode electrode.
(Feature 2) The source electrode is electrically connected to the body layer through the body contact region, is electrically connected to the source region, and is electrically connected to the Schottky electrode.
(Feature 3) The Schottky electrode has a columnar shape having a side surface and a bottom surface, and a p-type single crystal region is formed along a boundary that transitions from the side surface to the bottom surface.
(Feature 4) In addition to the p-type single crystal region of Feature 3, a p-type single crystal region in contact with the bottom surface of the Schottky electrode (not in contact with the side surface) is formed.

FIG. 1 illustrates a part of a cross-sectional view of the semiconductor device according to the first embodiment. The range of A shown in the figure is used as a unit, and the unit is repeated a plurality of units in the horizontal direction shown in the drawing. Reference numeral 10 is a drain electrode (also serving as a cathode electrode), 8 is an n ⁺ type single crystal layer, 6 is an n ⁻ type single crystal layer, 24 is a p ⁻ type single crystal region, and 4 is a p ⁻ type single crystal. 14 is a p ⁺ type single crystal region, 16 is an n ⁺ type single crystal region, 22 is a gate insulating film, 20 is a trench gate electrode, 18 is an interlayer insulating film, 12 is a trench Schottky electrode, 2 is a source electrode ( It also serves as the anode electrode). The single crystal layer and the single crystal region are formed of a single crystal of silicon carbide. The p-type single crystal layer 4 is stacked on the n-type single crystal layer 6.
Trench gate electrode 20 penetrates p-type single crystal layer 4 from the surface of p-type single crystal layer 4 and reaches n-type single crystal layer 6. Trench gate electrode 20 is insulated from n-type single crystal layer 6 and p-type single crystal layer 4 by gate insulating film 22.
The Schottky electrode 12 also reaches the n-type single crystal layer 6 through the p-type single crystal layer 4 from the surface of the p-type single crystal layer 4. Schottky electrode 12 is not covered with an insulating layer.
The n-type single crystal region 16 is opposed to the trench gate electrode 20 through the insulating film 22 and is formed at a position separated from the n-type single crystal layer 6 by the p-type single crystal layer 4.

Usually, a high potential is applied to the drain electrode 10 and the source electrode 2 is grounded via a load. In this state, no current flows between the n-type single crystal layer 6 and the Schottky electrode 12. When the potential of the trench gate electrode 20 is low, the n-type single crystal region 16 and the n-type single crystal layer 6 are insulated by the p-type single crystal layer 4. If the potential of the trench gate electrode 20 is high, the portion of the p-type single crystal layer 4 facing the trench gate electrode 20 is inverted to the n-type, and the gap between the n-type single crystal region 16 and the n-type single crystal layer 6 is Conduct. The semiconductor structure formed in the range B where the n-type single crystal region 16 and the trench gate electrode 20 are formed operates as a switching element (MOSFET). The n-type single crystal region 16 functions as a source region, the p-type single crystal region 14 functions as a body contact region, the p-type single crystal layer 4 functions as a body layer, and the n-type single crystal layer 6 has a drift layer ( The n-type single crystal layer 8 functions as a drain contact layer.
When the load for turning on / off the current by the switching element has an inductive component, the source electrode (anode electrode) 2 is more than the drain electrode (cathode electrode) 10 by the inductive component of the load when the current is turned off by the switching element. A high potential may be applied. In this case, a current flows between the source electrode (anode electrode) 2 and the drain electrode (cathode electrode) 10. The semiconductor structure formed in the range C in which the trench Schottky electrode 12 is formed and the p-type single crystal layer 4 is removed operates as a Schottky diode. The Schottky diode prevents an excessive voltage from being applied to the element.

When the drain electrode 10 is at a high potential, the source electrode 2 is grounded, and the potential of the trench gate electrode 20 is low, an n-type single crystal is formed from the interface between the p-type single crystal layer 4 and the n-type single crystal layer 6. A depletion layer spreads in the layer 6 and the depletion layer increases the breakdown voltage. In that case, an electric field develops in the n-type single crystal layer 6. As the potential of the drain electrode 10 increases, the electric field concentration in the n-type single crystal layer 6 becomes more prominent.
If the electric field is excessively concentrated, an avalanche breakdown occurs at the electric field concentration point, and the drain current increases. When the potential of the drain electrode 10 rises, the switching element cannot maintain the off state. As a result of research, electric field concentration develops in the position where the side surface and bottom surface of the Schottky electrode 12 are in contact, that is, in the vicinity of the range where the outer shape of the Schottky electrode 12 is bent, and avalanche breakdown occurs. It was found to occur.
X in FIG. 3 indicates a position where electric field concentration develops and avalanche breakdown occurs.

In this embodiment, a p-type single crystal region 24 is formed in the n-type single crystal layer 6 in order to prevent the above phenomenon from occurring. The p-type single crystal region 24 is formed in the vicinity of the position where the side surface and the bottom surface of the Schottky electrode 12 are in contact with each other, and covers the position where the side surface and the bottom surface are in contact with each other. A p-type single crystal region 24 is formed so as to include the position X in FIG. The impurity concentration of the p-type single crystal region 24, p ^- type single-impurity concentration in the crystal layer 4 is equal to or p ^- is preferably slightly darker than type single crystal layer 4.
When the p-type single crystal layer 24 is formed at the above position, the development of the electric field concentration shown in FIG. 3 is suppressed, and the occurrence of avalanche breakdown can be prevented.

In this embodiment, the depth increases in the following order.
a) Boundary a between p-type single crystal layer 4 and n-type single crystal layer 6 (the shallowest part of p-type single crystal region 24)
b) Boundary b between trench Schottky electrode 12 and n-type single crystal layer 6
c) Boundary c between trench gate electrode 20 and n-type single crystal layer 6 (thickness of insulating film 22 is thin)
d) The deepest part of the p-type single crystal region 24.
When level b is shallower than level c and level d is deeper than level c, a depletion layer extending from the boundary between p-type single crystal layer 4 and n-type single crystal layer 6 into n-type single crystal layer 6 becomes p-type. Widely spreads below the single crystal region 24 and the trench Schottky electrode 12. This also suppresses the development of the electric field concentration shown in FIG.

A curve C1 in FIG. 4 shows the relationship between the drain voltage (the source electrode 2 is grounded) and the current flowing between the drain electrode 10 and the source electrode 2 (drain current) in the case of the semiconductor device of this embodiment. ing. Even if the drain voltage becomes 1000 volts or more, the drain current does not increase. It is confirmed that it has a high pressure resistance.
Curves C2 and C3 in FIG. 4 show the relationship between the drain voltage and the drain current when the p-type single crystal region 24 is not formed. A curve C3 shows the result when the boundary b between the trench Schottky electrode 12 and the n-type single crystal layer 6 is deeper than the boundary c between the trench gate electrode 20 and the n-type single crystal layer 6. Curve C2 shows the result when the boundary b between the trench Schottky electrode 12 and the n-type single crystal layer 6 is equal to the boundary c between the trench gate electrode 20 and the n-type single crystal layer 6. FIG. 5 shows an enlarged view of the horizontal axis in the range V in FIG. In the case of the curve C3, the drain current increases when the drain voltage is 100 volts or less. It can be seen that the breakdown voltage decreases when the boundary b between the trench Schottky electrode 12 and the n-type single crystal layer 6 is deeper than the boundary c between the trench gate electrode 20 and the n-type single crystal layer 6. Even in the curve C2, the drain current increases when the drain voltage is 200 volts or less. It is confirmed that the breakdown voltage of the semiconductor device is not ensured if the p-type single crystal region 24 is not formed.

  FIG. 2 is a plan view of the semiconductor device (for one chip) at the height at which the trench gate electrode 20 and the trench Schottky electrode 12 exist. Two columns in which the trench gate electrode 20 and the trench Schottky electrode 12 appear alternately are prepared. Reference numeral 26 is the outline of the semiconductor substrate for one chip, 28 is the boundary between the element region and the peripheral region, and 30 is the gate pad. The gate pad 30 is connected to the trench gate electrode 20. A source electrode 2 is formed in the area where the trench gate electrode 20 and the trench Schottky electrode 12 exist. The source electrode 2 and the trench gate electrode 20 are insulated by an interlayer insulating film 18.

  The characteristics of the Schottky diode are mainly determined by the area of the drain electrode (also serving as the cathode electrode) 10. The formation area of the trench Schottky electrode (area in the range of C in FIG. 1) does not significantly affect the characteristics of the Schottky diode. On the other hand, the characteristics of the switching element are greatly influenced by the formation area of the trench gate electrode (area in the range B in FIG. 1). Therefore, when the area of one chip is limited, in order to make the characteristics of the switching element and the diode compatible, the area of the trench gate electrode formation range (range B in FIG. 1) is increased, and the trench Schottky electrode It is advantageous to reduce the area of the formation range (C range in FIG. 1).

  The embodiment of FIGS. 6 and 7 shows an embodiment in which trench Schottky electrodes 12 are formed on both sides of the eight trench gate electrodes 20. Compared to the case shown in FIG. 1, the area of the trench gate electrode formation range (range B in FIG. 1) is larger and the area of the trench Schottky electrode formation range (range C in FIG. 1) is narrower. Nevertheless, the characteristics required for the Schottky diode can be ensured, and the characteristics of the switching element can be improved. The ratio of the area of the formation range of the trench gate electrode (range B in FIG. 1) to the area of the formation range of the trench Schottky electrode (range C in FIG. 1) is the characteristic required for the Schottky diode and the switching element. It can be adjusted to an appropriate value from the required characteristics.

  When the bottom surface of the trench Schottky electrode 12 is wide, a plurality of p-type single crystal regions 24a, 24b, 24c... Are intermittently formed along the bottom surface of the trench Schottky electrode 12, as shown in FIG. It is useful to form. In this case, the electric field concentration can be prevented from developing in a wide range along the bottom surface of the trench Schottky electrode 12.

In the above embodiment, the trench gate electrode and the trench Schottky electrode extend on the stripe. The shape of the trench gate electrode and the trench Schottky electrode can take various forms.
FIG. 8 shows a case where the trench gate electrode 20 makes a round along the outer periphery of the chip 26 and the Schottky electrode 12 is formed in the central opening. The boundary between the side surface and the bottom surface of the Schottky electrode 12 is a quadrangular shape in plan view. As shown in FIG. 9, the p-type single crystal region 24 is formed in a range along the quadrangular outline. Also according to this embodiment, the development of electric field concentration can be prevented, the occurrence of avalanche breakdown can be prevented, and the breakdown voltage of the semiconductor device can be improved.
FIG. 10 shows an embodiment in which a plurality of unit structures shown in FIGS. 8 and 9 are arranged in one chip. In this case, the Schottky electrode is formed in the single crystal region surrounded by the continuous trench gate electrode.
FIG. 11 illustrates a case where the planar shape of the single crystal region surrounded by the trench gate electrode is an octagon. The shape of the trench gate electrode, the shape of the single crystal region adjacent to the trench gate electrode, and the shape of the Schottky electrode can be variously modified.
FIG. 1 illustrates a case where the thickness of the gate insulating film 22 on the side surface of the trench is equal to the thickness of the gate insulating film 22 on the bottom surface of the trench. Actually, the thickness of the gate insulating film 22 on the bottom surface of the trench may be larger than the thickness on the side surface. Increasing the thickness of the gate insulating film 22 on the bottom surface of the trench provides an effect of improving the breakdown voltage.

The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings achieves a plurality of objects at the same time, and has technical utility by achieving one of the objects.
The technical scope of the claims described below is not limited to the examples. The examples are merely illustrative.

2: Source electrode (also used as anode electrode)
4: p ^- type single crystal layer (body layer)
6: n ⁻ type single crystal layer (pressure-resistant layer)
8: n ⁺ type single crystal layer (drain contact layer)
10: Drain electrode (also used as cathode electrode)
12: Schottky electrode 14: p ⁺ type single crystal region (body contact region)
16: n ⁺ type single crystal region (source region)
18: interlayer insulating film 20: trench gate electrode 22: gate insulating film 24: p-type single crystal region 26: chip outline 28: boundary between element region and peripheral region 30: gate pad

Claims (4)

An n-type single crystal layer of silicon carbide;
a p-type single crystal layer of silicon carbide laminated on the n-type single crystal layer;
A trench gate that reaches the n-type single crystal layer from the surface of the p-type single crystal layer through the p-type single crystal layer and is insulated from the n-type single crystal layer and the p-type single crystal layer by a gate insulating film Electrodes,
An n-type single crystal region of silicon carbide that is opposed to the trench gate electrode through the gate insulating film and is formed at a position separated from the n-type single crystal layer by the p-type single crystal layer;
A trench Schottky electrode disposed between adjacent trench gate electrodes, penetrating the p-type single crystal layer from the surface of the p-type single crystal layer and reaching the n-type single crystal layer;
The outer shape of the trench Schottky electrode is formed on the n-type single-crystal layer in the region facing the range is bent, and the p-type single crystal region of silicon carbide in contact with the p-type single-crystal layer,
Equipped with a,
The bottom surface of the trench Schottky electrode is shallower than the bottom surface of the trench gate electrode,
Semiconductor device. 2. The semiconductor device according to claim 1 , wherein the bottom surface of the trench Schottky electrode is coincident with or deeper than the bottom surface of the p-type single crystal layer. 3. The semiconductor device according to claim 1, wherein the p-type single crystal region extends from a level shallower to a deeper level than a bottom surface of the trench gate electrode. 1 chip when viewed in plan, the semiconductor device according to any one of claims 1 to total area of the trench gate electrode is equal to or larger than the total area of the trench Schottky electrode 3.

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