JP5493326B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a capacitor.

  Recently, the use of a ferroelectric film as a dielectric film of a capacitor has attracted attention. Ferroelectric random access memory (FeRAM) using such a ferroelectric capacitor has features such as high-speed operation, low power consumption, and excellent write / read durability. It is a non-volatile memory having further development in the future.

  Also in DRAMs and the like, it has been proposed to use a ferroelectric film as a capacitor dielectric film in order to achieve high integration.

  As a material for the lower electrode and the upper electrode of such a capacitor, a noble metal, a noble metal oxide, or the like is used.

In addition, as a background art, there are the following.
JP 2005-159165 A JP 2003-197874 A JP 2001-237392 A JP 2002-151656 A JP 2002-261251 A JP 2000-91270 A JP 2003-68991 A JP 2004-253627 A JP 2003-282844 A Japanese Patent Laid-Open No. 2000-223661 JP 2006-351828 A JP 2000-208723 A JP 2002-118236 A JP-A-9-22829 JP 2007-184623 A JP-A-11-168174 JP 2004-47633 A JP 2003-318371 A JP 2003-209179 A Japanese Patent Laid-Open No. 11-224936 JP 2005-150416 A

  However, when a ferroelectric film is simply formed on the lower electrode, a ferroelectric film having uniform crystallinity may not be obtained.

  An object of the present invention is to provide a method of manufacturing a semiconductor device capable of forming a ferroelectric film having uniform crystallinity.

  According to one aspect of the embodiment, on the semiconductor substrate, forming a first conductive film that is a noble metal film containing a noble metal that is platinum, palladium, rhodium, or osmium; A step of forming an amorphous second conductive film having a film thickness of 0.1 nm or more and 3 nm or less and containing an oxide of the noble metal; and the second conductive film by a sputtering method or a sol-gel method. A step of directly forming a ferroelectric film thereon, a step of crystallizing the ferroelectric film by performing a heat treatment, a step of forming a third conductive film on the ferroelectric film, A lower electrode including the first conductive film and the second conductive film by patterning the third conductive film, the ferroelectric film, the second conductive film, and the first conductive film. A capacitor dielectric film including the ferroelectric film; The method of manufacturing a semiconductor device characterized by a step of forming a capacitor having an upper electrode including the third conductive film is provided.

  According to another aspect of the embodiment, a step of forming a first conductive film that is a noble metal film containing a noble metal that is iridium or ruthenium on a semiconductor substrate, and a film thickness on the first conductive film. Ferroelectric material is formed on the second conductive film by a step of forming an amorphous second conductive film that is 15 nm or more and 30 nm or less inclusive of the noble metal oxide and metal organic chemical vapor deposition A step of directly forming a film, a step of forming a third conductive film on the ferroelectric film, the third conductive film, the ferroelectric film, the second conductive film and the first By patterning the conductive film, a lower electrode including the first conductive film and the second conductive film, a capacitor dielectric film including the ferroelectric film, and a third conductive film are included. Forming a capacitor having an upper electrode. The method of manufacturing a semiconductor device that is provided.

  According to the disclosed semiconductor device and the manufacturing method thereof, an amorphous noble metal oxide film is formed on the noble metal film, a ferroelectric film is formed on the amorphous noble metal oxide film, and an amorphous The noble metal oxide film is changed to a noble metal film. Since the ferroelectric film is formed on the amorphous noble metal oxide film, it is possible to obtain a ferroelectric film having uniform crystallinity even when the crystallinity of the noble metal film is not sufficiently uniform. It becomes. In addition, since oxygen released from the noble metal oxide film is supplied to the ferroelectric film, the crystallinity of the ferroelectric film can be improved. In addition, since the amorphous noble metal oxide film is easily changed to a noble metal film, the entire lower electrode becomes a noble metal, and a good lower electrode can be obtained. Therefore, a semiconductor device having a capacitor with good electrical characteristics can be provided. Since the crystallinity of the ferroelectric film can be made uniform, the yield of the semiconductor device can be improved.

[First Embodiment]
The semiconductor device and the manufacturing method thereof according to the first embodiment will be described with reference to FIGS. FIG. 1 is a sectional view of the semiconductor device according to the present embodiment.

(Semiconductor device)
The semiconductor device according to the present embodiment will be explained with reference to FIG.

  In the semiconductor device according to the present embodiment, the structure of the memory cell is a planar type.

  As shown in FIG. 1, an element isolation region 12 that defines an element region is formed in a semiconductor substrate 10. As the semiconductor substrate 10, for example, an N-type or P-type silicon substrate is used. For example, a P-type well 14 is formed in the semiconductor substrate 10 in which the element isolation region 12 is formed.

  On the semiconductor substrate 10 on which the well 14 is formed, a gate electrode (word line) 18 is formed via a gate insulating film 16. A sidewall insulating film 20 is formed on the side wall portion of the gate electrode 18.

  Source / drain diffusion layers 22 are formed on both sides of the gate electrode 18 on which the sidewall insulating film 20 is formed.

  Silicide layers 24a and 24b are formed on the gate electrode 18 and on the source / drain diffusion layer 22, respectively. The silicide layer 24b on the source / drain diffusion layer 22 functions as a source / drain electrode.

  Thus, the transistor 26 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  An insulating film (antioxidation insulating film) 28 is formed on the semiconductor substrate 10 on which the transistor 26 is formed. The film thickness of the insulating film 28 is, for example, 200 nm. As the insulating film 28, for example, a silicon oxynitride film (SiON film) is used.

  An interlayer insulating film 30 is formed on the semiconductor substrate 10 on which the insulating film 28 is formed. The thickness from the surface of the semiconductor substrate 10 to the surface of the interlayer insulating film 30 is, for example, 785 nm. For example, a silicon oxide film is used as the interlayer insulating film 30. The surface of the interlayer insulating film 30 is planarized.

  Contact holes 32 reaching the source / drain electrodes 24 b are formed in the interlayer insulating film 30 and the insulating film 28.

  An adhesion film 34 is formed in the contact hole 32. As the adhesion film 34, for example, a laminated film in which a Ti film and a TiN film are sequentially laminated is used. The thickness of the Ti film is, for example, 30 nm. The thickness of the TiN film is, for example, 20 nm.

  A conductor plug 36 is embedded in the contact hole 32 in which the adhesion film 34 is formed. As a material of the conductor plug 36, for example, tungsten (W) is used.

  For example, a silicon oxynitride film 38 is formed on the interlayer insulating film 30 in which the conductor plugs 36 are embedded. The film thickness of the silicon oxynitride film 38 is, for example, 100 nm.

  On the silicon oxynitride film 38, for example, a silicon oxide film 40 is formed. The film thickness of the silicon oxide film 40 is, for example, 130 nm.

  The silicon nitride oxide film 38 and the silicon oxide film 40 form an interlayer insulating film 42. The interlayer insulating film 42 is for preventing the upper surface of the conductor plug 36 from being oxidized after the conductor plug 36 is embedded in the interlayer insulating film 30.

  Here, the case where a laminated film of the silicon oxynitride film 38 and the silicon oxide film 40 is formed as the interlayer insulating film 42 has been described as an example, but the interlayer insulating film 42 is formed of the silicon oxynitride film 38 and the silicon oxide film. It is not limited to a laminated film with the film 40. For example, a silicon nitride film, an aluminum oxide film, or the like may be used as the interlayer insulating film 42.

An adhesion film 43 is formed on the interlayer insulating film 42. The adhesion film 43 is for ensuring adhesion of the lower electrode 48 described later to the base. As the adhesion film 43, for example, an aluminum oxide (Al ₂ O ₃ ) film is used. The film thickness of the adhesion film 43 is, for example, 20 nm.

  A conductive film 44 is formed on the adhesion film 43. As the conductive film 44, a noble metal film is used. More specifically, for example, a platinum (Pt) film is used as the conductive film 44. The film thickness of the conductive film 44 is, for example, 150 nm.

  Here, the case where a platinum film is used as the conductive film 44 has been described as an example, but the conductive film 44 is not limited to the platinum film. As the conductive film 44, for example, a rhodium film, an osmium film, a palladium film, or the like may be used. Alternatively, the conductive film 44 may be formed using these stacked films.

A conductive film 46 is formed on the conductive film 44. The conductive film 46 is a noble metal film. The noble metal contained in the conductive film 46 and the noble metal contained in the conductive film 44 are preferably the same element. As will be described later, in the step of forming a film on the conductive film 44, an amorphous (amorphous) noble metal oxide film 45 is formed (see FIG. 3C). The amorphous noble metal oxide film 45 is reduced by a heat treatment or the like in a later process to become a noble metal film 46. When the noble metal contained in the noble metal oxide film 45 and the noble metal contained in the conductive film 44 are the same element, the conductive film 46 and the conductive film 44 may not be distinguished. In addition, since the conductive film 46 is obtained by reducing the amorphous noble metal oxide film 45, the crystal grain size of the conductive film 46 may be smaller than the crystal grain size of the conductive film 44. When the amorphous noble metal oxide film 45 is formed, for example, when a platinum oxide film (PtO _X film) is formed, the platinum oxide film is reduced to a platinum film by a heat treatment or the like in a later process, and the platinum film A certain conductive film 46 is formed.

  Here, the case where the platinum oxide film is formed at the stage of forming the amorphous noble metal oxide film 45 and the conductive film 46 is formed of the platinum film has been described as an example. However, the conductive film 46 is a platinum film. It is not limited to. For example, when an amorphous rhodium oxide film is formed when the noble metal oxide film 45 is formed, the rhodium oxide film is reduced to a rhodium film by a heat treatment or the like in a later process, and the conductive film 46 which is a rhodium film. Is formed. Further, when an amorphous osmium oxide film is formed when forming the noble metal oxide film 45, the osmium oxide film is reduced by a heat treatment or the like in a later process to become an osmium film, and the conductive film 46 which is an osmium film. Is formed. Further, when an amorphous palladium oxide film is formed when forming the noble metal oxide film 45, the palladium oxide film is reduced to a palladium film by a heat treatment or the like in a later process, and the conductive film 46 which is a palladium film. Is formed. As described above, the amorphous noble metal oxide film 45 may be a rhodium oxide film, an osmium oxide film, a palladium oxide film, or the like, and the conductive film 46 obtained by reducing the amorphous noble metal oxide film 45 may be A rhodium film, an osmium film, a palladium film, or the like may be used.

  Thus, the lower electrode 48 of the capacitor 62 is formed by the conductive film 44 and the conductive film 46.

A ferroelectric film 50 is formed on the lower electrode 48. The ferroelectric film 50 is formed by, for example, a sputtering method or a sol-gel method. As the ferroelectric film 50, for example, a PbZr _X Ti _1-X O ₃ film (0 ≦ X ≦ 1) (PZT film) is used. The PZT film is a ferroelectric film having a perovskite structure. The film thickness of the ferroelectric film 50 is, for example, 100 nm. The ferroelectric film 50 is crystallized by a heat treatment to be described later.

Here, the case where a PZT film is used as the ferroelectric film 50 has been described as an example, but the ferroelectric film 50 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 50. Further, as the ferroelectric film 50, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 50 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used.

A ferroelectric film 52 is formed on the ferroelectric film 50. The ferroelectric film 52 is formed by, for example, a high frequency sputtering method. The material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50. As the ferroelectric film 52, for example, a PbZr _X Ti _1-X O ₃ film (PZT film) (0 ≦ X ≦ 1) is used. The film thickness of the ferroelectric film 52 is, for example, 10 to 30 nm. The ferroelectric film 52 is crystallized by a heat treatment to be described later.

Although the case where a PZT film is used as the ferroelectric film 52 has been described as an example here, the ferroelectric film 52 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 52. Further, as the ferroelectric film 52, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 52 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used. As described above, the material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50.

  Thus, the capacitor dielectric film 54 is formed by the ferroelectric film 50 and the ferroelectric film 52.

  A conductive film 56 is formed on the capacitor dielectric film 54. The conductive film 56 is formed by, for example, a sputtering method. The conductive film 56 is crystallized by heat treatment or the like. As the conductive film 56, for example, an iridium oxide film is used. The film thickness of the conductive film 56 is, for example, about 10 to 100 nm. Here, the film thickness of the conductive film 56 is, for example, 50 nm.

  A conductive film 58 is formed on the conductive film 56. As the conductive film 58, for example, an iridium oxide film 58 is used. The conductive film 58 is formed by, for example, a sputtering method. The film thickness of the conductive film 58 is about 200 nm, for example. The conductive film 58 is for preventing the capacitor dielectric film 54 from being damaged by etching or the like performed after the capacitor 62 is formed.

  The upper electrode 60 of the capacitor 62 is formed by the conductive film 56 and the conductive film 58.

  Thus, the capacitor 62 having the lower electrode 48, the capacitor dielectric film 54, and the upper electrode 60 is formed.

  A protective film (hydrogen diffusion prevention film) 64 is formed on the capacitor 62 so as to cover the capacitor dielectric film 54 and the upper electrode 60. The protective film 64 is for preventing the capacitor dielectric film 54 from being reduced by hydrogen, moisture, or the like. As the protective film 64, for example, an aluminum oxide film is used. The film thickness of the protective film 64 is, for example, about 20 to 50 nm.

  A protective film (hydrogen diffusion prevention film) 66 is formed on the capacitor 62 and the interlayer insulating film 42 on which the protective film 64 is formed. The protective film 66 is combined with the protective film 64 to prevent the capacitor dielectric film 54 from being reduced by hydrogen, moisture, or the like. As the protective film 66, for example, an aluminum oxide film is used. The film thickness of the protective film 66 is about 20 nm, for example.

  On the protective film 66, an interlayer insulating film 68 is formed. For example, a silicon oxide film is used as the interlayer insulating film 68. The film thickness of the interlayer insulating film 68 is, for example, about 1.4 μm. The surface of the interlayer insulating film 68 is planarized.

  A protective film (hydrogen diffusion prevention film) 70 is formed on the interlayer insulating film 68. As the protective film 70, for example, aluminum oxide is used. The film thickness of the protective film 70 is, for example, about 20 to 50 nm. The protective film 70 is for preventing the capacitor dielectric film 54 from being reduced by hydrogen, moisture, or the like, like the protective films 64 and 66. In order to form the protective film 70 on the planarized interlayer insulating film 68, the protective film 70 is formed flat.

  An interlayer insulating film 72 is formed on the protective film 70. As the interlayer insulating film 72, for example, a silicon oxide film is used. The film thickness of the interlayer insulating film 72 is, eg, about 300 nm.

  A contact hole 74 a that reaches the lower electrode 48 of the capacitor 62 is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the protective film 64.

  A contact hole 74 b reaching the upper electrode 60 of the capacitor 62 is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the protective film 64.

  A contact hole 76 reaching the conductor plug 36 is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the interlayer insulating film 42.

  An adhesion film 78 is formed in the contact holes 74a, 74b, and 76. As the adhesion film 78, for example, a TiN film is used. The film thickness of the adhesion film 78 is, for example, about 50 to 150 nm.

Here, the case where a TiN film is used as the adhesion film 78 has been described as an example, but the adhesion film 78 is not limited to the TiN film. For example, as the adhesion film 78, TaN film, CrN film, HfN film, ZrN film, TiAlN film, TaAlN film, TiSiN film, TaSiN film, CrAlN film, HfAlN film, ZrAlN film, TiON film, TaON film, CrON film, HfON A film, ZrON film, TiAlON film, TaAlON film, CrAlON film, HfAlON film, ZrAlON film, TiSiON film, TaSiON film, Ir film, Ru film, IrO _X film, RuO _X film, or the like may be used. Alternatively, a stacked film formed by sequentially stacking a Ti film and a TiN film may be used as the adhesion film 78. Further, a stacked film formed by sequentially stacking a Ti film and a TaN film may be used as the adhesion film 78. Further, a stacked film formed by sequentially stacking a Ta film and a TiN film may be used as the adhesion film 78. Alternatively, a stacked film formed by sequentially stacking a Ta film and a TaN film may be used as the adhesion film 78.

  Conductor plugs 80a to 80c are embedded in the contact holes 74a, 74b, and 76 in which the adhesion film 78 is formed. As a material of the conductor plugs 80a to 80c, for example, tungsten is used.

  Here, the case where tungsten is used as the material of the conductor plugs 80a to 80c has been described as an example, but the material of the conductor plugs 80a to 80c is not limited to tungsten. For example, copper (Cu) or the like may be used as the material for the conductor plugs 80a to 80c. Moreover, you may form the conductor plugs 80a-80c with the laminated film of a tungsten film and a copper film. Further, the conductor plugs 80a to 80c may be formed of a laminated film of a tungsten film and a polysilicon film.

  A wiring 90 is formed on the interlayer insulating film 72 in which the conductor plugs 80a to 80c are embedded. The wiring 90 is formed, for example, by sequentially stacking a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88. The thickness of the TiN film 82 is, for example, 50 nm. The thickness of the AlCu alloy film 84 is, for example, 550 nm. The thickness of the Ti film 86 is, for example, 5 nm. The thickness of the TiN film 88 is, for example, 50 nm.

  On the interlayer insulating film 72 on which the wiring 90 is formed, an interlayer insulating film (not shown), a conductor plug (not shown), a wiring (not shown) and the like are further formed over a plurality of layers. .

  Thus, the semiconductor device according to the present embodiment is formed.

(Method for manufacturing semiconductor device)
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. 2 to 10 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment.

  First, as shown in FIG. 2A, an element isolation region 12 that defines an element region is formed on a semiconductor substrate 10 by, eg, STI (Shallow Trench Isolation). As the semiconductor substrate 10, for example, an N-type or P-type silicon substrate is used. The method for forming the element isolation region 12 is not limited to the STI method. For example, the element isolation region 12 may be formed by a LOCOS (LOCal Oxidation of Silicon) method.

  Next, the well 14 is formed by introducing dopant impurities by ion implantation. For example, a P-type dopant impurity is used as the dopant impurity. For example, boron (B) is used as the P-type dopant impurity. When a P-type dopant impurity is used as the dopant impurity, a P-type well 14 is formed.

  Next, the gate insulating film 16 is formed on the element region by, eg, thermal oxidation. The film thickness of the gate insulating film 16 is, for example, about 6 to 7 nm.

  Next, a polysilicon film 18 is formed by, eg, CVD. The film thickness of the polysilicon film 18 is about 200 nm, for example. The polysilicon film 18 becomes a gate electrode (word line).

  Here, the case where the polysilicon film 18 is formed as the film to be the gate electrode has been described as an example, but the film to be the gate electrode is not limited to the polysilicon film. For example, a stacked film of an amorphous silicon film and a tungsten silicide film may be formed as a film to be a gate electrode. When forming a laminated film of an amorphous silicon film and a tungsten silicide film, the film thickness of the amorphous silicon film is about 50 nm, for example, and the film thickness of the tungsten silicide film is about 150 nm, for example.

  Next, the polysilicon film 18 is patterned using a photolithography technique. Thus, the gate electrode (word line) 18 is formed by the polysilicon film.

  Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by, for example, ion implantation using the gate electrode 18 as a mask. For example, an N-type dopant impurity is used as the dopant impurity. For example, phosphorus (P) is used as the N-type dopant impurity. Thereby, an extension region (not shown) constituting a shallow region of the extension source / drain is formed.

  Next, an insulating film is formed on the entire surface by, eg, CVD. For example, a silicon oxide film is formed as the insulating film. The thickness of the insulating film is, for example, about 300 nm.

  Next, the insulating film is anisotropically etched. Thus, the sidewall insulating film 20 is formed on the side wall portion of the gate electrode 18 from the insulating film.

  Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by, for example, ion implantation using the gate electrode 18 on which the sidewall insulating film 20 is formed as a mask. For example, an N-type dopant impurity is used as the dopant impurity. For example, arsenic (As) is used as the N-type dopant impurity. Thereby, an impurity diffusion layer (not shown) constituting a deep region of the extension source / drain is formed. A source / drain diffusion layer 22 is formed by the extension region and the deep impurity diffusion layer.

  Next, a refractory metal film (not shown) is formed on the entire surface by, eg, sputtering. For example, a cobalt film is formed as the refractory metal film.

  Next, by performing heat treatment, the surface layer portion of the semiconductor substrate 10 and the refractory metal film are reacted, and the upper portion of the gate electrode 18 and the refractory metal film are reacted.

  Next, the unreacted refractory metal film is removed by etching, for example, by wet etching.

  Thus, for example, a source / drain electrode 24b of cobalt silicide is formed on the source / drain diffusion layer 22. Further, a silicide layer 24a of cobalt silicide, for example, is formed on the gate electrode 18.

  Thus, the transistor 26 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  Next, an insulating film (antioxidation film) 28 is formed on the entire surface by, eg, plasma CVD. As the insulating film 28, for example, a silicon oxynitride film is formed. The film thickness of the insulating film 28 is, for example, 200 nm.

  Next, an interlayer insulating film 30 is formed on the entire surface. The interlayer insulating film 30 is formed by, for example, a plasma CVD method using a TEOS (Tetra Ethoxy Silane) gas, that is, a plasma TEOSCVD method. For example, a silicon oxide film is formed as the interlayer insulating film 30. The film thickness of the interlayer insulating film 30 is, for example, 1 μm.

  Next, the surface of the interlayer insulating film 30 is planarized by, for example, CMP (Chemical Mechanical Polishing). Thus, the height from the surface of the semiconductor substrate 10 to the surface of the interlayer insulating film 30 is, for example, about 785 nm (see FIG. 2B).

  Next, as shown in FIG. 2C, a contact hole 32 reaching the source / drain electrode 24b is formed by using a photolithography technique. The diameter of the contact hole 32 is, for example, 0.25 μm.

  Next, a Ti film is formed on the entire surface by, eg, sputtering. The thickness of the Ti film is about 30 nm, for example.

  Next, a TiN film is formed on the entire surface by, eg, sputtering. The thickness of the TiN film is, for example, about 20 nm.

  Thus, the adhesion film 34 is formed by the Ti film and the TiN film.

  Next, a conductive film 36 is formed on the entire surface by, eg, CVD. As the conductive film 36, for example, a tungsten film is formed. The film thickness of the conductive film 36 is about 300 nm, for example.

  Next, the conductive film 36 and the adhesion film 34 are polished by CMP, for example, until the surface of the interlayer insulating film 30 is exposed. Thus, for example, a tungsten conductor plug 36 is embedded in the contact hole 32 (see FIG. 3A).

  Next, as shown in FIG. 3B, a silicon oxynitride film 38 is formed on the entire surface by, eg, plasma CVD. The film thickness of the silicon oxynitride film 38 is, for example, 100 nm.

  Next, a silicon oxide film 40 is formed on the entire surface by, eg, plasma TEOSCVD. The film thickness of the silicon oxide film 40 is, for example, 130 nm.

  The silicon nitride oxide film 38 and the silicon oxide film 40 form an interlayer insulating film 42. The interlayer insulating film 42 is for preventing the upper surface of the conductor plug 36 from being oxidized after the conductor plug 36 is embedded in the interlayer insulating film 30.

  Here, the case where a laminated film of the silicon oxynitride film 38 and the silicon oxide film 40 is formed as the interlayer insulating film 42 has been described as an example, but the interlayer insulating film 42 is formed of the silicon oxynitride film 38 and the silicon oxide film. It is not limited to a laminated film with the film 40. For example, a silicon nitride film or an aluminum oxide film may be formed as the antioxidant film 42.

  Next, heat treatment is performed, for example, in a nitrogen atmosphere. This heat treatment is for releasing the gas contained in the interlayer insulating film 42 from the interlayer insulating film 42 (degassing). The substrate temperature during the heat treatment is set to 650 ° C., for example. The heat treatment time is, for example, 30 minutes.

  Next, as shown in FIG. 3B, an adhesion film 43 is formed on the entire surface by, eg, sputtering. The adhesion film 43 is for ensuring adhesion of the lower electrode 48 described later to the base. As the adhesion film 43, for example, an aluminum oxide film is formed. The film thickness of the adhesion film 43 is, for example, 20 nm.

  Next, heat treatment is performed in an oxygen atmosphere by, for example, RTA (Rapid Thermal Annealing). The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds.

  Next, as shown in FIG. 3C, a noble metal film (conductive film) 44 is formed on the entire surface by, eg, sputtering. The conductive film 44 becomes a part of the lower electrode 48 of the capacitor 62. As the conductive film 44, for example, a platinum film is formed. The film thickness of the conductive film 44 is about 150 nm, for example. The film forming conditions for forming the conductive film 44 are, for example, as follows. The substrate temperature is set to 350 ° C., for example. For example, Ar gas is used as the gas introduced into the deposition chamber. The pressure in the film forming chamber is, for example, 1 Pa. The applied power is, for example, 0.3 kW.

  Here, the case where a platinum film is formed as the conductive film 44 has been described as an example, but the conductive film 44 is not limited to the platinum film. As the conductive film 44, a rhodium film, an osmium film, a palladium film, or the like may be formed. Alternatively, the conductive film 44 may be formed using these stacked films.

Next, an amorphous (amorphous state) noble metal oxide film 45 is formed on the entire surface by, eg, sputtering. The noble metal contained in the noble metal oxide film 45 and the noble metal contained in the conductive film 44 are preferably the same element. The noble metal oxide film 45 is reduced in a subsequent process to become a noble metal film 46. The noble metal film 46 formed by reducing the noble metal oxide film 45 becomes a part of the lower electrode 48 of the capacitor 62. As the amorphous noble metal oxide film 45, for example, a platinum oxide film (PtO _X film) is formed.

  In the present embodiment, the amorphous noble metal oxide film 45 is formed for the following reason.

  First, when the ferroelectric film 50 is directly formed on the noble metal film 44 whose crystallinity is not sufficiently uniform, the crystallinity of the ferroelectric film 50 may become nonuniform. On the other hand, if the amorphous noble metal oxide film 45 is formed on the noble metal film 44 and the ferroelectric film 50 is formed on the amorphous noble metal oxide film 45, the crystallinity of the noble metal film 44 is obtained. It is possible to obtain the ferroelectric film 50 having uniform crystallinity even when the thickness is not sufficiently uniform.

  In addition, the crystalline noble metal oxide film is relatively difficult to reduce, whereas the amorphous noble metal oxide film 45 is relatively easy to reduce. Therefore, if the amorphous noble metal oxide film 45 is formed, the noble metal oxide film 45 can be changed to the noble metal film 46 in a heat treatment or the like in a later process. The capacitor 62 in which the entire lower electrode 48 is formed of a noble metal has better electrical characteristics than a capacitor in which a noble metal oxide is present in a part of the lower electrode 48.

  In addition, when the ferroelectric film 50 is formed, oxygen deficiency may occur in the ferroelectric film 50 in some cases. If the noble metal oxide film 45 is formed under the ferroelectric film 50, oxygen is released from the noble metal oxide film 45 during heat treatment for crystallizing the ferroelectric film 50, and the noble metal oxide Oxygen released from the film 45 is supplied from the lower surface side of the ferroelectric film 50. The oxygen released from the noble metal oxide film 45 compensates for oxygen vacancies in the ferroelectric film 50. Therefore, according to the present embodiment, it is possible to obtain the ferroelectric film 50 with good crystallinity.

  For this reason, an amorphous noble metal oxide film 45 is formed in this embodiment.

  The thickness of the noble metal oxide film 45 is preferably 0.1 nm or more and 3 nm or less. The reason why the thickness of the noble metal oxide film 45 is 0.1 nm or more and 3 nm or less is as follows.

  That is, when the noble metal oxide film 45 is thinner than 0.1 nm, the amount of oxygen released from the noble metal oxide film 45 during the heat treatment for crystallizing the ferroelectric film 50 is relatively small. Therefore, the oxygen deficiency in the ferroelectric film 50 cannot be sufficiently compensated. For this reason, the thickness of the noble metal oxide film 45 is preferably 0.1 nm or more.

  On the other hand, when the thickness of the noble metal oxide film 45 is thicker than 3 nm, the crystallinity of the noble metal film 44 does not sufficiently affect the ferroelectric film 50, and the ferroelectric film 50 having good crystallinity is obtained. It may not be possible. Further, in the subsequent heat treatment or the like, the entire noble metal oxide film 45 cannot be changed to the noble metal film 46, and the noble metal oxide film 45 may remain in a part of the lower electrode 48. When the noble metal oxide film 45 remains in a part of the lower electrode 48, the capacitor 62 with good electrical characteristics may not be obtained. For this reason, the thickness of the noble metal oxide film 45 is preferably 3 nm or less.

  For this reason, in this embodiment, the thickness of the noble metal oxide film 45 is set to 0.1 nm or more and 3 nm or less.

  The deposition temperature of the noble metal oxide film 45 is set to 100 to 400 ° C., for example. The deposition temperature of the noble metal oxide film 45 is set to 100 to 400 ° C. for the following reason.

  That is, the noble metal oxide film 45 formed at a temperature lower than 100 ° C. has extremely low conductivity and is electrically close to an insulator. For this reason, when the noble metal oxide film 45 is formed at a temperature lower than 100 ° C., it may be difficult to obtain an electrically good capacitor 62. Therefore, it is preferable that the deposition temperature when forming the noble metal oxide film 45 is 100 ° C. or higher.

  On the other hand, when the noble metal oxide film 45 is to be formed at a temperature higher than 400 ° C., oxygen is dissociated during the formation of the noble metal oxide film 45, so that the noble metal oxide film 45 is not the noble metal oxide film 45. A film is formed.

  For these reasons, the deposition temperature of the noble metal oxide film 45 is preferably about 100 to 400 ° C. Here, the deposition temperature of the noble metal oxide film 45 is set to 350 ° C., for example.

  The applied power when forming the noble metal oxide film 45 is, for example, about 0.1 to 0.3 W. When the applied power is set to be relatively low, discharge is less likely to occur, so that the noble metal oxide film 45 has a non-uniform thickness in the wafer surface. On the other hand, when the applied power is set relatively high, it is difficult to control the thickness of the noble metal oxide film 45. For this reason, the applied power when forming the noble metal oxide film 45 is preferably about 0.1 to 0.3 W, for example.

The gas introduced into the deposition chamber when forming the noble metal oxide film 45 is, for example, a mixed gas of Ar gas and O ₂ gas. The proportion of O ₂ gas in the mixed gas of Ar gas and O ₂ gas is preferably about 80%. This is because when the concentration of O ₂ gas in the mixed gas is set to be relatively large, the thickness of the noble metal oxide film 45 may be non-uniform.

  The pressure in the deposition chamber when forming the noble metal oxide film 45 is, for example, about 1 Pa.

  Here, although the case where a platinum oxide film is formed as the amorphous noble metal oxide film 45 has been described as an example, the amorphous noble metal oxide film 45 is not limited to the platinum oxide film. For example, as the amorphous noble metal oxide film 45, an amorphous rhodium oxide film, an amorphous osmium oxide film, an amorphous palladium oxide film, or the like may be formed.

Next, as shown in FIG. 4A, a ferroelectric film 50 is formed on the entire surface by, eg, sputtering. More specifically, the ferroelectric film 50 is formed by a high frequency sputtering method. The ferroelectric film 50 becomes a part of the capacitor dielectric film 54 of the capacitor 62. As the ferroelectric film 50, for example, a PbZr _X Ti _1-X O ₃ film (0 ≦ X ≦ 1) (PZT film) is formed. The film thickness of the ferroelectric film 50 is, for example, 100 nm. In the present embodiment, the ferroelectric film 50 is formed by sputtering in order to avoid abnormal oxidation on the surface of the noble metal oxide film 45 and to obtain a capacitor dielectric film 54 with good crystallinity. It is.

  The deposition temperature of the ferroelectric film 50 is preferably 30 ° C. or higher and 100 ° C. or lower, for example. The deposition temperature of the ferroelectric film 50 is set to 30 ° C. to 100 ° C. for the following reason.

  That is, when the deposition temperature of the ferroelectric film 50 is set lower than 30 ° C., the film thickness may be non-uniform in the wafer surface. Further, when the deposition temperature of the ferroelectric film 50 is set lower than 30 ° C., the (100) orientation variation becomes large, and the crystallinity may become non-uniform.

  On the other hand, when the deposition temperature of the ferroelectric film 50 is set higher than 100 ° C., the (101) orientation and (100) orientation increase and the (111) orientation decreases in the ferroelectric film 50. In some cases, it may be difficult to obtain the capacitor 62 having good electrical characteristics.

  For this reason, in this embodiment, the deposition temperature of the ferroelectric film 50 is set to 30 ° C. or higher and 100 ° C. or lower. Here, the deposition temperature of the ferroelectric film 50 is set to 50 ° C., for example.

Here, the case where a PZT film is formed as the ferroelectric film 50 has been described as an example, but the ferroelectric film 50 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 50. Further, as the ferroelectric film 50, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 50 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film ), SrBi ₄ Ti ₄ O ₁₅ film, and the like can be formed.

  Although the case where the ferroelectric film 50 is formed by the sputtering method has been described as an example here, the film forming method of the ferroelectric film 50 is not limited to the sputtering method. For example, the ferroelectric film 50 may be formed by a sol-gel method. Even when the ferroelectric film 50 is formed by the sol-gel method, a ferroelectric having good crystallinity on the noble metal oxide film 45 while preventing abnormal oxidation on the surface of the noble metal oxide film 45. A film 50 can be formed.

  In the present embodiment, when the ferroelectric film 50 is formed, the sputtering method or the sol-gel method is used as a noble metal film 44 that becomes a part of the lower electrode 48 as a platinum film, a rhodium film, an osmium film, or This is because, when a palladium film is used, it is preferable to form the ferroelectric film 50 by a sputtering method or a sol-gel method.

Next, the ferroelectric film 50 is crystallized in an atmosphere containing oxygen by, for example, an RTA method. More specifically, the ferroelectric film 50 is heat-treated in an atmosphere of a mixed gas containing an inert gas and O ₂ gas. For example, argon gas is used as the inert gas. The heat treatment conditions are as follows. The heat treatment temperature is set to 600 ° C., for example. The concentration of oxygen in the mixed gas is, for example, 1.25%. The heat treatment time is 90 seconds, for example. Even when the ferroelectric film 50 is formed on the amorphous noble metal oxide film 45 and the ferroelectric film 50 is crystallized by heat treatment, the crystallinity of the noble metal film 44 is not sufficiently uniform. A ferroelectric film 50 having uniform crystallinity is obtained. Further, by this heat treatment, the amorphous noble metal oxide film 45 is reduced to become a noble metal film 46 (see FIG. 4B). Further, oxygen is released from the noble metal oxide film 45 during this heat treatment. The oxygen released from the noble metal oxide film 45 compensates for oxygen vacancies in the ferroelectric film 50. Therefore, the ferroelectric film 50 with good crystallinity can be obtained. When the platinum oxide film is formed at the stage of forming the noble metal oxide film 45, a noble metal film (conductive film) 46 which is a platinum film is formed. When the rhodium oxide film is formed at the stage of forming the noble metal oxide film 45, a noble metal film 46 which is a rhodium film is formed. Further, when the osmium oxide film is formed at the stage of forming the noble metal oxide film 45, the noble metal film 46 which is an osmium film is formed. Further, when the palladium oxide film is formed at the stage of forming the noble metal oxide film 45, a noble metal film 46 which is a palladium film is formed.

Next, as shown in FIG. 4C, a ferroelectric film 52 is formed on the entire surface by, eg, sputtering. More specifically, the ferroelectric film 52 is formed by high frequency sputtering. The ferroelectric film 52 becomes a part of the capacitor dielectric film 54 of the capacitor 62. The material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50. As the ferroelectric film 52, for example, a PbZr _X Ti _1-X O ₃ film (0 ≦ X ≦ 1) (PZT film) is formed. The film thickness of the ferroelectric film 52 is, for example, 10 to 30 nm.

Here, the case where a PZT film is formed as the ferroelectric film 52 has been described as an example, but the ferroelectric film 52 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 52. Further, as the ferroelectric film 52, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 52 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used. As described above, the material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50.

  Thus, the capacitor dielectric film 54 is formed by the ferroelectric film 50 and the ferroelectric film 52.

Next, as shown in FIG. 5A, a conductive film 56 is formed on the entire surface by, eg, sputtering. The conductive film 56 becomes a part of the upper electrode 60 of the capacitor 62. As the conductive film 56, an iridium oxide film (IrO _X film) is formed. It is preferable to set the film thickness of the conductive film 56 to be relatively thin so that oxygen is sufficiently supplied to the ferroelectric film 52 through the conductive film 56 in the heat treatment in the subsequent process. Specifically, the thickness of the conductive film 56 is preferably 10 to 100 nm. Here, the film thickness of the conductive film 56 is, for example, about 50 nm.

The conditions for forming the conductive film 56 are, for example, as follows. The substrate temperature is preferably 100 to 350 ° C., for example. Here, the substrate temperature is set to 150 ° C. The film formation time is, for example, 60 seconds. The pressure in the film forming chamber is, for example, about 5.0 × 10 ⁻⁶ Pa.

  Next, heat treatment is performed in an atmosphere containing oxygen by, for example, an RTA method. The heat treatment is for crystallizing the amorphous ferroelectric film 50 and further improving the crystallinity of the ferroelectric film 52. Oxygen is supplied to the ferroelectric film 52 through the conductive film 56, and oxygen vacancies in the ferroelectric film 52 are compensated. The heat treatment is for improving the adhesion between the conductive film 56 and the ferroelectric film 52. By this heat treatment, peeling of the upper electrode 60a and the like are suppressed, and as a result, yield can be improved.

The heat treatment conditions are as follows, for example. The substrate temperature is about 710 ° C., for example. The heat treatment time is set to 120 seconds, for example. The atmosphere in the chamber is, for example, an atmosphere of a mixed gas of Ar gas and O ₂ gas. The oxygen concentration in the mixed gas is, for example, 1%.

  Next, a conductive film 58 is formed on the entire surface by, eg, sputtering. The conductive film 58 becomes a part of the upper electrode 60 of the capacitor 62. As the conductive film 58, for example, an iridium oxide film is formed. The film thickness of the conductive film 58 is about 200 nm, for example. The conductive film 58 is for forming the upper electrode 60 having a sufficient thickness in combination with the conductive film 56. As a result, the upper electrode 60 having a sufficient thickness is formed, so that it is possible to prevent the capacitor dielectric film 54 from being greatly damaged during etching or the like.

  Next, the lower surface (back surface) of the semiconductor substrate 10 is cleaned (back surface cleaning).

Next, a protective film 92 is formed on the entire surface by sputtering. For example, a TiN film is formed as the protective film 92. The film thickness of the protective film 92 is about 34 nm, for example. When forming the protective film 92, for example, a Ti target is used. The substrate temperature when forming the protective film 92 is, for example, 200 ° C. The atmosphere in the deposition chamber is, for example, an atmosphere of a mixed gas of Ar gas and N ₂ gas. The flow rate of Ar gas is, for example, 50 sccm. The flow rate of N ₂ gas is 90 sccm, for example. The protective film 92 functions as a hard mask when the upper electrode 60 is patterned.

Here, the case where a TiN film is formed as the protective film 92 has been described as an example, but the protective film 92 is not limited to the TiN film. As the protective film 92, for example, TaN film, TiON film, TiO _X film, TaO _X film, TaON film, TiAlO _X film, TaAlO _X film, TiAlON film, TaAlON film, TiSiON film, TaSiON film, TiSiO _X film, TaSiO _{X X} A film, an AlO _X film, a ZrO _X film, or the like may be formed.

  Next, a photoresist film 94 is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film 94 is patterned into a planar shape of the upper electrode 60 by using a photolithography technique.

  Next, the protective film 92, the conductive film 58, and the conductive film 56 are etched using the photoresist film 94 as a mask. Thereby, the upper electrode 60 is formed by the conductive film 56 and the conductive film 58. When the conductive film 58 and the conductive film 56 are etched, the protective film 92 functions as a hard mask (see FIG. 5B).

  Thereafter, the photoresist film 94 is peeled off.

  Next, heat treatment is performed in an atmosphere containing oxygen. This heat treatment is for recovering damage applied to the capacitor dielectric film 54 (recovery annealing). The heat treatment temperature is, for example, 600 to 700 ° C. Here, the heat treatment temperature is 650 ° C. The heat treatment time is 40 minutes, for example.

  Next, a photoresist film 96 is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film 96 is patterned into a planar shape of the capacitor dielectric film 54 using a photolithography technique.

  Next, the capacitor dielectric film 54 is etched using the photoresist film 96 as a mask (see FIG. 6A).

  Thereafter, the photoresist film 96 is peeled off.

  Next, heat treatment is performed in an oxygen atmosphere. The heat treatment conditions are, for example, 300 to 400 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Next, as shown in FIG. 6B, a protective film 64 is formed by, for example, sputtering or CVD. As the protective film 64, for example, an aluminum oxide film is formed. The film thickness of the protective film 64 is, for example, about 20 to 50 nm.

  Next, heat treatment is performed in an oxygen atmosphere. The heat treatment conditions are, for example, 400 to 600 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Next, a photoresist film 98 is formed on the entire surface by, eg, spin coating.

  Next, the photoresist film 98 is patterned into a planar shape of the lower electrode 48 using a photolithography technique.

  Next, the protective film 64, the conductive film 46, the conductive film 44, and the adhesion film 43 are etched using the photoresist film 98 as a mask (see FIG. 7A). A lower electrode 48 is formed by the conductive film 44 and the conductive film 46.

  Thereafter, the photoresist film 98 is peeled off.

  Next, as shown in FIG. 7B, a protective film 66 is formed by, for example, sputtering or CVD. As the protective film 66, for example, an aluminum oxide film is formed. The film thickness of the protective film 66 is about 20 nm, for example.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54 and improving the electrical characteristics of the capacitor 62. The heat treatment condition is, for example, 500 to 700 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Next, the interlayer insulating film 68 is formed by plasma TEOSCVD, for example. For example, a silicon oxide film is formed as the interlayer insulating film 68. The film thickness of the interlayer insulating film 68 is, for example, about 1.4 μm.

  Next, the surface of the interlayer insulating film 68 is planarized by, eg, CMP.

Next, heat treatment is performed in a plasma atmosphere generated using N ₂ O gas or N ₂ gas. This heat treatment is for removing moisture in the interlayer insulating film 68 and changing the film quality of the interlayer insulating film 68 to make it difficult for moisture to enter the interlayer insulating film 68. The heat treatment temperature is set to 350 ° C., for example. The heat treatment time is, for example, 2 minutes. During this heat treatment, the surface of the interlayer insulating film 68 is nitrided, and a silicon oxynitride film (not shown) is formed on the surface of the interlayer insulating film 68.

  Next, as shown in FIG. 8B, a protective film 70 is formed by, for example, sputtering or CVD. As the protective film 70, for example, an aluminum oxide film is formed. The film thickness of the protective film 70 is, for example, about 20 to 50 nm.

  Next, the interlayer insulating film 72 is formed by, for example, plasma TEOSCVD. For example, a silicon oxide film is formed as the interlayer insulating film 72. The film thickness of the interlayer insulating film 72 is, eg, about 300 nm.

  Next, as illustrated in FIG. 9A, the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the protective film 64 are etched using a photolithography technique. As a result, a contact hole 74a reaching the lower electrode 48 and a contact hole 76b reaching the upper electrode 60 are formed.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54 and improving the electrical characteristics of the capacitor 62. The heat treatment conditions are, for example, 400 to 600 ° C. The heat treatment time is, for example, 30 minutes to 120 minutes.

  Note that here, the case where heat treatment is performed in an oxygen atmosphere has been described as an example, but heat treatment may be performed in an ozone atmosphere. Even when heat treatment is performed in an ozone atmosphere, oxygen is supplied to the capacitor dielectric film 54, and the electrical characteristics of the capacitor 62 can be improved.

  Next, as illustrated in FIG. 9B, the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 66, and the interlayer insulating film 42 are etched using a photolithography technique. Thereby, a contact hole 76 reaching the conductor plug 36 is formed.

  Next, heat treatment is performed in an inert gas atmosphere or in a vacuum. This heat treatment is for releasing gas from the interlayer insulating films 72, 68, and 42 (degassing).

  Next, surface treatment is performed on the inner wall surfaces of the contact holes 74a, 74b, and 76 by high frequency etching.

Next, an adhesion film 78 is formed on the entire surface by, eg, sputtering. As the adhesion film 78, for example, a TiN film is formed. The film thickness of the adhesion film 78 is, for example, about 50 to 150 nm. When a TiN film is formed as the adhesion film 78, Ti is used as a target material. The atmosphere in the deposition chamber is a mixed atmosphere of Ar gas and N ₂ gas. The flow rate of Ar gas is 50 sccm. The flow rate of N ₂ gas is 90 sccm, for example. The film forming temperature is set to 200 ° C., for example.

Here, the case where a TiN film is used as the adhesion film 78 has been described as an example, but the adhesion film 78 is not limited to the TiN film. For example, as the adhesion film 78, TaN film, CrN film, HfN film, ZrN film, TiAlN film, TaAlN film, TiSiN film, TaSiN film, CrAlN film, HfAlN film, ZrAlN film, TiON film, TaON film, CrON film, HfON A film, ZrON film, TiAlON film, TaAlON film, CrAlON film, HfAlON film, ZrAlON film, TiSiON film, TaSiON film, Ir film, Ru film, IrO _X film, RuO _X film, or the like may be formed. Alternatively, the adhesion film 78 may be formed by sequentially stacking a Ti film and a TiN film. Alternatively, the adhesion film 78 may be formed by sequentially stacking a Ti film and a TaN film. Further, the adhesion film 78 may be formed by sequentially stacking a Ta film and a TiN film. Further, the adhesion film 78 may be formed by sequentially stacking a Ta film and a TaN film.

  Next, a conductive film is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film. The film thickness of the conductive film is, for example, about 300 nm.

  Next, the conductive film and the adhesion film 78 are polished by, for example, a CMP method until the surface of the interlayer insulating film 72 is exposed. Thus, the conductor plugs 80a to 80c are formed by the conductive film (see FIG. 10A).

  Here, the case where tungsten is used as the material of the conductor plugs 80a to 80c has been described as an example, but the material of the conductor plugs 80a to 80c is not limited to tungsten. For example, Cu or the like may be used as a material for the conductor plugs 80a to 80c. Moreover, you may form the conductor plugs 80a-80c with the laminated film of a tungsten film and a copper film. Further, the conductor plugs 80a to 80c may be formed of a laminated film of a tungsten film and a polysilicon film.

  Next, plasma cleaning is performed. The gas used when performing the plasma cleaning is, for example, Ar gas. Thereby, the natural oxide film etc. which exist on the surface of conductor plugs 80a-80c are removed.

  Next, for example, by sputtering, for example, a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88 are sequentially stacked to form a stacked film. The thickness of the TiN film 82 is, for example, 50 nm. The thickness of the AlCu alloy film 84 is, for example, 550 nm. The thickness of the Ti film 86 is, for example, 5 nm. The thickness of the TiN film 88 is, for example, 50 nm.

  Next, the laminated film is etched using a photolithography technique. Thus, the wiring 90 is formed by the laminated film (see FIG. 10B).

  Thereafter, an interlayer insulating film (not shown), a conductor plug (not shown), a wiring (not shown), etc. are formed over a plurality of layers.

  Thus, the semiconductor device according to the present embodiment is manufactured.

  In the present embodiment, an amorphous noble metal oxide film 45 is formed on the noble metal film 44, a ferroelectric film 50 is formed on the noble metal oxide film 45, and then a heat treatment is performed, whereby crystallinity is obtained. And the noble metal oxide film 45 is changed to a noble metal film 46. In this embodiment, since the ferroelectric film 50 is directly formed on the amorphous noble metal oxide film 45, even if the crystallinity of the noble metal film 44 is not sufficiently uniform, it has uniform crystallinity. The ferroelectric film 50 can be obtained. In the present embodiment, oxygen released from the noble metal oxide film 45 is supplied to the ferroelectric film 50, so that the crystallinity of the ferroelectric film 50 can be improved. Further, since the amorphous noble metal oxide film 45 is easily changed to the noble metal film 46 by heat treatment or the like, the entire lower electrode 48 becomes a noble metal, and a good quality lower electrode 48 is obtained. For this reason, according to the present embodiment, a semiconductor device having a capacitor with good electrical characteristics can be provided. According to the present embodiment, since the crystallinity of the capacitor dielectric film 54 in the wafer surface can be made uniform, it is possible to improve the yield of the semiconductor device.

[Second Embodiment]
A method for fabricating a semiconductor device according to the second embodiment will be described with reference to FIGS. 11 to 13 are process cross-sectional views illustrating the method for manufacturing the semiconductor device according to the present embodiment. The same components as those of the semiconductor device and the manufacturing method thereof according to the first embodiment shown in FIGS. 1 to 10 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  The semiconductor device manufacturing method according to the present embodiment is mainly characterized in that an amorphous noble metal oxide film 45a is formed on the noble metal film 44 using a chemical solution.

  First, from the step of forming the element isolation region 12 to the step of forming the adhesion film 43 on the semiconductor substrate 10, the manufacture of the semiconductor device according to the first embodiment described above with reference to FIGS. 2A to 3B. Since it is the same as the method, description is abbreviate | omitted (refer Fig.11 (a)).

  Next, a noble metal film (conductive film) 44 is formed on the entire surface by, eg, sputtering, in the same manner as in the semiconductor device manufacturing method according to the first embodiment described above with reference to FIG. b)). As the conductive film 44, for example, a platinum film is formed.

  Here, the case where a platinum film is formed as the conductive film 44 has been described as an example, but the conductive film 44 is not limited to the platinum film. As the conductive film 44, a rhodium film, an osmium film, a palladium film, or the like may be formed. Alternatively, the conductive film 44 may be formed using these stacked films.

  Next, as shown in FIG. 11C, an amorphous noble metal oxide film 45a is formed on the noble metal film 44 by oxidizing the surface of the noble metal film 44 using a chemical solution. When a platinum film is formed as the noble metal film 44, for example, a platinum oxide film is formed as the amorphous noble metal oxide film 45a. The noble metal oxide film 45a is reduced in a later step to become a noble metal film 46a (see FIG. 12B). The noble metal film 46 a formed by reducing the noble metal oxide film 45 a becomes a part of the lower electrode 48 of the capacitor 62. As the chemical solution, for example, a chemical solution containing hydrogen peroxide is used. More specifically, for example, a mixed solution of hydrogen peroxide and pure water, that is, a hydrogen peroxide aqueous solution is used. The ratio of hydrogen peroxide in the chemical solution is, for example, about 20%. The temperature of the chemical solution is preferably 100 ° C. or lower, for example. Here, the temperature of the chemical solution is about room temperature. The time for immersing the noble metal film 44 in the chemical solution is, for example, about 5 to 20 minutes. As described above in the first embodiment, the thickness of the noble metal oxide film 45 formed on the noble metal film 44 is preferably 0.1 nm or more and 3 nm or less. Also in this embodiment, for the same reason as in the first embodiment, the thickness of the noble metal oxide film 45a formed on the noble metal film 44 is preferably 0.1 nm or more and 3 nm or less. Here, the thickness of the noble metal oxide film 45a is, for example, about 0.2 nm to 0.5 nm. Thus, a noble metal oxide film 45 a is formed on the noble metal film 44.

  Although the case where the noble metal oxide film 45a is formed using a chemical solution containing hydrogen peroxide has been described as an example here, the chemical solution used when forming the noble metal oxide film 45a is a chemical solution containing hydrogen peroxide. It is not limited. A chemical that can form the noble metal oxide film 45a on the surface of the noble metal film 44 can be used as appropriate. If a chemical solution containing hydrogen peroxide is used, the capacitor dielectric film 60 having uniform crystallinity can be reliably formed. Therefore, it is preferable to use a chemical solution containing hydrogen peroxide.

  Although the case where a platinum oxide film is formed as the amorphous noble metal oxide film 45a has been described as an example here, the amorphous noble metal oxide film 45a is not limited to the platinum oxide film. For example, a noble metal oxide film 45a that is an amorphous rhodium oxide film may be formed by forming a rhodium film as the noble metal film 44 and oxidizing the surface of the rhodium film using a chemical solution. Alternatively, a noble metal oxide film 45a that is an amorphous osmium oxide film may be formed by forming an osmium film as the noble metal film 44 and oxidizing the surface of the osmium film using a chemical solution. Alternatively, a noble metal oxide film 45a that is an amorphous palladium oxide film may be formed by forming a palladium film as the noble metal film 44 and oxidizing the surface of the palladium film using a chemical solution.

  Next, the surface of the noble metal oxide film 45a is cleaned using pure water, for example. The cleaning time is about 15 minutes, for example. The temperature of pure water used for cleaning is, for example, about room temperature.

  Next, the surface of the noble metal oxide film 45a is dried by, for example, IPA (isopropyl alcohol) vapor drying. The temperature at which the noble metal oxide film 45a is dried is, for example, 80 ° C.

  Next, a ferroelectric film 50 is formed on the entire surface by, for example, a sputtering method or a sol-gel method in the same manner as in the method for manufacturing the semiconductor device according to the first embodiment described above with reference to FIG. 12 (a)).

  Next, the ferroelectric film 50 is crystallized in an atmosphere containing oxygen by, for example, the RTA method in the same manner as in the method for manufacturing the semiconductor device according to the first embodiment described above with reference to FIG. . Even when the ferroelectric film 50 is formed on the amorphous noble metal oxide film 45 and the ferroelectric film 50 is crystallized by heat treatment, the crystallinity of the noble metal film 44 is not sufficiently uniform. A ferroelectric film 50 having uniform crystallinity is obtained. Further, by this heat treatment, the noble metal oxide film 45a is reduced and changed to the noble metal film 46a (see FIG. 12B). In this heat treatment, oxygen is released from the noble metal oxide film 45a. The oxygen released from the noble metal oxide film 45a compensates for oxygen vacancies in the ferroelectric film 50. For this reason, the ferroelectric film 50 with good crystallinity can be obtained also in this embodiment.

  When a platinum oxide film is formed when forming the noble metal oxide film 45a, a noble metal film (conductive film) 46a which is a platinum film is formed. When a rhodium oxide film is formed when forming the noble metal oxide film 45a, a noble metal film 46a which is a rhodium film is formed. Further, when an osmium oxide film is formed when the noble metal oxide film 45a is formed, a noble metal film 46a that is an osmium film is formed. Further, when a palladium oxide film is formed when forming the noble metal oxide film 45a, a noble metal film 46a which is a palladium film is formed.

  Thereafter, the process from the formation of the ferroelectric film 52 to the process of forming the wiring 90 is the same as the manufacturing method of the semiconductor device according to the first embodiment described above with reference to FIGS. 4C to 10B. Therefore, explanation is omitted.

  Thus, the semiconductor device according to the present embodiment is manufactured (see FIG. 13).

(Evaluation results)
Next, the evaluation result of the crystallinity of the capacitor dielectric film will be described with reference to FIGS.

  FIG. 14A is a graph showing the integrated intensity of the (111) orientation of the capacitor dielectric film in the manufacturing method of the semiconductor device according to the present embodiment. FIG. 14B is a graph showing the orientation ratio in the (222) direction of the capacitor dielectric film in the method for manufacturing the semiconductor device according to the present embodiment. 14A and 14B, the horizontal axis indicates the wafer number, and the vertical axis indicates the integrated intensity of the (111) orientation. The mark ■ indicates the maximum value in the wafer, the mark ◆ indicates the average value in the wafer, and the mark ▲ indicates the minimum value in the wafer. A conductive film 56 to be a part of the upper electrode 60 was formed on the capacitor dielectric film 54. After that, after heat treatment, the crystallinity of the capacitor dielectric film 54 was measured. A platinum film was used as the noble metal film 44, and a platinum oxide film was used as the noble metal oxide film 46. A PZT film was used as the capacitor dielectric film 54. An iridium oxide film was used as the conductive film 56 that becomes a part of the upper electrode 60.

  The orientation ratio in the (222) direction is obtained by dividing the integrated intensity of the (222) orientation by the sum of the integrated intensity of the (222) orientation, the integrated intensity of the (100) orientation, and the integrated intensity of the (101) orientation. It is.

  FIG. 15A is a graph showing the integrated intensity of the (100) orientation of the capacitor dielectric film in the method for manufacturing a semiconductor device according to Comparative Example 1. FIG. FIG. 15B is a graph showing the integrated intensity of the (101) orientation of the capacitor dielectric film in the semiconductor device manufacturing method according to Comparative Example 1. FIG. 16A is a graph showing the integrated intensity of the (111) orientation of the capacitor dielectric film in the method of manufacturing a semiconductor device according to Comparative Example 1. FIG. 16B is a graph showing the orientation ratio in the (222) direction of the capacitor dielectric film in the method of manufacturing a semiconductor device according to Comparative Example 1. The mark ■ indicates the maximum value in the wafer, the mark ◆ indicates the average value in the wafer, and the mark ▲ indicates the minimum value in the wafer. Comparative Example 1 is a case where a capacitor dielectric film is directly formed on a noble metal film serving as a lower electrode. Also in Comparative Example 1, a conductive film to be a part of the upper electrode was formed on the capacitor dielectric film, and after that, after heat treatment, the crystallinity of the capacitor dielectric film was measured. A platinum film was used as the noble metal film serving as the lower electrode. A PZT film was used as the capacitor dielectric film. As the conductive film that becomes a part of the upper electrode, an iridium oxide film was used.

  As can be seen from FIG. 15A, in the method of manufacturing the semiconductor device according to Comparative Example 1, the variation in the integrated intensity of the (100) orientation is relatively large. Further, as can be seen from FIG. 15B, in the method of manufacturing a semiconductor device according to Comparative Example 1, the variation in the integrated intensity of the (101) orientation is relatively small. As can be seen from FIG. 16A, in the method of manufacturing a semiconductor device according to Comparative Example 1, the variation in the integrated intensity of the (111) orientation is relatively large. Further, as can be seen from FIG. 16B, in the method of manufacturing a semiconductor device according to Comparative Example 1, the variation in the orientation rate in the (222) direction is relatively large.

  As can be seen from FIG. 14A, in the semiconductor device manufacturing method according to the present embodiment, the variation in the integrated intensity of the (111) orientation is extremely small. Further, as can be seen from FIG. 14B, in the method for manufacturing the semiconductor device according to the present embodiment, the variation in the orientation rate in the (222) direction is extremely small.

  From these facts, it is understood that the crystallinity of the capacitor dielectric film 54 can be made uniform also by this embodiment.

  In this way, the amorphous noble metal oxide film 45 a may be formed on the noble metal film 44 by oxidizing the surface of the noble metal film 44 using a chemical solution.

[Third Embodiment]
A method for fabricating a semiconductor device according to the third embodiment will be described with reference to FIGS. 17 to 19 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment. The same components as those in the method of manufacturing the semiconductor device according to the first or second embodiment shown in FIGS. 1 to 16 are denoted by the same reference numerals, and description thereof is omitted or simplified.

  The semiconductor device manufacturing method according to the present embodiment is mainly characterized in that the amorphous noble metal oxide film 45b is formed on the noble metal film 44 by oxidizing the surface of the noble metal film 44 in an atmosphere containing oxygen. There is.

  First, from the step of forming the element isolation region 12 to the step of forming the adhesion film 43 on the semiconductor substrate 10, the manufacture of the semiconductor device according to the first embodiment described above with reference to FIGS. 2A to 3B. Since it is the same as the method, description is abbreviate | omitted (refer Fig.17 (a)).

  Next, a noble metal film (conductive film) 44 is formed on the entire surface by, eg, sputtering, in the same manner as in the method of manufacturing the semiconductor device according to the first embodiment described above with reference to FIG. b)). As the conductive film 44, for example, a platinum film is formed.

  Here, the case where a platinum film is formed as the conductive film 44 has been described as an example, but the conductive film 44 is not limited to the platinum film. As the conductive film 44, a rhodium film, an osmium film, a palladium film, or the like may be formed. Alternatively, the conductive film 44 may be formed using these stacked films.

Next, as shown in FIG. 17C, an amorphous noble metal oxide film 45 b is formed on the noble metal film 44 by oxidizing the surface of the noble metal film 44 in an atmosphere containing oxygen. When a platinum film is formed as the noble metal film 44, a platinum oxide film is formed as the amorphous noble metal oxide film 45b. The noble metal oxide film 45b is reduced in a later step to become a noble metal film 46b (see FIG. 16B). The noble metal film 46 b formed by reducing the noble metal oxide film 45 b becomes a part of the lower electrode 48 of the capacitor 62. As a gas introduced into the film formation chamber, for example, O ₂ gas is used. The flow rate of O ₂ gas is, for example, 2 liters / minute. The temperature in the film formation chamber is, for example, 0 ° C. or higher and 100 ° C. or lower. More preferably, the temperature in the deposition chamber is set to 0 ° C. or higher and 50 ° C. or lower. When the temperature in the deposition chamber is 50 ° C. or lower, the film quality of the noble metal oxide film 45b is surely amorphous. Here, the temperature in the deposition chamber is about room temperature. The time for oxidizing the surface of the noble metal film 44 is, for example, 3 hours or more. Here, the time for oxidizing the surface of the noble metal film 44 is about 6 hours. As described above in the first embodiment, the thickness of the noble metal oxide film 45 formed on the noble metal film 44 is preferably 0.1 nm or more and 3 nm or less. Also in this embodiment, for the same reason as in the first embodiment, the thickness of the noble metal oxide film 45b formed on the noble metal film 44 is preferably 0.1 nm or more and 3 nm or less. Here, the thickness of the noble metal oxide film 45a is, for example, about 0.2 nm to 0.3 nm. Thus, a noble metal oxide film 45 b is formed on the noble metal film 44.

  Here, the case where a platinum oxide film is formed as the amorphous noble metal oxide film 45b has been described as an example, but the amorphous noble metal oxide film 45b is not limited to the platinum oxide film. For example, a noble metal oxide film 45b, which is an amorphous rhodium oxide film, may be formed by forming a rhodium film as the noble metal film 44 and oxidizing the surface of the rhodium film using a chemical solution. Alternatively, a noble metal oxide film 45b which is an amorphous osmium oxide film may be formed by forming an osmium film as the noble metal film 44 and oxidizing the surface of the osmium film using a chemical solution. Alternatively, a noble metal oxide film 45b, which is an amorphous palladium oxide film, may be formed by forming a palladium film as the noble metal film 44 and oxidizing the surface of the palladium film using a chemical solution.

  Next, a ferroelectric film 50 is formed on the entire surface by, for example, a sputtering method or a sol-gel method in the same manner as in the method for manufacturing the semiconductor device according to the first embodiment described above with reference to FIG. 18 (a)).

  Next, the ferroelectric film 50 is crystallized in an atmosphere containing oxygen by, for example, the RTA method in the same manner as in the method for manufacturing the semiconductor device according to the first embodiment described above with reference to FIG. . Even when the ferroelectric film 50 is formed on the amorphous noble metal oxide film 45 and the ferroelectric film 50 is crystallized by heat treatment, the crystallinity of the noble metal film 44 is not sufficiently uniform. A ferroelectric film 50 having uniform crystallinity is obtained. Further, by this heat treatment, the noble metal oxide film 45b is reduced and changed to the noble metal film 46b (see FIG. 18B). Further, during this heat treatment, oxygen is released from the noble metal oxide film 45b. The oxygen released from the noble metal oxide film 45b compensates for oxygen vacancies in the ferroelectric film 50. For this reason, the ferroelectric film 50 with good crystallinity can be obtained also in this embodiment.

  When a platinum oxide film is formed when forming the noble metal oxide film 45b, a noble metal film (conductive film) 46b which is a platinum film is formed. When a rhodium oxide film is formed when forming the noble metal oxide film 45b, a noble metal film 46b which is a rhodium film is formed. Further, when an osmium oxide film is formed when forming the noble metal oxide film 45b, a noble metal film 46b which is an osmium film is formed. Further, when a palladium oxide film is formed when forming the noble metal oxide film 45b, a noble metal film 46b which is a palladium film is formed.

  Thereafter, the process from the formation of the ferroelectric film 52 to the process of forming the wiring 90 is the same as the manufacturing method of the semiconductor device according to the first embodiment described above with reference to FIGS. 4C to 10B. Therefore, explanation is omitted.

  Thus, the semiconductor device according to the present embodiment is manufactured (see FIG. 19).

(Evaluation results)
Next, the evaluation results of the crystallinity of the capacitor dielectric film will be described with reference to FIGS.

  FIG. 20A is a graph showing the integrated intensity of the (111) orientation of the capacitor dielectric film in the manufacturing method of the semiconductor device according to the present embodiment. FIG. 20B is a graph showing the orientation ratio in the (222) direction of the capacitor dielectric film in the method for manufacturing the semiconductor device according to the present embodiment. 20A and 20B, the horizontal axis indicates the wafer number, and the vertical axis indicates the integrated intensity of the (111) orientation. The mark ■ indicates the maximum value in the wafer, the mark ◆ indicates the average value in the wafer, and the mark ▲ indicates the minimum value in the wafer. A conductive film 56 to be a part of the upper electrode 60 was formed on the capacitor dielectric film 54. After that, after heat treatment, the crystallinity of the capacitor dielectric film 54 was measured. A platinum film was used as the noble metal film 44, and a platinum oxide film was used as the noble metal oxide film 46. A PZT film was used as the capacitor dielectric film 54. An iridium oxide film was used as the conductive film 56 that becomes a part of the upper electrode 60. Wafer numbers 1 to 10 show a case where the surface of the noble metal film 44 is oxidized by being left in the atmosphere for 6 hours. Wafer numbers 11 to 20 show a case where the surface of the noble metal film 44 is oxidized by being left in the atmosphere for 12 hours.

  As can be seen from FIG. 20A, in the semiconductor device manufacturing method according to the present embodiment, the variation in the integrated intensity of the (111) orientation is extremely small. Further, as can be seen from FIG. 20B, in the semiconductor device manufacturing method according to the present embodiment, the variation in the orientation rate in the (222) direction is extremely small.

  From these facts, it is understood that the crystallinity of the capacitor dielectric film 54 can be made uniform also by this embodiment.

  FIG. 21 is a graph showing an analysis result by XPS (X-Ray Photoelectron Spectroscopy). The horizontal axis represents the binding energy (eV), and the vertical axis represents the photoelectron intensity. FIG. 21A shows a case where the surface of the noble metal film 44 is oxidized by leaving it in a 100% oxygen atmosphere for 10 minutes. In the case of FIG. 21A, the temperature in the film forming chamber was set to 30 ° C. FIG. 21B shows a case where the surface of the noble metal film 44 is oxidized by being left in the atmosphere for 6 hours. In the case of FIG. 21B, the temperature at the time of oxidation was room temperature.

  In both FIG. 21 (a) and FIG. 21 (b), a peak corresponding to platinum oxide appears.

  In the case of FIG. 21A, the thickness of the noble metal oxide film 45b formed on the surface of the noble metal film 44 is about 0.1 nm. In the case of FIG. 21B, the film thickness of the noble metal oxide film 45b formed on the surface of the noble metal film 44 is about 0.2 nm.

  From these, it can be seen that the thickness of the noble metal oxide film 45b is preferably 0.1 nm or more.

  In addition, these facts show that the noble metal oxide film 45b can be formed on the surface of the noble metal film 44 even when the film forming temperature is relatively low.

  In this way, the amorphous noble metal oxide film 45 b may be formed on the noble metal film 44 by oxidizing the surface of the noble metal film 44 in an atmosphere containing oxygen.

[Fourth Embodiment]
The semiconductor device and the manufacturing method thereof according to the fourth embodiment will be described with reference to FIGS. FIG. 22 is a process cross-sectional view illustrating the semiconductor device according to the present embodiment. The same components as those of the semiconductor device manufacturing method according to the first to third embodiments shown in FIGS. 1 to 21 are denoted by the same reference numerals, and description thereof will be omitted or simplified.

(Semiconductor device)
The semiconductor device manufacturing method according to the present embodiment will be explained with reference to FIGS.

  The semiconductor device according to the present embodiment has a memory cell structure of a stack type.

  As shown in FIG. 22, an element isolation region 12 that defines an element region is formed in the semiconductor substrate 10. As the semiconductor substrate 10, for example, an N-type or P-type silicon substrate is used. For example, a P-type well 14 is formed in the semiconductor substrate 10 in which the element isolation region 12 is formed.

  On the semiconductor substrate 10 on which the well 14 is formed, a gate electrode (word line) 18 is formed via a gate insulating film 16. A sidewall insulating film 20 is formed on the side wall portion of the gate electrode 18.

  Source / drain diffusion layers 22 are formed on both sides of the gate electrode 18 on which the sidewall insulating film 20 is formed.

  Silicide layers 24a and 24b are formed on the gate electrode 18 and on the source / drain diffusion layer 22, respectively. The silicide layer 24b on the source / drain diffusion layer 22 functions as a source / drain electrode.

  Thus, the transistor 26 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  An insulating film (antioxidation insulating film) 28 is formed on the semiconductor substrate 10 on which the transistor 26 is formed. The film thickness of the insulating film 28 is, for example, 200 nm. As the insulating film 28, for example, a silicon oxynitride film is used.

  An interlayer insulating film 30 is formed on the semiconductor substrate 10 on which the insulating film 28 is formed. The thickness from the surface of the semiconductor substrate 10 to the surface of the interlayer insulating film 30 is, for example, 700 nm. For example, a silicon oxide film is used as the interlayer insulating film 30. The surface of the interlayer insulating film 30 is planarized.

  Contact holes 32 reaching the source / drain electrodes 24 b are formed in the interlayer insulating film 30 and the insulating film 28.

  An adhesion film 34 is formed in the contact hole 32. As the adhesion film 34, for example, a laminated film in which a Ti film and a TiN film are sequentially laminated is used. The thickness of the Ti film is, for example, 30 nm. The thickness of the TiN film is, for example, 20 nm.

  A conductor plug 36 is embedded in the contact hole 32 in which the adhesion film 34 is formed. As a material of the conductor plug 36, for example, tungsten is used.

  For example, an antioxidant film 100 is formed on the interlayer insulating film 30 in which the conductor plugs 36 are embedded. The film thickness of the antioxidant film 100 is 130 nm, for example. As the antioxidant film 100, for example, a silicon nitride oxide film is used. The antioxidant film 100 is for preventing the upper surface of the conductor plug 36 from being oxidized after the conductor plug 36 is embedded in the interlayer insulating film 36.

  Although the case where a silicon nitride oxide film is used as the antioxidant film 100 has been described as an example here, the antioxidant film 100 is not limited to the silicon nitride oxide film. For example, a silicon nitride film or an aluminum oxide film may be formed as the antioxidant film 100.

  For example, a silicon oxide film 102 is formed on the antioxidant film 100. The film thickness of the silicon oxide film 102 is, eg, 300 nm.

  An interlayer insulating film 104 is formed by the antioxidant film 100 and the silicon oxide film 102.

  A contact hole 106 reaching the conductor plug 36 is formed in the interlayer insulating film 104.

  An adhesive film 108 is formed in the contact hole 42. As the adhesion film 108, for example, a laminated film in which a Ti film and a TiN film are sequentially laminated is used. The thickness of the Ti film is, for example, 30 nm. The thickness of the TiN film is set to 20 nm, for example.

  A conductor plug 110 is formed in the contact hole 106 in which the adhesion film 108 is formed. For example, tungsten is used as the material of the conductor plug 110. The conductor plug 110 is embedded in the interlayer insulating film 40 by the CMP method. For this reason, when the conductor plug 110 is embedded by CMP, the upper portion of the conductor plug 110 is excessively polished, and the height of the upper surface of the conductor plug 110 may be lower than the height of the upper surface of the interlayer insulating film 104. In such a case, the concave portion 112 is formed at a location where the conductor plug 110 is embedded. The depth of the recess 112 is, for example, about 20 to 50 nm. When an adhesion film 116 described later is formed on the conductor plug 110 and the interlayer insulating film 104 in which such a depression 112 is formed, a depression is also formed on the surface of the adhesion film 116 reflecting the depression 112. Then, when the antioxidant film 118 is formed on such an adhesion film 116, a recess is also formed on the surface of the antioxidant film 118 reflecting the recess. It is difficult to form the lower electrode 48, the capacitor dielectric film 54, and the upper electrode 60 with good orientation on the antioxidant film 118 in which such a recess is formed. In the present embodiment, as shown in FIG. 22, a base film 114 is formed so as to fill the recess 112 on the conductor plug 110 and the interlayer insulating film 104. The surface of the base film 114 is planarized by a CMP method. The film thickness of the base film 114 is about 50 to 110 nm, for example. Here, the film thickness of the base film 114 is 50 nm.

  An adhesion film 116 is formed on the base film 114. The adhesion film 116 is for improving the crystallinity of an oxygen barrier film 118 described later and improving the adhesion between the oxygen barrier film 118 and the interlayer insulating film 104. Since the adhesion film 116 is formed on the flat base film (planarization layer) 114, the surface of the adhesion film 116 is flat. As the adhesion film 116, for example, a TiN film is formed. The film thickness of the adhesion film 116 is, for example, about 20 nm.

  Here, the case where a TiN film is formed as the adhesion film 116 has been described as an example, but the adhesion film 116 is not limited to the TiN film. A material capable of improving the crystallinity of the oxygen barrier film 118 and improving the adhesion between the oxygen barrier film 118 and the base film 114 can be appropriately used as the material of the adhesion film 116. For example, Ir, Pt or the like may be used as the material of the adhesion film 116.

  A conductive oxygen barrier film (oxygen diffusion preventing film) 118 is formed on the adhesion film 116. The film thickness of the oxygen barrier film 118 is, for example, 100 nm. As the oxygen barrier film 118, for example, a TiAlN film is used. The oxygen barrier film 118 is for preventing the upper surface of the conductor plug 110 from being oxidized after the conductor plug 110 is embedded in the interlayer insulating film 104.

  Here, the case where TiAlN is used as the material of the oxygen barrier film 118 has been described as an example, but the material of the oxygen barrier film 118 is not limited to TiAlN. TiAlON, TaAlN, TaAlON, or the like may be appropriately used as the material of the oxygen barrier film 118.

  A conductive film 44a is formed on the oxygen barrier 118 film. A noble metal film is used as the conductive film 44a. More specifically, for example, an iridium (Ir) film is used as the conductive film 44a. The film thickness of the conductive film 44a is, for example, 100 nm.

  Note that although the case where an iridium film is used as the conductive film 44a has been described as an example here, the conductive film 44a is not limited to the iridium film. For example, a ruthenium film or the like may be used as the conductive film 44a. Further, the conductive film 44a is not limited to a single layer film, and the conductive film 44a may be formed of a stacked film.

A conductive film 46c is formed on the conductive film 44a. The conductive film 46c is a noble metal film. The noble metal contained in the conductive film 46c and the noble metal contained in the conductive film 44a are preferably the same element. As will be described later, in the step of forming a film on the conductive film 44a, an amorphous noble metal oxide film 45c is formed (see FIG. 27A). The amorphous noble metal oxide film 45c is reduced by a heat treatment or the like in a later process to become a noble metal film 46c. When the noble metal contained in the noble metal oxide film 45c and the noble metal contained in the conductive film 44a are the same element, the conductive film 46c and the conductive film 44a may not be distinguished. Further, since the conductive film 46c is obtained by reducing the amorphous noble metal oxide film 45c, the crystal grain size of the conductive film 46c may be smaller than the crystal grain size of the conductive film 44a. When the amorphous noble metal oxide film 45c is formed, for example, when an iridium oxide film (IrO _X film) is formed, the iridium oxide film is reduced to form an iridium film in a heat treatment or the like in a later process, and the iridium film A conductive film 46c is formed.

  Here, the case where the iridium oxide film is formed at the stage of forming the amorphous noble metal oxide film 45c and the conductive film 46c is formed of the iridium film has been described as an example. However, the conductive film 46c is an iridium film. It is not limited to. For example, when an amorphous ruthenium oxide film is formed when forming the noble metal oxide film 45c, the ruthenium oxide film is reduced to a ruthenium film by a heat treatment or the like in a later process, and the conductive film 46c which is a ruthenium film Is formed. As described above, the amorphous noble metal oxide film 45c may be a ruthenium oxide film or the like, and the conductive film 46c obtained by reducing the amorphous noble metal oxide film 45c may be a ruthenium film or the like.

  Thus, the lower electrode 48a of the capacitor 62 is formed by the conductive film 44a and the conductive film 46c.

A ferroelectric film 50a is formed on the lower electrode 48a. The ferroelectric film 50 is formed by, for example, MOCVD (Metal Organic Chemical Vapor Deposition) method. As the ferroelectric film 50a, for example, a PbZr _X Ti _1-X O ₃ film (0 ≦ X ≦ 1) (PZT film) is used. The film thickness of the ferroelectric film 50a is, for example, 100 nm. When the ferroelectric film 50a is formed by the MOCVD method, the ferroelectric film 50a is formed in a crystallized state.

Here, the case where a PZT film is used as the ferroelectric film 50a has been described as an example, but the ferroelectric film 50a is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 50a. Further, a ferroelectric film having a bismuth layer structure may be used as the ferroelectric film 50a. The ferroelectric film 50a of bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used.

A ferroelectric film 52 is formed on the ferroelectric film 50a. The ferroelectric film 52 is formed by sputtering, for example. The material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50a. As the ferroelectric film 52, for example, a PbZr _X Ti _1-X O ₃ film (PZT film) (0 ≦ X ≦ 1) is used. The film thickness of the ferroelectric film 52 is, for example, 1 to 30 nm. Here, the film thickness of the ferroelectric film 52 is about 20 nm. The ferroelectric film 52 is crystallized by a heat treatment to be described later.

Although the case where a PZT film is used as the ferroelectric film 52 has been described as an example here, the ferroelectric film 52 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 52. Further, as the ferroelectric film 52, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 52 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare-earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 films (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used. As described above, the material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50a.

  Thus, the capacitor dielectric film 54 a is formed by the ferroelectric film 50 a and the ferroelectric film 52.

  A conductive film 56 is formed on the capacitor dielectric film 54a. The conductive film 56 is formed by, for example, a sputtering method. As the conductive film 56, for example, an iridium oxide film is used. The film thickness of the conductive film 56 is about 50 nm, for example.

A conductive film 58 is formed on the conductive film 56. As the conductive film 58, for example, an iridium oxide film is used. The conductive film 58 is formed by, for example, a sputtering method. The film thickness of the conductive film 58 is, for example, about 100 to 300 nm. Here, the film thickness of the conductive film 58 is about 200 nm. The composition of the iridium oxide film used as the conductive film 58 is preferably IrO ₂ which is a stoichiometric composition. This is because the iridium oxide film having the stoichiometric composition does not have a catalytic action on hydrogen and can prevent the capacitor dielectric film 54a from being reduced by hydrogen.

Note that although the case where an iridium oxide film is used as the conductive film 58 is described here as an example, the conductive film 58 is not limited to an iridium oxide film. For example, Ir, Ru, Rh, Re, Os, Pd, or an oxide thereof may be used as the material of the conductive film 58. Alternatively, a conductive oxide such as SrRuO ₃ may be used as the material of the conductive film 58. Further, these stacked films may be used as the conductive film 58.

  A hydrogen barrier film 120 is formed on the conductive film 58. As the hydrogen barrier film 120, for example, an iridium film is used. The hydrogen barrier film 120 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen.

Here, the case where an iridium film is used as the hydrogen barrier film 120 has been described as an example, but the hydrogen barrier film 120 is not limited to the iridium film. For example, a Pt film, a SrRuO ₃ film, or the like may be used as the hydrogen barrier film 120.

  The upper electrode 60 a is formed by the conductive film 56, the conductive film 58, and the hydrogen barrier film 120.

  Thus, a capacitor 62a having the lower electrode 48a, the capacitor dielectric film 54a, and the upper electrode 60a is formed.

  A protective film 122 is formed on the interlayer insulating film 104 on which the capacitor 62a is formed so as to cover the capacitor 62a. The film thickness of the protective film 122 is, for example, about 20 nm. As the protective film 122, for example, an aluminum oxide film is used. The protective film 122 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen.

  A protective film 124 is further formed on the protective film 122. The film thickness of the protective film 124 is about 38 nm, for example. As the protective film 124, for example, an aluminum oxide film is used as in the protective film 122. The protective film 124 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen in combination with the protective film 122.

  An interlayer insulating film 68 is formed on the protective film 124. The film thickness of the interlayer insulating film 68 is, for example, 1500 nm. For example, a silicon oxide film is used as the interlayer insulating film 68. The surface of the interlayer insulating film 68 is planarized.

  A protective film 70 is formed on the interlayer insulating film 68. The film thickness of the protective film 70 is, for example, 20-100 nm. As the material of the protective film 70, for example, aluminum oxide is used in the same manner as the protective films 122 and 124. Similar to the protective films 122 and 124, the protective film 70 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen. In order to form the protective film 70 on the planarized interlayer insulating film 68, the protective film 70 is formed flat.

  An interlayer insulating film 72 is formed on the protective film 70. The film thickness of the interlayer insulating film 72 is, for example, about 800 to 1000 nm. As the interlayer insulating film 72, for example, a silicon oxide film is formed. The surface of the interlayer insulating film 72 is planarized.

  A contact hole 126 a reaching the conductor plug 36 is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, the protective film 122, and the interlayer insulating film 104.

  A contact hole 126b reaching the upper electrode 60a is formed in the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, and the protective film 122.

  An adhesion film 128 is formed in the contact holes 126a and 126b. The adhesion film 128 is formed of, for example, a laminated film of a Ti film and a TiN film. The thickness of the Ti film is, for example, 30 nm. The thickness of the TiN film is, for example, 20 nm.

  Conductor plugs 130a and 130b are formed in the contact holes 126a and 126b in which the adhesion film 128 is formed. As a material of the conductor plugs 130a and 130b, for example, tungsten is used.

  A wiring 90 is formed on the interlayer insulating film 72 in which the conductor plugs 130a and 130b are embedded. The wiring 90 is formed, for example, by sequentially stacking a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88.

  On the interlayer insulating film 72 on which the wiring 90 is formed, an interlayer insulating film (not shown), a conductor plug (not shown), a wiring (not shown) and the like are further formed over a plurality of layers. .

  Thus, the semiconductor device according to the present embodiment is formed.

(Method for manufacturing semiconductor device)
Next, the method for fabricating the semiconductor device according to the present embodiment will be explained with reference to FIGS. 23 to 31 are process cross-sectional views illustrating the method for fabricating the semiconductor device according to the present embodiment.

  First, as shown in FIG. 23A, an element isolation region 12 that defines an element region is formed on a semiconductor substrate 10 by, for example, an STI method. As the semiconductor substrate 10, for example, an N-type or P-type silicon substrate is used. The method for forming the element isolation region 12 is not limited to the STI method. For example, the element isolation region 12 may be formed by the LOCOS method.

  Next, the well 14 is formed by introducing dopant impurities by ion implantation. For example, a P-type dopant impurity is used as the dopant impurity. For example, boron is used as the P-type dopant impurity. When a P-type dopant impurity is used as the dopant impurity, a P-type well 14 is formed.

  Next, the gate insulating film 16 is formed on the element region by, eg, thermal oxidation. The film thickness of the gate insulating film 16 is, for example, about 6 to 7 nm.

  Next, a polysilicon film 18 is formed by, eg, CVD. The film thickness of the polysilicon film 18 is about 200 nm, for example. The polysilicon film 18 becomes a gate electrode (word line).

  Here, the case where the polysilicon film 18 is formed as the film to be the gate electrode has been described as an example, but the film to be the gate electrode is not limited to the polysilicon film. For example, an amorphous silicon film or the like may be used.

  Next, the polysilicon film 18 is patterned using a photolithography technique. Thus, the gate electrode (word line) 18 is formed by the polysilicon film.

  Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by, for example, ion implantation using the gate electrode 18 as a mask. For example, an N-type dopant impurity is used as the dopant impurity. For example, phosphorus is used as the N-type dopant impurity. Thereby, an extension region (not shown) constituting a shallow region of the extension source / drain is formed.

  Next, an insulating film is formed on the entire surface by, eg, CVD. For example, a silicon oxide film is formed as the insulating film. The thickness of the insulating film is, for example, about 300 nm.

  Next, the insulating film is anisotropically etched. Thus, the sidewall insulating film 20 is formed on the side wall portion of the gate electrode 18 from the insulating film.

  Next, dopant impurities are introduced into the semiconductor substrate 10 on both sides of the gate electrode 18 by, for example, ion implantation using the gate electrode 18 on which the sidewall insulating film 20 is formed as a mask. For example, an N-type dopant impurity is used as the dopant impurity. For example, arsenic is used as the N-type dopant impurity. Thereby, an impurity diffusion layer (not shown) constituting a deep region of the extension source / drain is formed. A source / drain diffusion layer 22 is formed by the extension region and the deep impurity diffusion layer.

  Next, a refractory metal film (not shown) is formed on the entire surface by, eg, sputtering. For example, a cobalt film is formed as the refractory metal film.

  Next, by performing heat treatment, the surface layer portion of the semiconductor substrate 10 and the refractory metal film are reacted, and the upper portion of the gate electrode 18 and the refractory metal film are reacted.

  Next, the unreacted refractory metal film is removed by etching, for example, by wet etching.

  Thus, for example, a source / drain electrode 24b of cobalt silicide is formed on the source / drain diffusion layer 22. Further, a silicide layer 24a of cobalt silicide, for example, is formed on the gate electrode 18.

  Thus, the transistor 26 having the gate electrode 18 and the source / drain diffusion layer 22 is formed.

  Next, an insulating film (antioxidation film) 28 is formed on the entire surface by, eg, plasma CVD. As the insulating film 28, for example, a silicon oxynitride film is formed. The film thickness of the insulating film 28 is, for example, 200 nm.

  Next, an interlayer insulating film 30 is formed on the entire surface by, eg, plasma TEOSCVD. For example, a silicon oxide film is formed as the interlayer insulating film 30. The film thickness of the interlayer insulating film 30 is, for example, 1 μm.

  Next, the surface of the interlayer insulating film 30 is planarized by, eg, CMP. Thus, the height from the surface of the semiconductor substrate 10 to the surface of the interlayer insulating film 30 is, for example, about 700 nm (see FIG. 23B).

  Next, as shown in FIG. 23C, a contact hole 32 reaching the source / drain electrode 24b is formed by using a photolithography technique. The diameter of the contact hole 32 is, for example, 0.25 μm.

  Next, a Ti film is formed on the entire surface by, eg, sputtering. The thickness of the Ti film is about 30 nm, for example.

  Next, a TiN film is formed on the entire surface by, eg, sputtering. The thickness of the TiN film is, for example, about 20 nm.

  Thus, the adhesion film 34 is formed by the Ti film and the TiN film.

  Next, a conductive film 36 is formed on the entire surface by, eg, CVD. As the conductive film 36, for example, a tungsten film is formed. The film thickness of the conductive film 36 is about 300 nm, for example.

  Next, the conductive film 36 and the adhesion film 34 are polished by CMP, for example, until the surface of the interlayer insulating film 30 is exposed. Thus, for example, a tungsten conductor plug 36 is buried in the contact hole 32 (see FIG. 24A).

  Next, as shown in FIG. 24B, a silicon oxynitride film 100 is formed on the entire surface by, eg, plasma CVD. The film thickness of the silicon oxynitride film 100 is, for example, 130 nm.

  Note that although the silicon nitride oxide film 100 is formed here, a silicon nitride film, an aluminum oxide film, or the like may be formed instead of the silicon nitride oxide film 100.

  Next, as shown in FIG. 24C, a silicon oxide film 102 is formed on the entire surface by, eg, plasma TEOSCVD. The film thickness of the silicon oxide film 102 is, eg, 300 nm.

  The silicon nitride oxide film 100 and the silicon oxide film 102 form an interlayer insulating film 104.

  Next, as shown in FIG. 25A, a contact hole 106 reaching the conductor plug 36 is formed in the interlayer insulating film 104 by using a photolithography technique.

  Next, a Ti film is formed on the entire surface by, eg, sputtering. The thickness of the Ti film is about 30 nm, for example.

  Next, a TiN film is formed on the entire surface by, eg, sputtering. The thickness of the TiN film is, for example, about 20 nm.

  Thus, the adhesion film 108 is formed by the Ti film and the TiN film.

  Next, the conductive film 110 is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film 110. The film thickness of the conductive film 110 is, for example, about 300 nm.

  Next, the conductive film 110 and the adhesion film 108 are polished by, for example, a CMP method until the surface of the interlayer insulating film 104 is exposed. When polishing the conductive film 110 and the adhesion film 108, for example, a polishing agent is used such that the polishing rate for the conductive film 110 and the adhesion film 108 is faster than the polishing rate for the interlayer insulating film 104. As such an abrasive, for example, an abrasive (product name: SSW2000) manufactured by Cabot Microelectronics is used. When the conductive film 110 and the adhesion film 108 are polished using such an abrasive, the conductive film 110 and the adhesion film 108 are excessively polished, and as shown in FIG. May be lower than the height of the upper surface of the interlayer insulating film 104. In such a case, the concave portion 112 is formed at a location where the conductor plug 110 is embedded. The depth of the recess 112 is, for example, about 20 to 50 nm. Thus, a tungsten conductor plug 110, for example, is buried in the contact hole 106.

Next, the surface of the interlayer insulating film 104 is processed by exposing the surface of the interlayer insulating film 104 to a plasma atmosphere generated using, for example, NH ₃ gas (plasma processing). In this embodiment, the surface of the interlayer insulating film 104 is exposed to a plasma atmosphere generated using NH ₃ gas by bonding oxygen atoms on the surface of the interlayer insulating film 104 to NH groups in a later process. This is for preventing Ti atoms from being trapped by oxygen atoms on the surface of the interlayer insulating film 104 when the Ti film 113 is formed on the interlayer insulating film 104.

The conditions for the plasma treatment are as follows. A parallel plate type plasma processing apparatus is used as the plasma processing apparatus. The position of the counter electrode is, for example, a position separated from the semiconductor substrate 10 by about 9 mm (350 mils). The pressure in the chamber when performing the plasma treatment is, for example, about 266 Pa (2 Torr). The substrate temperature is 400 ° C., for example. The flow rate of NH ₃ gas introduced into the chamber is set to 350 sccm, for example. The high frequency power applied to the semiconductor substrate 10 is, for example, 13.56 MHz and 100 W. The high frequency power applied to the counter electrode is, for example, 350 kHz and 55 W. The application time of the high frequency power is, for example, 60 seconds.

  Next, as shown in FIG. 25C, a Ti film 113 is formed on the entire surface by, eg, sputtering. The thickness of the Ti film 113 is, for example, about 100 to 300 nm. Here, the thickness of the Ti film 113 is set to about 100 nm. Since the surface of the interlayer insulating film 104 is treated as described above, Ti atoms deposited on the interlayer insulating film 104 can freely move on the surface of the interlayer insulating film 104 without being captured by oxygen atoms. Can do. Therefore, a high-quality Ti film 113 that is self-oriented in the direction of (002) is formed on the interlayer insulating film 104.

  The conditions for forming the Ti film 113 are, for example, as follows. That is, the distance between the semiconductor substrate 10 and the target is, for example, 60 mm. The pressure in the film formation chamber is 0.15 Pa. The atmosphere in the film formation chamber is, for example, an Ar atmosphere. The substrate temperature is set to 20 ° C., for example. The supplied DC power is, for example, 2.6 kW. The time for supplying DC power is, for example, 5 seconds.

  Next, heat treatment is performed in a nitrogen atmosphere by, for example, the RTA method. The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds. By this heat treatment, the Ti film 113 described above becomes the TiN film 114 (see FIG. 26A). Thus, the base film 114 which is a (111) -oriented TiN film is obtained.

  Here, the case where a TiN film is used as the base film 114 has been described as an example, but the base film 114 is not limited to a TiN film. For example, the base film 114 may be formed of a tungsten film, a silicon film, a copper film, or the like.

  Next, the surface of the base film 114 is polished by CMP. As the abrasive, for example, an abrasive (product name: SSW2000) manufactured by Cabot Microelectronics is used. Thus, a planarization layer 114 having a planarized surface is formed (see FIG. 26B). In the present embodiment, the surface of the base film 114 is flattened by forming the lower electrode 48a, the capacitor dielectric film 54a, and the upper electrode 60a with good orientation on the flattened base film 114. This is because it is possible. The film thickness of the base film 114 after polishing is, for example, about 50 to 100 nm. Here, the thickness of the base film 114 after polishing is about 50 nm.

Next, the surface of the foundation film 114 is treated (plasma treatment) by exposing the surface of the foundation film (planarization layer) 114 to a plasma atmosphere generated using, for example, NH ₃ gas.

  In the present embodiment, the plasma treatment is performed on the base film 114 for the following reason. That is, when the base film 114 is planarized by the CMP method, the crystal of the surface layer portion of the base film 114 is distorted by polishing. The lower electrode 48a with good crystallinity cannot be formed above the base film 114 in which the crystal of the surface layer is distorted, and as a result, the capacitor dielectric film 54a with good crystallinity cannot be formed. . On the other hand, when the plasma treatment is performed on the base film 114, the distortion of crystals in the surface layer portion of the base film 114 does not affect the upper film. As a result, the lower electrode 48a and the capacitor dielectric film 54a having good crystallinity can be formed on the base film 114. For this reason, in this embodiment, plasma treatment is performed on the base film 114.

  Next, a Ti film is formed on the entire surface by, eg, sputtering. The thickness of the Ti film is, for example, about 20 nm. Since a Ti film is formed on the base film 114 subjected to the plasma treatment, a high-quality Ti film is formed.

  Next, heat treatment is performed in a nitrogen atmosphere by, for example, the RTA method. The heat treatment temperature is set to 650 ° C., for example. The heat treatment time is, for example, 60 seconds. By this heat treatment, the Ti film described above becomes a TiN film. Thus, the adhesion film 116 is formed by the (111) -oriented TiN film (see FIG. 26C). The adhesion film 116 is for improving the crystallinity of the oxygen barrier film 118 formed in a later step and improving the adhesion between the oxygen barrier film 118 and the base film 114.

  Here, the case where the adhesion film 116 made of the TiN film is formed has been described as an example, but the adhesion film 116 is not limited to the TiN film. A material capable of improving the crystallinity of the oxygen barrier film 118 and improving the adhesion between the oxygen barrier film 118 and the base film 114 can be appropriately used as the material of the adhesion film 116. For example, the adhesion film 116 may be formed of an Ir film, a Pt film, or the like.

  Next, as shown in FIG. 26C, an oxygen barrier film (oxygen diffusion prevention film) 118 is formed on the entire surface by, eg, reactive sputtering. The film thickness of the oxygen barrier film 118 is, for example, about 100 nm. As the oxygen barrier film 118, for example, a TiAlN film is formed. The oxygen barrier film 118 is for preventing the upper surface of the conductor plug 110 from being oxidized after the conductor plug 110 is embedded in the interlayer insulating film 104.

  The conditions for forming the oxygen barrier film 118 are, for example, as follows. That is, a target formed of a TiAl alloy is used as the target. The atmosphere in the chamber is an atmosphere made of a mixed gas of Ar gas and nitrogen gas. The flow rate of Ar gas is 40 sccm, for example. The flow rate of nitrogen gas is, for example, 10 sccm. The pressure in the chamber is, for example, 253.3 Pa. The substrate temperature is 400 ° C., for example. The sputtering power is set to 1 kW, for example.

  Here, the case where TiAlN is used as the material of the oxygen barrier film 118 has been described as an example, but the material of the oxygen barrier film 118 is not limited to TiAlN. A conductor capable of preventing oxygen diffusion can be used as a material for the oxygen barrier film 118 as appropriate. For example, TiAlON, TaAlN, TaAlON, or the like may be used as the material of the oxygen barrier film 118.

  Next, as shown in FIG. 27A, a noble metal film (conductive film) 44a is formed on the entire surface by, eg, sputtering. The conductive film 44a becomes a part of the lower electrode 48a of the capacitor 62a. As the conductive film 44a, for example, an iridium film is formed. The film thickness of the conductive film 44a is, for example, about 100 nm. The film forming conditions for forming the conductive film 44 are, for example, as follows. The substrate temperature is set to 500 ° C., for example. For example, Ar gas is used as the gas introduced into the deposition chamber. The pressure in the film forming chamber is, for example, 0.11 Pa. The applied power is, for example, 0.5 kW.

  Here, the case where an iridium film is formed as the conductive film 44a has been described as an example, but the conductive film 44a is not limited to the iridium film. For example, a ruthenium film or the like may be used as the conductive film 44a. Further, the conductive film 44a is not limited to a single layer film, and the conductive film 44a may be formed of a stacked film.

Next, an amorphous (amorphous) noble metal oxide film 45c is formed on the entire surface by, eg, sputtering. The noble metal contained in the noble metal oxide film 45c and the noble metal contained in the conductive film 44a are preferably the same element. The noble metal oxide film 45c is reduced in a subsequent process to become the noble metal film 46c. The noble metal film 46c formed by reducing the noble metal oxide film 45c becomes a part of the lower electrode 48a of the capacitor 62a. As the amorphous noble metal oxide film 45c, for example, an iridium oxide film (IrO _X film) is formed.

  The thickness of the noble metal oxide film 45c is preferably 15 nm or more and 30 nm or less. The reason why the thickness of the noble metal oxide film 45c is 15 nm or more and 30 nm or less is as follows.

  That is, when the ferroelectric film 50a is formed by the MOCVD method in a subsequent process, the noble metal oxide film 45c is exposed to an atmosphere having a relatively strong reducing property. For this reason, when the thickness of the noble metal oxide film 45c is set to be relatively thin, the noble metal oxide film 45c is reduced before the formation of the ferroelectric film 50a is completed. In this case, a high-quality ferroelectric film 50a having uniform crystallinity may not be obtained. If the thickness of the noble metal oxide film 45c is set to 15 nm or more, the ferroelectric film 50a is formed in a state in which the noble metal oxide film 45c exists to some extent on the noble metal film 44a. Therefore, if the thickness of the noble metal oxide film 45c is set to 15 nm or more, it is possible to form a high-quality ferroelectric film 50a having uniform crystallinity.

  On the other hand, when the thickness of the noble metal oxide film 45c is greater than 30 nm, the crystallinity of the noble metal film 44a does not sufficiently affect the ferroelectric film 50a, and the ferroelectric film 50a having good crystallinity is obtained. It may not be possible. Further, in the subsequent heat treatment or the like, the entire noble metal oxide film 45c cannot be changed to the noble metal film 46c, and the noble metal oxide film 45c may remain in a part of the lower electrode 48a. If the noble metal oxide film 45c remains in a part of the lower electrode 48a, the capacitor 62a having good electrical characteristics may not be obtained. For this reason, the thickness of the noble metal oxide film 45c is preferably 30 nm or less.

  For this reason, in this embodiment, the thickness of the noble metal oxide film 45c is set to 15 nm or more and 30 nm or less. Here, the thickness of the noble metal oxide film 45c is, for example, about 25 nm. Thus, a noble metal oxide film 45c is formed on the noble metal film 44a.

The deposition temperature of the noble metal oxide film 45c is set to 60 ° C., for example. The gas introduced into the deposition chamber when forming the noble metal oxide film 45 is, for example, a mixed gas of Ar gas and O ₂ gas. The flow rate of Ar gas is, for example, 186 sccm. The flow rate of O ₂ gas is, for example, 14 sccm.

  Here, the case where an iridium oxide film is formed as the amorphous noble metal oxide film 45c has been described as an example, but the amorphous noble metal oxide film 45c is not limited to the iridium oxide film. For example, an amorphous ruthenium oxide film or the like may be formed as the amorphous noble metal oxide film 45c.

  Next, as shown in FIG. 27B, a ferroelectric film 50a is formed on the entire surface by, eg, MOCVD. When an iridium film or a ruthenium film is used as the noble metal film 44a that becomes a part of the lower electrode 48, the ferroelectric film 50a is preferably formed by MOCVD. For example, a PZT film is formed as the ferroelectric film 50a. The thickness of the PZT film is about 100 nm, for example.

  When the PZT film is formed by the MOCVD method, a raw material gas is generated by vaporizing each liquid raw material of Pb, Zr, and Ti, and the PZT film is formed using the raw material gas.

Each liquid raw material of Pb, Zr, and Ti is formed as follows. The liquid raw material of Pb is formed, for example, by dissolving Pb (DPM) ₂ in a solvent. For example, THF (tetrahydrofuran) is used as the solvent. The concentration of Pb (DPM) ₂ in the liquid raw material of Pb is, for example, about 0.3 mol / l. The liquid raw material of Zr is formed, for example, by dissolving Zr (dmhd) ₄ in a solvent. For example, THF is used as the solvent. The concentration of Zr (dmhd) ₄ in the Zr liquid source is, for example, about 0.3 mol / l. The liquid raw material of Ti is formed by, for example, dissolving [Ti (O—iOr) ₂ (DPM) ₂ ] in a solvent. For example, THF is used as the solvent. The concentration of [Ti (O—iOr) ₂ (DPM) ₂ ] in the Ti liquid raw material is, for example, about 0.3 mol / l.

  The PZT source gas is generated by introducing a Pb liquid source, a Zr liquid source and a Ti liquid source into a vaporizer together with a solvent, and vaporizing the liquid source with the vaporizer. For example, THF is used as the solvent. The supply amount of the solvent is, for example, 0.474 ml / min. The supply amount of the liquid raw material of Pb is, for example, 0.326 ml / min. The supply amount of the Zr liquid raw material is, for example, 0.200 ml / min. The supply amount of the Ti liquid raw material is, for example, 0.200 ml / min.

  The conditions for forming the ferroelectric film 50a by the MOCVD method are as follows. That is, the pressure in the film forming chamber is, for example, 665 Pa (5 Torr). The substrate temperature is set to 620 ° C., for example. The film formation time is, for example, 620 seconds.

  When formed under such conditions, the ferroelectric film 50a which is a PZT film is thus formed.

Here, the case where the PZT film is formed as the ferroelectric film 50a has been described as an example, but the ferroelectric film 50a is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 50a. Further, a ferroelectric film having a bismuth layer structure may be used as the ferroelectric film 50a. The ferroelectric film 50a of bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film ), SrBi ₄ Ti ₄ O ₁₅ film, and the like can be formed.

  When the ferroelectric film 50a is formed by the MOCVD method, the crystallized ferroelectric film 50a is formed at the time of film formation. Since the ferroelectric film 50a is formed on the amorphous noble metal oxide film 45c, even if the crystallinity of the noble metal film 44a is not sufficiently uniform, the ferroelectric film 50a having uniform crystallinity is formed. can get. Further, when the ferroelectric film 50a is formed by the MOCVD method, the amorphous noble metal oxide film 45c is exposed to a relatively strong reducing atmosphere, so that the amorphous noble metal oxide film 45c is formed. The noble metal film 46c is reduced. Further, when the ferroelectric film 50c is formed by the MOCVD method, oxygen is released from the noble metal oxide film 45c. The oxygen released from the noble metal oxide film 45c compensates for oxygen vacancies in the ferroelectric film 50a. Therefore, a ferroelectric film 50a with good crystallinity can be obtained. When the iridium oxide film is formed at the stage of forming the noble metal oxide film 45c, a noble metal film (conductive film) 46c which is an iridium film is formed. When the ruthenium oxide film is formed at the stage of forming the noble metal oxide film 45c, a noble metal film 46c that is a ruthenium film is formed.

  In this embodiment, when the ferroelectric film 50a is formed, the MOCVD method is used when the iridium film or the ruthenium film is used as the noble metal film 44a that becomes a part of the lower electrode 48a. This is because the film 50a is preferably formed by the MOCVD method.

Next, as shown in FIG. 27C, a ferroelectric film 52 is formed on the entire surface by, eg, sputtering. The ferroelectric film 52 becomes a part of the capacitor dielectric film 54a of the capacitor 62a. The material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50a. As the ferroelectric film 52, for example, a PbZr _X Ti _1-X O ₃ film (0 ≦ X ≦ 1) (PZT film) is formed. The film thickness of the ferroelectric film 52 is, for example, about 1 to 30 nm. Here, the film thickness of the ferroelectric film 52 is about 20 nm, for example.

Here, the case where a PZT film is formed as the ferroelectric film 52 has been described as an example, but the ferroelectric film 52 is not limited to the PZT film. For example, a material obtained by adding any of Ca, Sr, La, Nb, Ta, Ir, and W to PZT may be used as the material of the ferroelectric film 52. Further, as the ferroelectric film 52, a ferroelectric film having a bismuth layer structure may be used. The ferroelectric film 52 of the bismuth layer structure, for _{example, (Bi 1-X R X} ) Ti 3 O 12 film (R is a rare earth _{element, 0 <X <1),} SrBi 2 Ta 2 O 9 film (SBT film SrBi ₄ Ti ₄ O ₁₅ film or the like can be used. As described above, the material of the ferroelectric film 52 is preferably the same as the material of the ferroelectric film 50a.

  Thus, the capacitor dielectric film 54a is formed by the ferroelectric film 50a and the ferroelectric film 52.

Next, as shown in FIG. 28A, a conductive film 56 is formed on the entire surface by, eg, sputtering. The conductive film 56 becomes a part of the upper electrode 60a of the capacitor 62a. As the conductive film 56, an iridium oxide film (IrO _X film) is formed. It is preferable to set the film thickness of the conductive film 56 to be relatively thin so that oxygen is sufficiently supplied to the ferroelectric film 52 through the conductive film 56 in the heat treatment in the subsequent process. The film thickness of the conductive film 56 is about 50 nm, for example.

The conditions for forming the conductive film 56 are, for example, as follows. The substrate temperature is about 300 ° C., for example. The gas introduced into the film forming chamber is, for example, Ar gas and O ₂ gas. The flow rate of Ar gas is about 100 sccm, for example. The flow rate of O ₂ gas is, for example, about 100 sccm. The applied power is, for example, about 1 kW to 2 kW. When the conductive film 56 is formed, impurities attached to the surface of the ferroelectric film 52 are removed.

  Next, heat treatment is performed in an atmosphere containing oxygen by, for example, an RTA method. The heat treatment is for further improving the crystallinity of the ferroelectric film 50a and crystallizing the ferroelectric film 52. Oxygen is supplied to the capacitor dielectric film 54a through the conductive film 56, and oxygen vacancies in the capacitor dielectric film 54a are compensated. This heat treatment is for recovering plasma damage generated in the conductive film 56. The heat treatment is for improving the adhesion between the conductive film 56 and the ferroelectric film 52. By this heat treatment, peeling of the upper electrode 60a and the like are suppressed, and as a result, yield can be improved.

The heat treatment conditions are as follows, for example. The substrate temperature is about 725 ° C., for example. The heat treatment time is, for example, 60 seconds. The atmosphere in the chamber is, for example, an atmosphere of a mixed gas of Ar gas and O ₂ gas. The flow rate of Ar gas is, for example, 2000 sccm. The flow rate of O ₂ gas is set to 20 sccm, for example.

Next, a conductive film 58 is formed on the entire surface by, eg, sputtering. The conductive film 58 becomes a part of the upper electrode 60a of the capacitor 62a. As the conductive film 58, for example, an iridium oxide film is formed. The film thickness of the conductive film 58 is, for example, about 100 nm to 300 nm. Here, the film thickness of the conductive film 58 is about 200 nm. The conductive film 58 is combined with the conductive film 56 to form the upper electrode 60a having a sufficient thickness. As a result, the upper electrode 60a having a sufficient thickness is formed, so that it is possible to prevent the capacitor dielectric film 54a from being greatly damaged during etching or the like. The composition of the iridium oxide film used as the conductive film 58 is preferably IrO ₂ which is a stoichiometric composition. This is because the iridium oxide film having the stoichiometric composition does not have a catalytic action on hydrogen and can prevent the capacitor dielectric film 54a from being reduced by hydrogen.

Note that although the case where an iridium oxide film is used as the conductive film 58 is described here as an example, the conductive film 58 is not limited to an iridium oxide film. For example, Ir, Ru, Rh, Re, Os, Pd, or an oxide thereof may be used as the material of the conductive film 58. Alternatively, a conductive oxide such as SrRuO ₃ may be used as the material of the conductive film 58. Further, these stacked films may be used as the conductive film 58.

  Next, the hydrogen barrier film 120 is formed by sputtering, for example. The hydrogen barrier film 120 is a part of the upper electrode 60a. The film thickness of the hydrogen barrier film 120 is, eg, about 100 nm. As the hydrogen barrier film 120, for example, an iridium film is formed. The hydrogen barrier film 120 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen. The deposition conditions for the hydrogen barrier film 120 are, for example, as follows. The gas introduced into the film formation chamber is, for example, Ar gas. The pressure in the film forming chamber is, for example, about 1 Pa. The applied power is about 1.0 W, for example.

Here, the case where an iridium film is used as the hydrogen barrier film 120 has been described as an example, but the hydrogen barrier film 120 is not limited to the iridium film. For example, a Pt film, a SrRuO ₃ film, or the like may be used as the hydrogen barrier film 120.

  Next, the lower surface (back surface) of the semiconductor substrate 10 is cleaned (back surface cleaning).

  Next, as shown in FIG. 28B, a protective film 138 is formed on the entire surface by sputtering. The protective film 138 functions as a part of the hard mask. As the protective film 138, for example, a TiN film is formed.

  Although the case where a TiN film is formed as the protective film 138 has been described as an example here, the protective film 138 is not limited to the TiN film. As the protective film 138, for example, a TiAlN film, a TaAlN film, a TaN film, or the like may be used. Further, the protective film 138 may be formed using these stacked films.

  Next, the protective film 140 is formed on the entire surface by, eg, plasma TEOSCVD. The protective film 140 functions as a hard mask in combination with the protective film 138.

  Next, a photoresist film (not shown) is formed on the entire surface by, eg, spin coating.

  Next, using a photolithography technique, the photoresist film is patterned into a planar shape of the capacitor 62a.

  Next, the protective film 140 is etched using the photoresist film as a mask.

  Next, the protective film 138 is etched using the etched protective film 140 as a mask.

  Thus, a hard mask is formed by the etched protective films 138 and 140 (not shown).

Next, using the hard mask as a mask, the hydrogen barrier film 120, the conductive film 58, the conductive film 56, the ferroelectric film 52, the ferroelectric film 50a, the conductive film 46c, and the conductive film 44a are etched by plasma etching, for example. As the etching gas, for example, a mixed gas of HBr gas, O ₂ gas, Ar gas, and C ₄ F ₈ gas is used.

  Thus, the lower electrode 48a is formed by the conductive film 44a and the conductive film 46c. Further, the ferroelectric film 50a and the ferroelectric film 52 form a capacitor dielectric film 54a. Further, the upper electrode 60 a is formed by the conductive film 56, the conductive film 58, and the hydrogen barrier film 120. A capacitor 62a is formed by the lower electrode 48a, the ferroelectric film 54a, and the upper electrode 60a.

  Next, the protective film 140 is removed by, for example, dry etching or wet etching (see FIG. 29A).

Next, the antioxidant film 118, the adhesion film 116, and the base film 114 are etched by dry etching, for example. At this time, the protective film 138 is also removed by etching (see FIG. 29B). When performing the etching, for example, a down flow type plasma etching apparatus is used. The gas introduced into the chamber is, for example, a mixed gas of CF ₄ gas and O ₂ gas. The flow rate ratio of CF ₄ gas is about 5%, for example. The flow rate ratio of O ₂ gas is, for example, 95%. The high frequency power applied to the upper electrode in the chamber is, for example, 2.45 GHz and 1400 W. The substrate temperature is set to 200 ° C., for example.

  Next, as shown in FIG. 30A, a protective film 122 is formed on the entire surface by, eg, sputtering. The protective film 122 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. For example, an aluminum oxide film is formed as the protective film 122. The film thickness of the protective film 122 is, for example, about 20 nm.

  Note that although the case where the protective film 122 is formed by a sputtering method has been described as an example here, the method for forming the protective film 122 is not limited to the sputtering method. For example, the protective film 122 may be formed by MOCVD. In this case, the thickness of the protective film 122 is, for example, about 2 to 5 nm.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54a to improve the electrical characteristics of the capacitor 62a. The heat treatment condition is, for example, 500 to 700 ° C. When the capacitor dielectric film 54a is a PZT film, the substrate temperature is set to 600 ° C., for example, and the heat treatment time is set to 60 minutes, for example.

  Next, a protective film 124 is formed on the entire surface by, eg, CVD. The protective film 124 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. The film thickness of the protective film 124 is about 38 nm, for example. For example, an aluminum oxide film is formed as the protective film 124.

  Note that heat treatment may be performed before the protective film 124 is formed in order to prevent the protective film 124 from being peeled off. The heat treatment conditions are as follows, for example. The substrate temperature is about 350 ° C., for example. The heat treatment time is, for example, about 1 hour.

  Although the case where an aluminum oxide film is formed as the protective film 124 has been described as an example here, the protective film 124 is not limited to the aluminum oxide film. As the protective film 124, for example, a titanium oxide film, a tantalum oxide film, a zirconium oxide film, an aluminum nitride film, a tantalum nitride film, an aluminum oxynitride film, or the like may be formed.

  Next, as shown in FIG. 30B, an interlayer insulating film 68 is formed by plasma TEOSCVD, for example. For example, a silicon oxide film is formed as the interlayer insulating film 68. The film thickness of the interlayer insulating film 68 is, for example, about 1.5 μm. As the source gas, for example, a mixed gas of TEOS gas, oxygen gas, and helium gas is used.

  Here, a case where a silicon oxide film is formed as the interlayer insulating film 68 has been described as an example, but the interlayer insulating film 68 is not limited to a silicon oxide film. For example, an insulating inorganic film or the like can be used as appropriate.

  Next, the surface of the interlayer insulating film 68 is planarized by, eg, CMP.

Next, for example, heat treatment is performed in a plasma atmosphere generated using N ₂ O gas or N ₂ gas. This heat treatment is for removing moisture in the interlayer insulating film 68 and changing the film quality of the interlayer insulating film 68 to make it difficult for moisture to enter the interlayer insulating film 68. The heat treatment temperature is set to 350 ° C., for example. The heat treatment time is, for example, 2 minutes. During this heat treatment, the surface of the interlayer insulating film 68 is nitrided, and a silicon oxynitride film (not shown) is formed on the surface of the interlayer insulating film 68.

  Next, as shown in FIG. 30B, a protective film 70 is formed by, for example, sputtering or CVD. As the protective film 70, for example, an aluminum oxide film is formed. The film thickness of the protective film 70 is, for example, about 20 to 100 nm. The protective film 70 is for preventing the capacitor dielectric film 54a from being reduced by hydrogen, moisture, or the like. Since the protective film 70 is formed on the interlayer insulating film 68 having a flat surface, the protective film 70 becomes flat.

  Next, the interlayer insulating film 72 is formed by, for example, plasma TEOSCVD. For example, a silicon oxide film is formed as the interlayer insulating film 72. The film thickness of the interlayer insulating film 72 is, for example, about 800 nm to 1 μm.

  Although the case where a silicon oxide film is formed as the interlayer insulating film 72 has been described as an example here, the interlayer insulating film 72 is not limited to a silicon oxide film. For example, a silicon oxynitride film or a silicon nitride film may be used as the interlayer insulating film 72.

  Next, the surface of the interlayer insulating film 72 is planarized by, eg, CMP.

  Next, the contact hole 126a reaching the conductor plug 36 is formed by etching the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, the protective film 122, and the interlayer insulating film 104 using a photolithography technique. Form. In addition, the contact hole 126a reaching the upper electrode 60a is formed by etching the interlayer insulating film 72, the protective film 70, the interlayer insulating film 68, the protective film 124, and the protective film 122 using a photolithography technique.

  Next, heat treatment is performed in an oxygen atmosphere. This heat treatment is for supplying oxygen to the capacitor dielectric film 54a, compensating for oxygen vacancies in the capacitor dielectric film 54a, and restoring the electrical characteristics of the capacitor 62a. The substrate temperature during the heat treatment is set to 450 ° C., for example.

  Next, heat treatment is performed in an inert gas atmosphere or in a vacuum. This heat treatment is for releasing gas from the interlayer insulating films 72, 68, 104 (degassing).

  Next, surface treatment is performed on the inner wall surfaces of the contact holes 126a and 126b by high frequency etching.

Next, the adhesion film 128 is formed on the entire surface by, eg, sputtering. As the adhesion film 128, for example, a TiN film is formed. The film thickness of the adhesion film 128 is about 125 nm, for example. When a TiN film is formed as the adhesion film 128, Ti is used as a target material. The atmosphere in the deposition chamber is a mixed atmosphere of Ar gas and N ₂ gas. The flow rate of Ar gas is 50 sccm. The flow rate of N ₂ gas is 90 sccm, for example. The film forming temperature is set to 200 ° C., for example.

Although the case where a TiN film is used as the adhesion film 128 has been described as an example here, the adhesion film 128 is not limited to the TiN film. For example, as the adhesion film 128, TaN film, CrN film, HfN film, ZrN film, TiAlN film, TaAlN film, TiSiN film, TaSiN film, CrAlN film, HfAlN film, ZrAlN film, TiON film, TaON film, CrON film, HfON A film, ZrON film, TiAlON film, TaAlON film, CrAlON film, HfAlON film, ZrAlON film, TiSiON film, TaSiON film, Ir film, Ru film, IrO _X film, RuO _X film, or the like may be formed. Further, the adhesion film 128 may be formed by sequentially stacking a Ti film and a TiN film. Further, the adhesion film 128 may be formed by sequentially laminating a Ti film and a TaN film. Further, the adhesion film 128 may be formed by sequentially stacking a Ta film and a TiN film. Further, the adhesion film 128 may be formed by sequentially stacking a Ta film and a TaN film.

  Next, a conductive film is formed on the entire surface by, eg, CVD. For example, a tungsten film is formed as the conductive film. The film thickness of the conductive film is, for example, about 300 nm.

  Next, the conductive film and the adhesion film 78 are polished by, for example, a CMP method until the surface of the interlayer insulating film 72 is exposed. Thus, the conductor plugs 130a and 130b are formed by the conductive film (see FIG. 31B).

  Here, the case where tungsten is used as the material of the conductor plugs 130a and 130b has been described as an example, but the material of the conductor plugs 130a and 130b is not limited to tungsten. For example, Cu or the like may be used as a material for the conductor plugs 130a and 130b. Further, the conductor plugs 130a and 130b may be formed of a laminated film of a tungsten film and a copper film. Further, the conductor plugs 130a and 130b may be formed of a laminated film of a tungsten film and a polysilicon film.

  Next, plasma cleaning is performed. The gas used when performing the plasma cleaning is, for example, Ar gas. As a result, the natural oxide film and the like existing on the surfaces of the conductor plugs 130a and 130b are removed.

  Next, for example, by sputtering, for example, a TiN film 82, an AlCu alloy film 84, a Ti film 86, and a TiN film 88 are sequentially stacked to form a stacked film. The thickness of the TiN film 82 is, for example, 50 nm. The thickness of the AlCu alloy film 84 is, for example, 550 nm. The thickness of the Ti film 86 is, for example, 5 nm. The thickness of the TiN film 88 is, for example, 50 nm.

  Next, the laminated film is etched using a photolithography technique. Thus, the wiring 90 is formed by the laminated film (see FIG. 10B).

  Thereafter, an interlayer insulating film (not shown), a conductor plug (not shown), a wiring (not shown), etc. are formed over a plurality of layers.

  Thus, the semiconductor device according to the present embodiment is manufactured.

  According to this embodiment, the amorphous noble metal oxide film 45c is formed on the noble metal film 44a, and the ferroelectric film 50a is formed on the noble metal oxide film 45c by the MOCVD method. Also in this embodiment, since the ferroelectric film 50a is formed directly on the amorphous noble metal oxide film 45c, even if the crystallinity of the noble metal film 44a is not sufficiently uniform, uniform crystallinity can be obtained. Thus, the ferroelectric film 50a can be obtained. Also in the present embodiment, since oxygen released from the noble metal oxide film 45c is supplied to the ferroelectric film 50a, the crystallinity of the ferroelectric film 50a can be improved. Further, since the amorphous noble metal oxide film 45c is easily changed to the noble metal film 46c by heat treatment or the like, the entire lower electrode 48a becomes a noble metal, and a good lower electrode 48a is obtained. For this reason, according to the present embodiment, a semiconductor device having a capacitor with good electrical characteristics can be provided. According to the present embodiment, since the crystallinity of the capacitor dielectric film 54 in the wafer surface can be made uniform, it is possible to improve the yield of the semiconductor device.

[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications are possible.

  For example, in the first to third embodiments, the case where the ferroelectric film 50 is formed by the sputtering method or the sol-gel method has been described as an example. However, the ferroelectric film 50 may be formed by the MOCVD method. In the case where an iridium film or a ruthenium film is used as the noble metal film 44 that becomes a part of the lower electrode 48, the ferroelectric film 50 is preferably formed by the MOCVD method. When the ferroelectric film 50 is formed by MOCVD, for example, an iridium film is formed as the noble metal film 44, and an iridium oxide film is formed as the noble metal oxide films 45, 45a, and 45b. Further, for example, a ruthenium film may be formed as the noble metal film 44, and a ruthenium oxide film may be formed as the noble metal oxide films 45, 45a, and 45b. When the ferroelectric film 50 is formed by the MOCVD method, it is preferable that the noble metal oxide films 45, 45a, and 45b have a film thickness of 15 nm or more and 30 nm or less as described above in the fourth embodiment.

  In the fourth embodiment, the case where the ferroelectric film 50a is formed by the MOCVD method has been described as an example. However, the ferroelectric film 50a may be formed by a sputtering method or a sol-gel method. When a platinum film, a rhodium film, an osmium film, or a palladium film is used as the noble metal film 44a that becomes a part of the lower electrode 48a, the ferroelectric film 50a is preferably formed by a sputtering method or a sol-gel method. When the ferroelectric film 50a is formed by a sputtering method or a sol-gel method, for example, a platinum film is formed as the noble metal film 44a, and a platinum oxide film is formed as the noble metal oxide film 45c. Alternatively, a rhodium film may be formed as the noble metal film 44a, and a rhodium oxide film may be formed as the noble metal oxide film 46c. Further, an osmium film may be formed as the noble metal film 44a, and an osmium oxide film may be formed as the noble metal oxide film 45c. Alternatively, a palladium film may be formed as the noble metal film 44a, and for example, a palladium oxide film may be formed as the noble metal oxide film 45c. When the ferroelectric film 50a is formed by the sputtering method or the sol-gel method, as described above in the first to third embodiments, the noble metal oxide film 45c has a thickness of 0.1 nm or more and 3 nm or less. It is preferable to do.

  In the fourth embodiment, the case where the amorphous noble metal oxide film 45c is formed by the sputtering method has been described as an example. However, the method for forming the amorphous noble metal oxide film 45c is limited to the sputtering method. It is not something. For example, as in the method of manufacturing the semiconductor device according to the second embodiment, the surface of the noble metal film 44a is oxidized using a chemical solution to form the amorphous noble metal oxide film 45c on the noble metal film 44a. Good. Similarly to the semiconductor device manufacturing method according to the third embodiment, the surface of the noble metal film 44a is oxidized in an atmosphere containing oxygen to form an amorphous noble metal oxide film 45c on the noble metal film 44a. May be.

  In the above embodiment, the case where the sputtering method, the sol-gel method, or the MOCVD method is used for forming the ferroelectric films 50 and 50a has been described as an example. However, the formation of the ferroelectric films 50 and 50a is described. The film method is not limited to these. For example, the ferroelectric films 50 and 50a may be formed by a metal organic decomposition (MOD) method. Alternatively, the ferroelectric films 50 and 50a may be formed by chemical solution deposition (CSD). Alternatively, the ferroelectric films 50 and 50a may be formed by a chemical vapor deposition (CVD) method. Further, the ferroelectric films 50 and 50a may be formed by an epitaxial growth method.

  In the above embodiment, the case where a platinum film, a rhodium film, an osmium film, a palladium film, an iridium film, or a ruthenium film is used as the noble metal films 44 and 44a has been described as an example. However, the noble metal films 44 and 44a are not limited thereto. It is not something. For example, a rhenium film or the like may be used as the noble metal films 44 and 44a. Further, a noble metal laminated film may be used as the noble metal films 44 and 44a.

  In the above embodiment, the case where a platinum oxide film, a rhodium oxide film, an osmium oxide film, a palladium oxide film, an iridium oxide film or a ruthenium oxide film is used as an example of the noble metal oxide films 45 and 45a has been described. It is not limited. For example, an amorphous rhenium oxide film or the like may be used as the amorphous noble metal oxide films 45 and 45a. Further, as the amorphous noble metal oxide films 45 and 45a, a laminated film of amorphous noble metal oxides may be used.

  Regarding the above embodiment, the following additional notes are disclosed.

(Appendix 1)
Forming a first conductive film that is a noble metal film containing a noble metal that is platinum, palladium, rhodium, or osmium on a semiconductor substrate;
Forming an amorphous second conductive film having a thickness of 0.1 nm or more and 3 nm or less and containing an oxide of the noble metal on the first conductive film;
Directly forming a ferroelectric film on the second conductive film by a sputtering method or a sol-gel method;
Crystallization of the ferroelectric film by performing a heat treatment;
Forming a third conductive film on the ferroelectric film;
A lower electrode including the first conductive film and the second conductive film by patterning the third conductive film, the ferroelectric film, the second conductive film, and the first conductive film. And a step of forming a capacitor having a capacitor dielectric film including the ferroelectric film and an upper electrode including the third conductive film.

(Appendix 2)
Forming a first conductive film that is a noble metal film containing a noble metal that is iridium or ruthenium on a semiconductor substrate;
Forming an amorphous second conductive film having a film thickness of 15 nm or more and 30 nm or less and containing an oxide of the noble metal on the first conductive film;
Forming a ferroelectric film directly on the second conductive film by metal organic chemical vapor deposition;
Forming a third conductive film on the ferroelectric film;
A lower electrode including the first conductive film and the second conductive film by patterning the third conductive film, the ferroelectric film, the second conductive film, and the first conductive film. And a step of forming a capacitor having a capacitor dielectric film including the ferroelectric film and an upper electrode including the third conductive film.

(Appendix 3)
In the method for manufacturing a semiconductor device according to attachment 1 or 2,
In the step of forming the second conductive film, the second conductive film is formed by a sputtering method.

(Appendix 4)
In the method for manufacturing a semiconductor device according to attachment 1 or 2,
In the step of forming the second conductive film, the second conductive film is formed by oxidizing the surface of the first conductive film using a chemical solution.

(Appendix 5)
In the method for manufacturing a semiconductor device according to attachment 4,
The method for manufacturing a semiconductor device, wherein the chemical solution is a chemical solution containing hydrogen peroxide.

(Appendix 6)
In the method for manufacturing a semiconductor device according to attachment 1 or 2,
In the step of forming the second conductive film, the second conductive film is formed by oxidizing the surface of the first conductive film in an oxygen-containing atmosphere. Method.

(Appendix 7)
In the method for manufacturing a semiconductor device according to attachment 6,
In the step of forming the second conductive film, the second conductive film is formed by oxidizing the surface of the first conductive film in an atmosphere containing oxygen at 50 ° C. or lower. A method for manufacturing a semiconductor device.

It is sectional drawing which shows the semiconductor device by 1st Embodiment. FIG. 6 is a process cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device according to the first embodiment; FIG. 6 is a process cross-sectional view (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment; FIG. 9 is a process cross-sectional view (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment; FIG. 9 is a process cross-sectional view (part 4) illustrating the method for manufacturing the semiconductor device according to the first embodiment; FIG. 10 is a process cross-sectional view (part 5) illustrating the method for manufacturing the semiconductor device according to the first embodiment; FIG. 11 is a process cross-sectional view (No. 6) illustrating the method for manufacturing the semiconductor device according to the first embodiment; It is process sectional drawing (the 7) which shows the manufacturing method of the semiconductor device by 1st Embodiment. It is process sectional drawing (the 8) which shows the manufacturing method of the semiconductor device by 1st Embodiment. It is process sectional drawing (the 9) which shows the manufacturing method of the semiconductor device by 1st Embodiment. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 2nd Embodiment. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 2nd Embodiment. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 2nd Embodiment. It is a graph (the 1) which shows the evaluation result of the crystallinity of a capacitor dielectric film. It is a graph (the 2) which shows the evaluation result of the crystallinity of a capacitor dielectric film. It is a graph (the 3) which shows the evaluation result of the crystallinity of a capacitor dielectric film. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 3rd Embodiment. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 3rd Embodiment. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 3rd Embodiment. It is a graph (the 4) which shows the evaluation result of the crystallinity of a capacitor dielectric film. It is a graph (the 5) which shows the evaluation result of the crystallinity of a capacitor dielectric film. It is sectional drawing which shows the semiconductor device by 4th Embodiment. It is process sectional drawing (the 1) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 2) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 3) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 4) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 5) which shows the manufacturing method of the semiconductor device by 4th Embodiment. FIG. 14 is a process cross-sectional view (No. 6) illustrating the method for manufacturing the semiconductor device according to the fourth embodiment; It is process sectional drawing (the 7) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 8) which shows the manufacturing method of the semiconductor device by 4th Embodiment. It is process sectional drawing (the 9) which shows the manufacturing method of the semiconductor device by 4th Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate 12 ... Element isolation region 14 ... Well 16 ... Gate insulating film 18 ... Gate electrode 20 ... Side wall insulating film 22 ... Source / drain diffused layer 24a, 24b ... Silicide layer 26 ... Transistor 28 ... Insulating film 30 ... Interlayer Insulating film 32 ... contact hole 34 ... adhesion film 36 ... conductor plug 38 ... silicon nitride oxide film 40 ... silicon oxide film 42 ... interlayer insulation film 43 ... adhesion film 44 ... conductive film, noble metal films 45, 45a to 45c ... noble metal oxide Films 46, 46a to 46c ... conductive film, noble metal film 48 ... lower electrodes 50, 50a ... ferroelectric film 52 ... ferroelectric films 54, 54a ... capacitor dielectric film 56 ... conductive film 58 ... conductive films 60, 60a ... Upper electrode 62, 62a ... Capacitor 64 ... Protective film 66 ... Protective film 68 ... Interlayer insulating film 70 ... Protective film 72 ... Interlayer insulating films 74a, 74b ... Contact hole 76 ... Contact hole 78 ... Adhesion films 80a-80c ... Conductor plug 82 ... TiN film 84 ... AlCu alloy film 86 ... Ti film 88 ... TiN film 90 ... Wiring 92 ... Protective film 94 ... Photoresist film 96 ... Photoresist film 98 ... Photoresist film 100 ... Antioxidation film 102 ... Silicon oxide film 104 ... Interlayer insulating film 106 ... Contact hole 108 ... Adhesion film 110 ... Conductor plug 112 ... Recess 113 ... Ti film 114 ... Underlayer, planarization layer 116 ... Adhesion Film 118 ... Antioxidation film 120 ... Hydrogen barrier film 122 ... Protective film 124 ... Protective film 126a, 126b ... Contact hole 128 ... Adhesion film 130a, 130b ... Conductor plug

Claims (4)

Forming a first conductive film that is a noble metal film containing a noble metal that is platinum, palladium, rhodium, or osmium on a semiconductor substrate;
On the first conductive film, an amorphous second conductive film having a thickness of 0.1 nm to 3 nm and containing the noble metal oxide is formed in an atmosphere containing oxygen. Forming by oxidizing the surface of the conductive film ;
Directly forming a ferroelectric film on the second conductive film by a sputtering method or a sol-gel method;
Crystallization of the ferroelectric film by performing a heat treatment in an atmosphere containing oxygen; and
Forming a third conductive film on the ferroelectric film;
A lower electrode including the first conductive film and the second conductive film by patterning the third conductive film, the ferroelectric film, the second conductive film, and the first conductive film. And a step of forming a capacitor having a capacitor dielectric film including the ferroelectric film and an upper electrode including the third conductive film.
In the step of forming the second conductive film, the second conductive film is formed by oxidizing the surface of the first conductive film in an oxygen-containing atmosphere. Method. In the manufacturing method of the semiconductor device according to claim 1 ,
In the step of forming the second conductive film, the second conductive film is formed by oxidizing the surface of the first conductive film in an atmosphere containing oxygen at 50 ° C. or lower. A method for manufacturing a semiconductor device. Forming a first conductive film that is a noble metal film containing a noble metal that is platinum, palladium, rhodium, or osmium on a semiconductor substrate;
On the first conductive film, an amorphous second conductive film having a thickness of 0.1 nm or more and 3 nm or less and containing an oxide of the noble metal is applied to the first conductive film using a chemical solution. Forming by oxidizing the surface of
Directly forming a ferroelectric film on the second conductive film by a sputtering method or a sol-gel method;
Crystallization of the ferroelectric film by performing a heat treatment in an atmosphere containing oxygen; and
Forming a third conductive film on the ferroelectric film;
A lower electrode including the first conductive film and the second conductive film by patterning the third conductive film, the ferroelectric film, the second conductive film, and the first conductive film. And a step of forming a capacitor having a capacitor dielectric film including the ferroelectric film and an upper electrode including the third conductive film. In the manufacturing method of the semiconductor device according to any one of claims 1 to 3 ,
In the step of forming the second conductive film, the second conductive film is formed by a sputtering method.

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