JP5369270B2 - Magnetic field sensor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a magnetic sensor for achieving a measurement of a dynamic magnetic field planarly and spatially distributed. <P>SOLUTION: The magnetic sensor 1 is constituted by disposing a matrix including a plurality of elemental circuits PX11-PXmn comprising a thin film hall effect element THD, a drive circuit DV, a read circuit RD, detection control lines SL1-SLm and detection output lines RL1-RLn. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

 The present invention relates to a magnetic field sensor that realizes measurement of a dynamic magnetic field that is distributed in a plane and spatially.

Conventional magnetic field measurement was local measurement using a gauss meter or the like (see Non-Patent Documents 1 and 2 below). Moreover, although the magnetic field sensor using a thin film Hall effect element was also devised, it was still a local measurement by a single element (refer to Non-patent Document 3 and Patent Document 1 below).
Takao Hasumi, Electrical Engineering Essential 3rd Edition, Sanseido, pp.244-245 Masatoshi Suyama, Revised Electromagnetic Measurement, Corona, pp.267-272 Yue Kuo, Thin film transistors, Material and processes Vol.2: Polycrystalline silicon thin film transistors, Kluwer Academic Publishers, pp.487-490 Special Table 2000-514920

As described above, when a gauss meter or a single element thin film Hall effect element is used, only a local magnetic field measurement can be performed, and it is difficult to measure a dynamic magnetic field distributed in a plane and space.
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a magnetic sensor that is capable of realizing a measurement of a dynamic magnetic field that is planarly and spatially distributed.

In order to solve the above problems, one magnetic field sensor according to the present invention includes a plurality of element circuits arranged in a matrix and a detection connected to the plurality of element circuits arranged in the row direction of the matrix. A control wiring, a first detection output wiring and a second detection output wiring connected to the plurality of element circuits arranged in the matrix column direction, and a plurality of the plurality of elements arranged in the matrix column direction A current supply line connected to the element circuit, a drive potential line, a common potential line, a current source for supplying a drive current to the current supply line, and a plurality of the rows arranged in the matrix row direction A drive control wiring connected to the element circuit, each of the element circuits including a thin film Hall effect element having a first Hall voltage read terminal and a second Hall voltage read terminal, and the thin film Hall effect. A readout circuit for reading the Hall voltage of the element, and a drive circuit for driving the thin film Hall effect element, each of the readout circuits including a first readout thin film transistor and a second readout thin film transistor, A gate terminal of the first readout thin film transistor is connected to the detection control wiring, a source terminal of the first readout thin film transistor is connected to the first detection output wiring, and a drain terminal of the first readout thin film transistor is the first And a gate terminal of the second readout thin film transistor is connected to the detection control wiring, a source terminal of the second readout thin film transistor is connected to the second detection output wiring, and the second readout thin film transistor is connected. The drain terminal of the thin film transistor is connected to the second hole readout terminal, and each of the drive circuits includes a second drive A constant current circuit including a thin film transistor, a third driving thin film transistor, a fourth driving thin film transistor, a fifth driving thin film transistor, and a first voltage storage capacitor, and a second connection wiring, A gate terminal of the second driving thin film transistor is connected to the drive control wiring, a source terminal of the second driving thin film transistor is connected to the current supply wiring, and a drain terminal of the second driving thin film transistor is connected to the third driving thin film. A gate terminal of the third driving thin film transistor is connected to the drive control wiring; a source terminal of the third driving thin film transistor is connected to a drain terminal of the second driving thin film transistor; The drain terminal of the third driving thin film transistor is the fifth driving thin film. A gate terminal of the fourth driving thin film transistor is connected to the drive control wiring; a source terminal of the fourth driving thin film transistor is connected to a drain terminal of the second driving thin film transistor; The drain terminal of the fourth driving thin film transistor is connected to the first voltage / current supply terminal of the thin film Hall effect element, the gate terminal of the fifth driving thin film transistor is connected to the drain terminal of the third driving thin film transistor, and The source terminal of the fifth driving thin film transistor is connected to the first terminal of the first voltage storage capacitor, the drain terminal of the fifth driving thin film transistor is connected to the source terminal of the third driving thin film transistor, and the first voltage The first terminal of the storage capacitor is connected to the drive potential wiring The second terminal of the first voltage storage capacitor is connected to the gate terminal of the fifth driving thin film transistor, and one end of the second connection wiring is connected to the second voltage current supply terminal of the thin film Hall effect element. The other end of the second connection wiring is connected to the common potential wiring.
In order to solve the above problems, another magnetic field sensor according to the present invention is connected to a plurality of element circuits arranged in a matrix and a plurality of element circuits arranged in the row direction of the matrix. The first detection output wiring and the second detection output wiring connected to the plurality of element circuits arranged in the column direction of the matrix, and the element circuit arranged in the matrix In the peripheral region, the driving circuit is arranged in the matrix column direction and simultaneously drives the thin film Hall effect elements of the plurality of element circuits in the column direction, and is arranged in the peripheral region and connected to the driving circuit. A current supply line; a drive potential line; a current source that supplies a drive current to the current supply line; a drive control line provided for each drive circuit; and a common potential line. Each of the element circuits includes the thin film Hall effect element having a first Hall voltage read terminal and a second Hall voltage read terminal, and a read circuit for reading the Hall voltage of the thin film Hall effect element. Each includes a first readout thin film transistor and a second readout thin film transistor, a gate terminal of the first readout thin film transistor being connected to the detection control wiring, and a source terminal of the first readout thin film transistor being the first readout thin film transistor. Connected to one detection output wiring, the drain terminal of the first readout thin film transistor is connected to the first hole readout terminal, the gate terminal of the second readout thin film transistor is connected to the detection control wiring, and the second readout thin film transistor The source terminal of the thin film transistor is connected to the second detection output wiring, and the second readout thin film transistor A drain terminal is connected to the second hole readout terminal, and each of the driving circuits includes a sixth driving thin film transistor, a seventh driving thin film transistor, an eighth driving thin film transistor, a ninth driving thin film transistor, and a second driving thin film transistor. A voltage storage capacitor, and a gate terminal of the sixth driving thin film transistor is connected to the drive control wiring, and a source terminal of the sixth driving thin film transistor is connected to the current supply wiring, The drain terminal of the sixth driving thin film transistor is connected to the source terminal of the seventh driving thin film transistor, the gate terminal of the seventh driving thin film transistor is connected to the drive control line, and the source terminal of the seventh driving thin film transistor Is connected to the drain terminal of the sixth driving thin film transistor, The drain terminal of the seventh driving thin film transistor is connected to the gate terminal of the ninth driving thin film transistor, the gate terminal of the eighth driving thin film transistor is connected to the drive control line, and the source terminal of the eighth driving thin film transistor is The drain terminal of the sixth driving thin film transistor is connected to the drain terminal of the eighth driving thin film transistor, and the drain terminal of the eighth driving thin film transistor is connected to the first voltage / current supply terminal of the thin film Hall effect element in the element circuit in the first row of the same column. A gate terminal of the ninth driving thin film transistor is connected to a drain terminal of the seventh driving thin film transistor; a source terminal of the ninth driving thin film transistor is connected to a first terminal of the second voltage storage capacitor; The drain terminal of the seventh driving thin film transistor A second terminal of the second voltage storage capacitor is connected to the driving potential wiring, and a second terminal of the second voltage storage capacitor is connected to a gate terminal of the ninth driving thin film transistor. In each element circuit, the thin film Hall effect elements of the element circuits in the same row are connected in series, and the second voltage / current supply terminal of the thin film Hall effect element of the element circuit in the last row is connected to the common potential wiring.
In order to achieve the above object, a magnetic field sensor according to the present invention is characterized in that a plurality of thin film Hall effect elements are arranged in a matrix.
According to the magnetic field sensor having such a feature, each thin film Hall effect element arranged in a matrix generates a Hall voltage corresponding to the magnetic field to be measured at the arrangement location. By measuring the Hall voltage of the element and converting it to a magnetic field (magnetic flux density), instead of measuring the local magnetic field as in the past, it is possible to measure the magnetic field distributed in a plane and space. Is possible.

In the magnetic field sensor described above, an element circuit is configured by the thin film Hall effect element and a readout circuit that reads the Hall voltage of the thin film Hall effect element, and a plurality of the element circuits are arranged in a matrix. preferable.
Thus, by providing the element circuit, which is the minimum unit constituting the matrix, with the thin film Hall effect element and the readout circuit, the Hall voltage generated in each thin film Hall effect element can be reliably and easily read out. it can.

In the magnetic field sensor described above, the thin film Hall effect element has a first Hall voltage readout terminal and a second Hall voltage readout terminal, and the Hall voltage is the first Hall voltage readout terminal and the first Hall voltage readout terminal. A potential difference between the two Hall voltage readout terminals is preferable.
By adopting such a method of directly reading the Hall voltage, the circuit configuration of the readout circuit can be simplified.

Further, in the magnetic field sensor described above, the detection control wiring connected to the plurality of element circuits arranged in the matrix-like row direction and the plurality of element circuits arranged in the matrix-like column direction. The readout circuit further includes a first detection output line and a second detection output line, and the readout circuit includes a first readout thin film transistor and a second readout thin film transistor, and the gate of the first readout thin film transistor A terminal connected to the detection control wiring; a sorting terminal of the first readout thin film transistor connected to the first detection output wiring; a drain terminal of the first readout thin film transistor connected to the first hole readout terminal; The gate terminal of the second readout thin film transistor is connected to the detection control wiring, and the sort terminal of the second readout thin film transistor is It is connected to the serial second detection output line, and the drain terminal of the second readout TFT is preferably connected to the second hole readout terminal.
According to such a configuration, by sequentially supplying the read timing control signal to the detection control wiring corresponding to each row, the first read thin film transistor and the second read thin film transistor in the read circuit are turned on for each row. At this time, a potential difference generated between the first detection output wiring and the second detection output wiring corresponding to each column is generated in the thin film Hall effect element of each element circuit belonging to the row to which the read timing control signal is supplied. It can be measured as a voltage.

In the magnetic field sensor described above, the thin film Hall effect element has a first Hall voltage readout terminal and a second Hall voltage readout terminal, and the Hall voltage is the first Hall voltage readout terminal and the first Hall voltage readout terminal. A charging voltage obtained by charging a voltage between the terminals with the two-hole voltage reading terminal is preferable.
Since the response speed of the Hall voltage is not so fast, it may be difficult to read the Hall voltage sufficiently in a short readout period in the configuration in which the Hall voltage is read directly, but according to the configuration in which this charging voltage is read as the Hall voltage, Since the Hall voltage is charged over a sufficiently long time, the Hall voltage can be sufficiently read out in a short readout period.

In the magnetic field sensor described above, when the charging voltage is read as the Hall voltage, the detection control wiring connected to the plurality of element circuits arranged in the matrix-like row direction and the matrix-like column direction A first detection output wiring and a second detection output wiring connected to the plurality of element circuits arranged; and the readout circuit includes a first readout thin film transistor, a second readout thin film transistor, A gate terminal of the first read thin film transistor is connected to the detection control line, a sort terminal of the first read thin film transistor is connected to the first detection output line, and the first read thin film transistor. And a drain terminal of the second readout thin film transistor connected to the first hole readout terminal and the first terminal of the capacitor. A gate terminal of the second read thin film transistor is connected to the second detection output line, and a drain terminal of the second read thin film transistor is connected to the second hole read terminal and the second read thin film transistor. It is preferable to be connected to the second terminal of the capacitor.
With this configuration, when a Hall voltage is generated between the first Hall voltage readout terminal and the second Hall voltage readout terminal of the thin film Hall effect element, the capacitor is charged by the Hall voltage, and at full charge The charging voltage of the current coincides with the Hall voltage. Then, the readout timing control signal is sequentially supplied to the detection control wiring corresponding to each row, and the first readout thin film transistor and the second readout thin film transistor in the readout circuit are turned on for each row, so that the charging voltage of the capacitor is increased. It can be measured as Hall voltage.

In the magnetic field sensor described above, when the charging voltage is read as the Hall voltage, the detection control wiring connected to the plurality of element circuits arranged in the matrix-like row direction and the matrix-like column direction A first detection output wiring and a second detection output wiring connected to the plurality of element circuits arranged; and the readout circuit includes a first readout thin film transistor, a second readout thin film transistor, A third reading thin film transistor; a fourth reading thin film transistor; and a capacitor; a gate terminal of the first reading thin film transistor being connected to the detection control wiring; and a source terminal of the first reading thin film transistor being the first reading thin film transistor. 1 is connected to the detection output wiring, and the drain terminal of the first readout thin film transistor is connected to the first terminal of the capacitor. The gate terminal of the second readout thin film transistor is connected to the detection control wiring, the source terminal of the second readout thin film transistor is connected to the second detection output wiring, and the drain terminal of the second readout thin film transistor is the Connected to the second terminal of the capacitor, the gate terminal of the third readout thin film transistor is connected to the detection control wiring, and the source terminal of the third readout thin film transistor is connected to the first Hall voltage readout terminal of the thin film Hall effect element. The drain terminal of the third readout thin film transistor is connected to the first terminal of the capacitor, the gate terminal of the fourth readout thin film transistor is connected to the detection control wiring, and the source terminal of the fourth readout thin film transistor Is connected to the second Hall voltage readout terminal of the thin film Hall effect element, The drain terminal of the fourth readout thin film transistor is preferably connected to the second terminal of the capacitor.
In the configuration in which the charging voltage described above is read as the Hall voltage, noise due to recharging from the thin film Hall effect element may occur during the reading period of the Hall voltage charged in the capacitor. Therefore, as described above, the complementary third read thin film transistor and fourth read thin film transistor are added to the first read thin film transistor and the second read thin film transistor, thereby causing the capacitor to be recharged. You can cut the noise.

In the magnetic field sensor described above, it is preferable that the readout circuit reads out the Hall voltage of the thin film Hall effect element by converting it into a current.
In the configuration in which the Hall voltage of the thin film Hall effect element described above is read directly or by charging, it may be difficult to read a minute Hall voltage. Thus, by reading the Hall voltage converted into a current as described above, even a very small Hall voltage can be read with high accuracy.

Further, in the magnetic field sensor described above, when the Hall voltage of the thin film Hall effect element is converted into a current and read, the detection control wiring connected to the plurality of element circuits arranged in the row direction of the matrix and the common And a detection output wiring connected to the plurality of element circuits arranged in the matrix column direction, wherein the readout circuit includes a fifth readout thin film transistor and a sixth readout thin film transistor. And the gate terminal of the fifth readout thin film transistor is connected to the first Hall voltage readout terminal of the thin film Hall effect element, the source terminal of the fifth readout thin film transistor is connected to the common potential wiring, The drain terminal of the fifth readout thin film transistor is connected to the drain terminal of the sixth readout thin film transistor, and the sixth readout thin film transistor A gate terminal of the transistor is connected to the detection control wiring, a source terminal of the sixth readout thin film transistor is connected to the detection output wiring, and a drain terminal of the sixth readout thin film transistor is a drain terminal of the fifth readout thin film transistor. It is preferable that it is connected with.
With this configuration, the readout timing control signal is sequentially supplied to the detection control wiring corresponding to each row, and the sixth readout thin film transistor in the readout circuit is turned on for each row. A current generated by the gate voltage (voltage of the first Hall voltage readout terminal Po1) -current conversion, that is, a current corresponding to the Hall voltage flows through the detection output wiring. Thus, by measuring the current flowing through the detection output wiring, the Hall voltage generated in the thin film Hall effect element can be indirectly measured.

In the magnetic field sensor described above, each of the element circuits preferably includes a drive circuit that drives the thin film Hall effect element in addition to the thin film Hall effect element and the readout circuit.
Thus, by providing each element circuit with a drive circuit in addition to the thin film Hall effect element and the readout circuit, each thin film Hall effect element can be accurately driven.

In the magnetic field sensor described above, it is preferable that the driving circuit voltage-drives the thin film Hall effect element.
In this way, by adopting a voltage driving method for the thin film Hall effect element, the circuit configuration of the driving circuit can be simplified.
Further, since the magnetic flux density is represented by B _z = (L / d) · (1 / μ) · (V _H / V _x ), the design dimension d (width) of the semiconductor layer of the thin film Hall effect element, L The magnetic flux density B _z can be obtained from (length), material constant (carrier mobility) μ, applied voltage V _x , and Hall voltage measurement value V _H.

In the magnetic field sensor described above, when the thin film Hall effect element is voltage-driven, the magnetic field sensor further includes drive potential wirings and common potential wirings connected to the plurality of element circuits arranged in the matrix column direction. The drive circuit includes a first connection wiring and a second connection wiring, and one end of the first connection wiring is connected to a first voltage / current supply terminal of the thin film Hall effect element, and the first connection wiring The other end of the second connection wiring is connected to the second voltage / current supply terminal of the thin film Hall effect element, and the other end of the second connection wiring is connected to the common potential wiring. It is preferable that they are connected.
With such a configuration, a voltage corresponding to the potential difference between the driving potential wiring and the common potential wiring is applied between the first voltage current supply terminal and the second voltage current supply terminal of the thin film Hall effect element. be able to.

In the magnetic field sensor described above, it is preferable that the drive circuit drives the thin film Hall effect element with current.
Since the magnetic flux density is expressed by B _z = q · t · n · (V _H / I _x ), the design dimension t (thickness) of the semiconductor layer of the thin film Hall effect element, the physical constant q, and the material constant and (carrier density) n, and applied current I _x, it can be obtained a magnetic flux density B _z and a measure V _H of the Hall voltage.
When the voltage drive described above is adopted, a material constant (carrier mobility) μ is required. However, since this carrier mobility μ varies widely between process conditions and devices (thin film Hall effect elements), the magnetic flux density B There is a possibility that _z cannot be obtained with high accuracy. On the other hand, when current driving is employed, since the material constant (carrier density) n having relatively small process conditions and variations between devices is used, the magnetic flux density _Bz can be obtained with high accuracy.

Further, in the magnetic field sensor described above, when current driving the thin film Hall effect element, a voltage supply wiring connected to the plurality of element circuits arranged in the matrix column direction, a common potential wiring, A current source for supplying a driving current to the current supply wiring; and a detection control wiring connected to the plurality of element circuits arranged in the matrix-like row direction. Including a first driving thin film transistor and a second connection wiring, wherein a gate terminal of the first driving thin film transistor is connected to the detection control wiring, and a drain terminal of the first driving thin film transistor is connected to the current supply wiring. The source terminal of the first driving thin film transistor is connected to the first voltage / current supply terminal of the thin film Hall effect element, and one end of the second connection wiring is the thin film. Is connected to the second voltage current supply terminal Lumpur effect element,
It is preferable that the other end of the second connection wiring is connected to the common potential wiring.
With such a configuration, the read timing control signal is sequentially supplied to the detection control wiring corresponding to each row, and the first drive thin film transistor in the drive circuit is turned on for each row, whereby the first drive thin film transistor A current can be supplied from the current supply wiring to the thin film Hall effect element via the.

In the magnetic field sensor described above, it is preferable that the drive circuit includes a constant current circuit that supplies a constant current to the thin film Hall effect element.
By providing a constant current circuit in the drive circuit in this way, the thin film Hall effect element can be more accurately current driven.

In the magnetic field sensor described above, when a constant current circuit is provided in the driving circuit, a current supply wiring connected to the plurality of element circuits arranged in the matrix column direction, a driving potential wiring, A common potential wiring; a current source for supplying a driving current to the current supply wiring; and a drive control wiring connected to the plurality of element circuits arranged in the matrix row direction, The driving circuit includes a constant current circuit including a second driving thin film transistor, a third driving thin film transistor, a fourth driving thin film transistor, a fifth driving thin film transistor, and a first voltage storage capacitor; A gate terminal of the second driving thin film transistor is connected to the drive control wiring, and a source terminal of the second driving thin film transistor is connected to the power supply line. Connected to a supply wiring; a drain terminal of the second driving thin film transistor is connected to a source terminal of the third driving thin film transistor; a gate terminal of the third driving thin film transistor is connected to the drive control wiring; The source terminal of the driving thin film transistor is connected to the drain terminal of the second driving thin film transistor, the drain terminal of the third driving thin film transistor is connected to the gate terminal of the fifth driving thin film transistor, and the fourth driving thin film transistor The gate terminal is connected to the drive control line, the source terminal of the fourth driving thin film transistor is connected to the drain terminal of the second driving thin film transistor, and the drain terminal of the fourth driving thin film transistor is the thin film Hall effect element. Connected to the first voltage / current supply terminal. A gate terminal of the fifth driving thin film transistor is connected to a drain terminal of the third driving thin film transistor; a source terminal of the fifth driving thin film transistor is connected to a first terminal of the first voltage storage capacitor; The drain terminal of the fifth driving thin film transistor is connected to the source terminal of the third driving thin film transistor, the first terminal of the first voltage storage capacitor is connected to the driving potential wiring, and the first voltage storage capacitor first terminal Two terminals are connected to a gate terminal of the fifth driving thin film transistor, one end of the second connection wiring is connected to a second voltage current supply terminal of the thin film Hall effect element, and the other end of the second connection wiring is It is preferable to be connected to a common potential wiring.
In such a configuration, when the drive timing control signal is sequentially supplied to the drive control wiring corresponding to each row and the second driving thin film transistor and the third driving thin film transistor in the driving circuit are turned on for each row (fourth driving). The thin film transistor for driving and the fifth driving thin film transistor are turned off), and the current flows through the path of the driving potential wiring → the first voltage storage capacitor → the third driving thin film transistor → the second driving thin film transistor → the current supply wiring. A gate voltage necessary for flowing a constant current is stored (charged) in the first voltage storage capacitor by the driving thin film transistor.
When the potential of the drive control wiring becomes low level, the second driving thin film transistor and the third driving thin film transistor are turned off, while the fourth driving thin film transistor is turned on, and the fifth driving thin film transistor is also turned to the first voltage. The gate voltage stored in the storage capacitor is turned on. Thus, a constant current can be supplied to the thin film Hall effect element through the fourth driving thin film transistor and the fifth driving thin film transistor.

In the magnetic field sensor described above, it is preferable that a drive circuit for driving each thin film Hall effect element is provided in a peripheral region of the element circuit arranged in a matrix.
Thus, by providing the drive circuit not in the element circuit but in its peripheral region, it is not necessary to separately use a drive IC chip, and cost can be reduced.

In the magnetic field sensor described above, it is preferable that the drive circuit includes a constant current circuit that is arranged in the matrix column direction and simultaneously drives the thin film Hall effect elements of the plurality of element circuits in the column direction.
By providing a constant current circuit in the drive circuit in this way, the thin film Hall effect element can be more accurately current driven.

In the magnetic field sensor described above, when a constant current circuit is provided in the drive circuit in the peripheral region of the matrix, the current supply wiring, the drive potential wiring, and the current disposed in the peripheral region and connected to the drive circuit. A current source for supplying a driving current to the supply wiring; a drive control wiring provided for each driving circuit; and a common potential wiring. The driving circuit includes a sixth driving thin film transistor, A constant current circuit including a seventh driving thin film transistor, an eighth driving thin film transistor, a ninth driving thin film transistor, and a second voltage storage capacitor, and the gate terminal of the sixth driving thin film transistor is the drive control wiring The source terminal of the sixth driving thin film transistor is connected to the current supply wiring, and the drain terminal of the sixth driving thin film transistor The seventh driving thin film transistor is connected to the source terminal, the seventh driving thin film transistor has a gate terminal connected to the drive control line, and the seventh driving thin film transistor has a source terminal connected to the drain terminal of the sixth driving thin film transistor. The drain terminal of the seventh driving thin film transistor is connected to the gate terminal of the ninth driving thin film transistor, the gate terminal of the eighth driving thin film transistor is connected to the drive control line, and the eighth driving thin film transistor. The source terminal of the thin film transistor is connected to the drain terminal of the sixth driving thin film transistor, and the drain terminal of the eighth driving thin film transistor is connected to the first voltage / current supply terminal of the thin film Hall effect element in the element circuit in the first row of the same column. The ninth driving thin film transistor gate And a source terminal of the ninth driving thin film transistor is connected to a first terminal of the second voltage storage capacitor, and a drain terminal of the ninth driving thin film transistor is connected to a drain terminal of the seventh driving thin film transistor. Is connected to the source terminal of the seventh drive thin film transistor, the first terminal of the second voltage storage capacitor is connected to the drive potential wiring, and the second terminal of the second voltage storage capacitor is the ninth drive. The thin film Hall effect elements of the element circuits in the same row are connected in series in each element circuit, and the second voltage / current supply terminal of the thin film Hall effect element of the element circuit in the last row is connected to the common potential. It is preferable to be connected to wiring.
In such a configuration, when the drive timing control signal is sequentially supplied to the drive control wiring corresponding to each drive circuit, and the sixth drive thin film transistor and the seventh drive thin film transistor in the drive circuit are turned on for each column ( The eighth driving thin film transistor and the ninth driving thin film transistor are turned off), and the current flows through the path of the driving potential wiring → the second voltage storage capacitor → the seventh driving thin film transistor → the sixth driving thin film transistor → the current supply wiring. The gate voltage necessary for flowing a constant current is stored (charged) in the second voltage storage capacitor by the ninth driving thin film transistor.
When the potential of the drive control line becomes low level, the sixth driving thin film transistor and the seventh driving thin film transistor are turned off, while the eighth driving thin film transistor is turned on, and the ninth driving thin film transistor is also turned on to the second voltage. The gate voltage stored in the storage capacitor is turned on. Thereby, a constant current can be supplied to all the thin film Hall effect elements belonging to one column via the eighth driving thin film transistor and the ninth driving thin film transistor.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[First Embodiment: Basic Configuration]
First, a first embodiment serving as a basic configuration of a magnetic field sensor according to the present invention will be described. FIG. 1 is a circuit configuration diagram of a magnetic field sensor 1 according to the first embodiment. As shown in FIG. 1, a magnetic field sensor 1 according to this embodiment includes element circuits PX11 to PXmn arranged in a matrix of m rows × n columns, m detection control wirings SL1 to SLm, and n pieces. Detection output wirings RL1 to RLn.

  The element circuits PX11 to PXmn are the smallest units constituting the matrix, and each includes the thin film Hall effect element THD, the drive circuit DV that drives the thin film Hall effect element THD, and the Hall voltage of the thin film Hall effect element THD. A readout circuit RD for reading out is provided. Although details will be described later, the drive circuit DV is not necessarily provided in each of the element circuits PX11 to PXmn, and may be configured to be provided in the peripheral region of the matrix (see the eighth embodiment).

  The drive circuit DV is connected to the first voltage current supply terminal Pi1 and the second voltage current supply terminal Pi2 provided in the thin film Hall effect element THD, and is driven by voltage drive (the first voltage current supply terminal Pi1 and the second voltage current). Drive method of either the voltage applied to the terminal between the supply terminal Pi2 or current drive (control the current flowing between the first voltage current supply terminal Pi1 and the second voltage current supply terminal Pi2) Is used to drive the thin film Hall effect element THD. Note that the circuit configuration of the drive circuit DV when the voltage drive method is employed (see the fifth embodiment) and when the current drive method (see the sixth and seventh embodiments) is employed will be described later.

 The readout circuit RD is connected to the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2 provided in the thin film Hall effect element THD, and the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. The output of the thin film Hall effect element THD is read using either a voltage reading method of reading out the voltage between the terminals as a Hall voltage or a current reading method of reading out the Hall voltage converted into a current. The circuit configuration of the readout circuit RD when the voltage readout method is employed (see the second and third embodiments) and when the current readout method is employed (see the fourth embodiment) will be described later.

  The detection control wirings SL1 to SLm are wirings used for supplying a read timing control signal for defining the read timing of the Hall voltage by the read circuit RD, and are provided corresponding to each row of the matrix and belong to one row. It is commonly connected to the readout circuit RD of the element circuit. For example, as shown in FIG. 1, the detection control wiring SL1 corresponding to the first row is commonly connected to the readout circuits RD of the element circuits PX11 to PX1n belonging to the first row, and the detection control wiring SLm corresponding to the mth row. Are commonly connected to the readout circuits RD of the element circuits PXm1 to PXmn belonging to the m-th row. The read timing control signal may be supplied from the IC chip to the detection control lines SL1 to SLm, or a dedicated driver circuit for generating the read timing control signal is formed in the peripheral region of the matrix. The driver circuit and the detection control lines SL1 to SLm may be connected.

  The detection output wirings RL1 to RLn are wirings used to transmit the Hall voltage (or current corresponding to the Hall voltage) of the thin film Hall effect element THD read by the readout circuit RD to the outside. It is provided corresponding to the column and is commonly connected to the readout circuit RD of the element circuit belonging to one column. For example, as shown in FIG. 1, the detection output wiring RL1 corresponding to the first column is commonly connected to the readout circuits RD of the element circuits PX11 to PXm1 belonging to the first column, and the detection output wiring RLn corresponding to the nth column. Are commonly connected to the readout circuits RD of the element circuits PX1n to PXmn belonging to the nth column. Although details will be described later, the number of detection output wirings provided per column is two when the voltage reading method is adopted and one when the current reading method is adopted.

 The thin film Hall effect element THD, the element circuits PX11 to PXmn including the readout circuit RD and the drive circuit DV, the detection control wirings SL1 to SLm, and the detection output wirings RL1 to RLn are a manufacturing process of a known thin film transistor (TFT). For example, it is formed on a substrate such as glass. FIG. 2 shows a structural diagram of a thin film Hall effect element THD formed using a low temperature polysilicon TFT manufacturing process as a TFT manufacturing process, and a low temperature polysilicon TFT constituting a readout circuit RD and a drive circuit DV.

2A is a plan view of the thin film Hall effect element THD, and FIG. 2B is a cross-sectional view taken along the line AA of the thin film Hall effect element THD in FIG. As shown in FIGS. 2A and 2B, the thin film Hall effect element THD includes an n ⁺ -type polysilicon semiconductor layer 11 formed on the substrate 10 and a substrate 10 that covers the polysilicon semiconductor layer 11. The first insulating layer 12 formed thereon, the second insulating layer 13 formed on the first insulating layer 12, and one short side of the polysilicon semiconductor layer 11 on the second insulating layer 13 are electrically connected. A first voltage / current supply terminal Pi1 formed so as to be electrically connected to the other short side of the polysilicon semiconductor layer 11 on the second insulating layer 13, and The first Hall voltage readout terminal Po1 formed to be electrically connected to one long side of the polysilicon semiconductor layer 11 on the second insulating layer 13, and the other length of the polysilicon semiconductor layer 11 on the second insulating layer 13 Conduction with side The second Hall voltage readout terminal Po2 is formed as described above.

FIG. 2C is a cross-sectional view of the low-temperature polysilicon TFT. As shown in FIG. 2C, the low-temperature polysilicon TFT includes a polysilicon semiconductor layer 11A divided into an n ⁺ -type drain region, a source region, and an i-type region, and polysilicon on the first insulating layer 12. A gate terminal G formed so as to face the i-type region of the semiconductor layer 11, a drain terminal D formed so as to be electrically connected to the drain region of the polysilicon semiconductor layer 11 on the second insulating layer 13, and a second The source terminal D is formed on the insulating layer 13 so as to be electrically connected to the source region of the polysilicon semiconductor layer 11.

  The manufacturing process for forming the thin film Hall effect element THD, the drive circuit DV, the readout circuit RD, etc. is not limited to the low temperature polysilicon process, and a high temperature polysilicon process, an amorphous silicon process, or the like may be used. However, as will be described later, depending on the driving method and the reading method, it may be necessary to use a p-type TFT as a TFT constituting the driving circuit DV or the reading circuit RD. In this case, a low temperature or high temperature polysilicon process is used. It is desirable to do.

Next, a magnetic field measurement method using the magnetic field sensor 1 according to the first embodiment configured as described above will be described. First, in each of the element circuits PX11 to PXmn, the thin film Hall effect element THD is voltage driven or current driven by the driving circuit DV. Specifically, in the case of employing a voltage drive method applies a voltage V _x between the terminals of the first voltage current supply terminal Pi1 of thin film Hall effect device THD and the second voltage current supply terminal Pi2. Or, in the case of employing the current driving method, a current flows I _x between the terminals of the first voltage current supply terminal Pi1 of thin film Hall effect device THD and the second voltage current supply terminal Pi2.

As described above, when a current is passed between the first voltage current supply terminal Pi1 and the second voltage current supply terminal Pi2 of the thin film Hall effect element THD by voltage driving or current driving, the first Hall voltage reading terminal Po1 between terminals of the second Hall voltage reading terminal Po2, Hall voltage V _H is generated according to the magnetic field to be measured (Hall effect). As is well known, the Hall effect is a phenomenon in which an electric field (Hall voltage) is generated in the direction of the vector product of both when a magnetic field is applied to a conductor (in this embodiment, the polysilicon semiconductor layer 11) through which a current flows. Point to.

FIG. 3 is a schematic diagram showing the generation principle of the Hall voltage V _H by the Hall effect. In FIG. 3, an XYZ orthogonal coordinate system is set in which the length direction of the conductor (polysilicon semiconductor layer 11) is the X axis, the width direction is the Y axis, and the thickness direction is the Z axis. Represents. As shown in FIG. 3, by applying a voltage V _x between one short side of the polysilicon semiconductor layer 11 and the other short side, along the X-axis direction of the polysilicon semiconductor layer 11. When a current I _x is applied and a magnetic field (magnetic flux density B _z ) is applied in the Z-axis direction, an electric field E _y is generated in a direction (Y-axis direction) perpendicular to the current I _x and the magnetic flux density B _z . That is, the Hall voltage V _H is generated between one long side of the polysilicon semiconductor layer 11 and the other long side.

Here, when the electron velocity is v _x and the charge is q, the Lorentz force F _y generated in the Y-axis direction is expressed by F _y = q · v _x · B _z . In a steady state, since F _y = q · v _x · B _z = q · E _y , the electric field is expressed by E _y = v _x · B _z , and if the width of the polysilicon semiconductor layer 11 is d, then the hole The voltage is expressed as V _H = E _y · d = d · v _x · B _z . Therefore, the magnetic flux density is represented by B _z = (1 / d) · (V _H / v _x ). If the electron velocity v _x is known by some method, the design dimension d (width) of the polysilicon semiconductor layer 11 is obtained. and it is possible to determine the magnetic flux density B _z from the measured value V _H of the Hall voltage.

As described above, the voltage generated between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2 of the thin film Hall effect element THD is read as the Hall voltage V _H by the readout circuit RD, or the Hall voltage V _It is converted into a current corresponding to _H and read. Specifically, by sequentially supplying read timing control signals to the detection control lines SL1 to SLm from the first row to the m-th row, the read circuit RD is sequentially operated in units of rows, and the Hall voltage V _H or read out is converted into a current corresponding to the Hall voltage V _H.

For example, when a read timing control signal is supplied to the detection control line SL1 in the first row, the read circuits RD of the element circuits PX11 to PX1n belonging to the first row operate, and each read circuit RD has a corresponding thin film Hall effect. read and converted into a current corresponding to the Hall voltage V _H or Hall voltage V _H of the element THD, and outputs their reading results to the outside via the detection output wiring RL1~RLn corresponding to each. That is, the readout circuit RD belonging to the first row and the first column outputs a current corresponding to the Hall voltage V _H or Hall voltage V _H via the detection output wiring RL1, readout circuit RD is detected outputs belonging to a row n-th column via the wiring RLn outputs a current corresponding to the Hall voltage V _H or Hall voltage V _H.

At this time, a current corresponding to the Hall voltage V _H or Hall voltage V _H is obtained via the detection output wiring RL1 to RLn, measured by an external device (not shown), calculates a magnetic flux density B _z on the basis of the measurement results As a result, the measurement result of the magnetic field by the element circuits PX11 to PX1n belonging to the first row is obtained. Similarly, a read timing control signal is sequentially supplied to the second row, the third row,..., The m-th row, and the Hall voltage V _H obtained via the detection output wirings RL1 to RLn at each read timing or a current corresponding to the Hall voltage V _H, as measured by an external device (not shown), by calculating the magnetic flux density B _z based on the measurement result, as shown in FIG. 4, all elements circuits constituting the matrix Magnetic field measurement results using PX11 to PXmn are obtained. Further, the temporal variation of the magnetic field can be measured by periodically repeating the reading operation as described above.

 As described above, according to the magnetic field sensor 1 according to the present embodiment, each thin film Hall effect element THD arranged in a matrix generates a Hall voltage corresponding to the magnetic field to be measured at the arrangement location. By measuring the Hall voltage of each thin-film Hall effect element THD and converting it to a magnetic field (magnetic flux density), it is not a local magnetic field measurement as in the past, but is distributed in a plane and space and is dynamic. It is possible to perform a simple magnetic field measurement.

[Second Embodiment: Specific Example 1 of Voltage Reading Method]
Next, the magnetic field sensor 2 according to the second embodiment will be described. This second embodiment is a specific example of the readout circuit RD for reading direct inter-terminal voltage of the first Hall voltage reading terminal Po1 provided in the thin film Hall effect device THD and the second Hall voltage reading terminal Po2 as Hall voltage V _H It is about.

  FIG. 5 shows a circuit configuration diagram of the magnetic field sensor 2 according to the second embodiment. As described above, the second embodiment shows a specific example of the internal configuration of the read circuit RD of the first embodiment. Therefore, the same components as those in FIG. Omitted. In addition, since all the circuit configurations of the element circuits PX11 to PXmn are common, FIG. 5 representatively shows the element circuit PX11 in the first row and the first column, and in order to distinguish it from the first embodiment, Is RDa.

 As shown in FIG. 5, the magnetic field sensor 2 according to the second embodiment is provided with two detection output wirings (first detection output wiring RL1a and second detection output wiring RL1b in the first column) for each column. The read circuit RDa of the element circuit PX11 (also common to other element circuits) includes a first read thin film transistor Tr1 and a second read thin film transistor Tr2.

 The first readout thin film transistor Tr1 is an n-type MOS (Metal Oxide Semiconductor) transistor, the gate terminal is connected to the detection control wiring SL1, and the drain terminal is connected to the first Hall voltage readout terminal Po1 of the thin film Hall effect element THD. The source terminal is connected to the first detection output wiring RL1a. The second readout thin film transistor Tr2 is also an n-type MOS transistor, and has a gate terminal connected to the detection control wiring SL1, a drain terminal connected to the second Hall voltage readout terminal Po2 of the thin film Hall effect element THD, and a source terminal. Is connected to the second detection output wiring RL1b.

Next, the operation of the magnetic field sensor 2 including the readout circuit RDa configured as described above will be described. In all the element circuits PX11 to PXmn, the thin film Hall effect element THD is driven by the drive circuit DV, and the measurement target is between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. It is assumed that the Hall voltage V _H corresponding to the magnetic field is generated.

 FIG. 6 shows temporal changes in potentials of the detection control wiring SL1 in the first row, the detection control wiring SL2 in the second row, the detection control wiring SL3 in the third row, the first detection output wiring RL1a, and the second detection output wiring RL1b. It is a timing chart showing. As shown in FIG. 6, when the read timing control signal is sequentially supplied to the detection control lines SL1, SL2, and SL3, the potential of the detection control line SL1 becomes a high level during the period from time t1 to time t2. It is assumed that the potential of the detection control line SL2 becomes high level during the period from t2 to t3, and the potential of the detection control line SL3 becomes high level during the period from time t3 to t4.

Thus, when the potential of the detection control wiring SL1 becomes high level at time t1, the first read thin film transistor Tr1 and the second read thin film transistor Tr1 in the read circuit RDa of the element circuit PX11 (specifically, all element circuits belonging to the first row) The read thin film transistor Tr2 is turned on, and the first Hall voltage read terminal Po1 and the first detection output wiring RL1a of the thin film Hall effect element THD are electrically connected, and the second Hall voltage read terminal Po2 and the second Hall voltage read terminal Po2 are electrically connected. The detection output wiring RL1b is electrically connected. At this time, by measuring the potential difference between the first detection output wiring RL1a and the second detection output wiring RL1b, it is possible to measure the Hall voltage V _H generated in the thin film Hall effect device THD element circuit PX11 directly.
Although not shown in FIG. 5, since the first detection output wiring and the second detection output wiring are provided in the other columns, for example, the thin film Hall effect element THD of the element circuit PX12 in the first row and the second column. to measure the Hall voltage V _H generated in the can by measuring the potential difference between the first detection output wiring provided in the second column and the second detection output wiring.

Similarly, when the potential of the detection control wiring SL2 becomes high level at time t2, the first read thin film transistor Tr1 and the second read in the read circuit RDa of the element circuit PX21 (specifically, all element circuits belonging to the second row). The thin film transistor Tr2 is turned on. At this time, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX21 can be measured by measuring the potential difference between the first detection output wiring RL1a and the second detection output wiring RL1b. For example, in order to measure the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX22 in the second row and the second column, the first detection output wiring and the second detection output wiring provided in the second column What is necessary is just to measure the electric potential difference.

Similarly, when the potential of the detection control line SL3 becomes high level at time t3, the first read thin film transistor Tr1 and the second read in the read circuit RDa of the element circuit PX31 (specifically, all element circuits belonging to the third row). The thin film transistor Tr2 is turned on. At this time, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX31 can be measured by measuring the potential difference between the first detection output wiring RL1a and the second detection output wiring RL1b. For example, in order to measure the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX32 in the third row and the second column, the first detection output wiring and the second detection output wiring provided in the second column What is necessary is just to measure the electric potential difference.

Repeating the above-described read operation until m-th row, obtained by calculating the magnetic flux density B _z based on the measurement results, the magnetic field measurements of by all elements circuit PX11~PXmn as shown in FIG. 4 It is done. Thus, according to the magnetic field sensor 2 of the second embodiment, it is possible to read out the Hall voltage V _H of the thin-film Hall effect element THD of each element circuits PX11~PXmn a simple circuit configuration.

[Third Embodiment: Specific Example 2 of Voltage Reading Method]
Next, the magnetic field sensor 3 according to the third embodiment will be described. Third embodiment reads a charging voltage obtained by charging the terminal voltage of the first Hall voltage reading terminal Po1 provided in the thin film Hall effect device THD and the second Hall voltage reading terminal Po2 as Hall voltage V _H The present invention relates to a specific example of the read circuit RD.

  FIG. 7 shows a circuit configuration diagram of the magnetic field sensor 3 according to the third embodiment. In FIG. 7, the same components as those in FIG. Further, since the circuit configurations of the element circuits PX11 to PXmn are all common, FIG. 7 representatively shows the element circuit PX11 in the first row and the first column, and is read in order to distinguish it from the first and second embodiments. The code of the circuit is RDb.

 As shown in FIG. 7, the readout circuit RDb of the element circuit PX11 (also common to other element circuits) in the third embodiment includes the first readout thin film transistor Tr1 and the second readout transistor Tr1 as in the second embodiment (FIG. 5). The read thin film transistor Tr2, the first terminal is connected to the first Hall voltage read terminal Po1 of the thin film Hall effect element THD and the drain terminal of the first read thin film transistor Tr1, and the second terminal is the second Hall of the thin film Hall effect element THD. The capacitor Ch is connected to the voltage readout terminal Po2 and the drain terminal of the second readout thin film transistor Tr2.

Next, the operation of the magnetic field sensor 3 including the readout circuit RDb configured as described above will be described. In all the element circuits PX11 to PXmn, the thin film Hall effect element THD is driven by the drive circuit DV, and the measurement target is between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. It is assumed that the Hall voltage V _H corresponding to the magnetic field is generated.

Capacitor Ch is charged by the Hall voltage V _H generated as described above, the charge voltage at the time of full charge would be consistent with the Hall voltage V _H. Thereafter, as in the second embodiment, when the read timing control signal is sequentially supplied to the detection control lines SL1, SL2, SL3,... And the potential of the detection control line SL1 becomes high level at time t1, the element circuit The first readout thin film transistor Tr1 and the second readout thin film transistor Tr2 in the readout circuit RDb of the PX21 (specifically, all element circuits belonging to the second row) are turned on, and the charging voltage of the capacitor Ch, that is, the Hall voltage V _H Is read as a potential difference between the first detection output wiring RL1a and the second detection output wiring RL1b.

Since the response speed of the Hall voltage V _H is not so fast, in the configuration directly read the Hall voltage V _H as in the second embodiment, thoroughly Hall voltage V _H in a short read period (high level period of the detection control wiring) Although it is sometimes difficult to read, according to the configuration of the third embodiment, in order to charge the capacitor Ch allow sufficient time for the Hall voltage V _H, a sufficiently Hall voltage V _H in a short read period It can be read out.

In the configuration of FIG. 7, noise due to recharging from the thin film Hall effect element THD may occur during the readout period of the Hall voltage V _H charged in the capacitor Ch. Therefore, in order to cut noise due to such recharging of the capacitor Ch, a complementary type with respect to the first readout thin film transistor Tr1 and the second readout thin film transistor Tr2 as in the readout circuit RDb ′ shown in FIG. The third readout thin film transistor Tr3 and the fourth readout thin film transistor Tr4 may be added.

 The third readout thin film transistor Tr3 is a p-type MOS transistor, and has a gate terminal connected to the detection control wiring SL1, a source terminal connected to the first Hall voltage readout terminal Po1 of the thin film Hall effect element THD, and a drain terminal. The first terminal of the capacitor Ch and the drain terminal of the first readout thin film transistor Tr1 are connected. The fourth read thin film transistor Tr4 is a p-type MOS transistor, and has a gate terminal connected to the detection control line SL1, a source terminal connected to the second Hall voltage read terminal Po2 of the thin film Hall effect element THD, and a drain terminal. The second terminal of the capacitor Ch and the drain terminal of the second readout thin film transistor Tr2 are connected.

By adopting such a configuration, the third readout thin film transistor Tr3 and the fourth readout thin film transistor Tr4 can be used in the charging period of the capacitor Ch (the readout timing control signal is not supplied and the potential of each detection output wiring is at a low level). Since the capacitor Ch can be charged without any problem since it is in the ON state, on the other hand, in the reading period of the Hall voltage V _H charged in the capacitor Ch, that is, in the ON period of the first reading thin film transistor Tr1 and the second reading thin film transistor Tr2, the third Since the readout thin film transistor Tr3 and the fourth readout thin film transistor Tr4 are turned off, it is possible to cut noise caused by recharging from the thin film Hall effect element THD.

[Fourth Embodiment: Specific Example of Current Reading Method]
Next, the magnetic field sensor 4 according to the fourth embodiment will be described. Fourth embodiment relates to a specific example of the readout circuit RD to read by converting the Hall voltage V _H of the thin-film Hall effect element THD current.

  FIG. 9 shows a circuit configuration diagram of the magnetic field sensor 4 according to the fourth embodiment. As described above, the fourth embodiment shows a specific example of the internal configuration of the read circuit RD of the first embodiment. Therefore, the same components as those in FIG. Omitted. Since the circuit configurations of the element circuits PX11 to PXmn are all common, the element circuit PX11 in the first row and the first column is representatively shown in FIG. 9, and the reference numerals of the readout circuits are used to distinguish them from the first embodiment. Is RDc.

As shown in FIG. 9, the magnetic field sensor 4 according to the fourth embodiment is provided with common potential wirings CL1 to CLm commonly connected to the readout circuit RDc of the element circuit belonging to one row for each row of the matrix. The readout circuit RDc of the element circuit PX11 (common to other element circuits) is composed of a fifth readout thin film transistor Tr5 and a sixth readout thin film transistor Tr6.
In FIG. 9, only the common potential wiring CL1 is illustrated, and the common potential wirings CL1 to CLm are connected to the ground (GND).

The fifth read thin film transistor Tr5 is an n-type MOS transistor, and has a gate terminal connected to the first Hall voltage read terminal Po1 of the thin film Hall effect element THD and a drain terminal connected to the drain terminal of the sixth read thin film transistor Tr6. The source terminal is connected to the common potential wiring CL1. The sixth readout thin film transistor Tr6 is also an n-type MOS transistor, the gate terminal is connected to the detection control line SL1, the drain terminal is connected to the drain terminal of the fifth readout thin film transistor Tr5, and the source terminal is the detection output line. It is connected to RL1.
Note that the second Hall voltage readout terminal Po2 of the thin film Hall effect element THD is in an open state.

Next, the operation of the magnetic field sensor 4 including the readout circuit RDc configured as described above will be described. In all the element circuits PX11 to PXmn, the thin film Hall effect element THD is driven by the drive circuit DV, and the measurement target is between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. It is assumed that the Hall voltage V _H corresponding to the magnetic field is generated.

 FIG. 10 is a timing chart showing temporal changes in the potential of the first detection control line SL1, the second detection control line SL2, the third detection control line SL3, and the current flowing through the detection output line RL1. is there. As shown in FIG. 10, when the read timing control signal is sequentially supplied to the detection control lines SL1, SL2, and SL3, the potential of the detection control line SL1 becomes high level during the period from time t1 to time t2. It is assumed that the potential of the detection control line SL2 becomes high level during the period from t2 to t3, and the potential of the detection control line SL3 becomes high level during the period from time t3 to t4.

Thus, when the potential of the detection control wiring SL1 becomes high level at time t1, the sixth readout thin film transistor Tr6 in the readout circuit RDc of the element circuit PX11 (specifically, all element circuits belonging to the first row) is turned on. to become, the detection output wiring RL1, the gate voltage of the fifth readout TFT Tr5 (voltage of the first Hall voltage reading terminal Po1) - current produced by the current conversion action, i.e. current I _H corresponding to the Hall voltage V _H Will flow. Thus, by measuring the current I _H flowing through the detection output wiring RL1, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX11 can be indirectly measured.
Although not shown in FIG. 9, since detection output wiring is provided in other columns, for example, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX12 in the first row and the second column. Is measured by measuring the current I _H flowing through the detection output wiring RL2 provided in the second column.

Similarly, when the potential of the detection control wiring SL2 becomes high level at time t2, the sixth readout thin film transistor Tr6 in the readout circuit RDc of the element circuit PX21 (specifically, all element circuits belonging to the second row) is turned on. Thus, the current I _H corresponding to the Hall voltage V _H flows through the detection output wiring RL1. Thus, by measuring the current I _H flowing through the detection output wiring RL1, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX21 can be indirectly measured. For example, in order to measure the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX22 in the second row and the second column, the current I _H flowing through the detection output wiring RL2 provided in the second column is measured. Just do it.

Similarly, when the potential of the detection control line SL3 becomes high level at time t3, the sixth readout thin film transistor Tr6 in the readout circuit RDc of the element circuit PX31 (specifically, all element circuits belonging to the third row) is turned on. Thus, the current I _H corresponding to the Hall voltage V _H flows through the detection output wiring RL1. Thus, by measuring the current I _H flowing through the detection output wiring RL1, the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX31 can be indirectly measured. For example, in order to measure the Hall voltage V _H generated in the thin film Hall effect element THD of the element circuit PX32 in the third row and the second column, the current I _H flowing through the detection output wiring RL2 provided in the second column is measured. Just do it.
Repeating the above-described read operation until m-th row, obtained by calculating the magnetic flux density B _z based on the measurement results, the magnetic field measurements of by all elements circuit PX11~PXmn as shown in FIG. 4 It is done.

When the voltage reading method is employed as in the second and third embodiments, it may be difficult to accurately read the minute Hall voltage V _H , but according to the current reading method as in the fourth embodiment. Since the transistor can be converted into a current corresponding to the Hall voltage V _H by the voltage-current conversion action of the transistor and read out, the Hall voltage V _H can be measured with high accuracy.

[Fifth Embodiment: Specific Example of Voltage Drive Method]
Next, the magnetic field sensor 5 according to the fifth embodiment will be described. The fifth embodiment relates to a specific example of a drive circuit DV that drives the thin film Hall effect element THD with voltage.

  In FIG. 11, the circuit block diagram of the magnetic field sensor 5 which concerns on 5th Embodiment is shown. As described above, since the fifth embodiment shows a specific example of the internal configuration of the drive circuit DV of the first embodiment, the same components as those in FIG. Omitted. Further, since the circuit configurations of the element circuits PX11 to PXmn are all common, the element circuit PX11 in the first row and the first column is representatively shown in FIG. 11, and the reference numerals of the drive circuits are used to distinguish them from the first embodiment. Is DVa.

As shown in FIG. 11, the magnetic field sensor 5 according to the fifth embodiment includes, for each column of the matrix, the drive potential lines DL1 to DLn and the common potential that are commonly connected to the drive circuit DVa of the element circuit belonging to one column. Wiring lines CL1 to CLn are provided, and the driving circuit DVa of the element circuit PX11 (common to other element circuits) includes a first voltage / current supply terminal Pi1 and a driving potential wiring DL1 provided in the thin film Hall effect element THD. The first connection wiring L1 to be connected and the second connection wiring L2 for connecting the second voltage / current supply terminal Pi2 provided in the thin film Hall effect element THD and the common potential wiring CL1 are configured.
Note that FIG. 11 shows only the driving potential wiring DL1 and the common potential wiring CL1 in the first column, the driving potential wirings DL1 to DLn are connected to the power supply (VDD), and the common potential wirings CL1 to CLm are grounded ( GND).

By adopting such a configuration, it corresponds to the potential difference between the drive potential wiring DL1 and the common potential wiring CL1 between the first voltage current supply terminal Pi1 and the second voltage current supply terminal Pi2 of the thin film Hall effect element THD. A voltage corresponding to the applied voltage flows through the polysilicon semiconductor layer 11, and the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2 are in accordance with the magnetic field to be measured. Hall voltage _VH is generated.

As described with reference to FIG. 3 in the first embodiment, the magnetic flux density is represented by B _z = (1 / d) · (V _H / v _x ), and if the electron velocity v _x is known by some method. it can be obtained a magnetic flux density B _z from the measured value V _H of the design size d (width) and the Hall voltage of the polysilicon semiconductor layer 11. Here, when the applied voltage to the thin film Hall effect element THD is V _x , the carrier (electron) mobility of the polysilicon semiconductor layer 11 is μ, and the length of the polysilicon semiconductor layer 11 is L, the speed of electrons is Since v _x = μ · E _y = μ · (V _x / L), the magnetic flux density is B _z = (L / d) · (1 / μ) · (V _H / V _x ). . Specifically, the design dimensions d and L of the polysilicon semiconductor layer 11, the material constant (carrier mobility) μ, the applied voltage V _x, and the Hall voltage obtained using any of the second to fourth embodiments are measured. it can be obtained a magnetic flux density _{B z} and a value _{V H.}

[Sixth Embodiment: Specific Example 1 of Current Driving Method]
Next, the magnetic field sensor 6 according to the sixth embodiment will be described. The sixth embodiment relates to a specific example of a drive circuit DV that drives a thin film Hall effect element THD with current.

  FIG. 12 shows a circuit configuration diagram of the magnetic field sensor 6 according to the sixth embodiment. As described above, since the sixth embodiment shows a specific example of the internal configuration of the drive circuit DV of the first embodiment, the same components as in FIG. Omitted. Further, since the circuit configurations of the element circuits PX11 to PXmn are all common, the element circuit PX11 in the first row and the first column is representatively shown in FIG. 12, and the reference numerals of the drive circuits are used to distinguish them from the first embodiment. Is DVb.

As shown in FIG. 12, the magnetic field sensor 6 according to the sixth embodiment includes, for each column of the matrix, current supply wirings IL1 to ILn and a common potential that are commonly connected to the drive circuit DVb of the element circuit belonging to one column. Wiring lines CL1 to CLn and current sources CS1 to CSn for supplying driving current to the current supply wirings IL1 to ILn are provided, and the driving circuit DVb of the element circuit PX11 (common to other element circuits) is a thin film. It is composed of a second connection line L2 connecting the second voltage / current supply terminal Pi2 provided in the Hall effect element THD and the common potential line CL1, and a first driving thin film transistor Td1.
In FIG. 12, only the current supply wiring IL1, the common potential wiring CL1, and the current source CS1 in the first column are illustrated, and the common potential wirings CL1 to CLm are connected to the ground (GND).

 The first driving thin film transistor Td1 is an n-type MOS transistor, and has a gate terminal connected to the detection control wiring SL1, a drain terminal connected to the current supply wiring IL1, and a source terminal provided to the thin film Hall effect element THD. The first voltage / current supply terminal Pi1 is connected.

With this configuration, when the potential of the detection control line SL1 becomes high level, the first driving thin film transistor Td1 is turned on, and the first voltage / current supply terminal Pi1 of the thin film Hall effect element THD A current flows between the terminals of the two voltage current supply terminals Pi2 (that is, the polysilicon semiconductor layer 11), and according to the magnetic field to be measured between the terminals of the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. Hall voltage _VH is generated.

As described with reference to FIG. 3 in the first embodiment, the magnetic flux density is represented by B _z = (1 / d) · (V _H / v _x ), and if the electron velocity v _x is known by some method. it can be obtained a magnetic flux density B _z from the measured value V _H of the design size d (width) and the Hall voltage of the polysilicon semiconductor layer 11. Here, when the carrier (electron) density of the polysilicon semiconductor layer 11 is n, the carrier charge is q, and the thickness is t, the current flowing through the thin film Hall effect element THD is I _x = q · d · t · n. Since it is represented by v _x , the magnetic flux density is B _z = q · t · n · (V _H / I _x ). That is, the physical constant q, the design dimension t of the polysilicon semiconductor layer 11, the material constant (carrier density) n, the applied current _Ix, and the Hall voltage obtained using any of the second to fourth embodiments. it can be from the measurement values V _H Request flux density B _z.

In the fifth embodiment, a material constant (carrier mobility) μ is required. However, since the carrier mobility μ varies widely between process conditions and devices (thin film Hall effect elements THD), the magnetic flux density _Bz is accurately determined. There is a possibility that it cannot be obtained well. On the other hand, in the sixth embodiment, since the material constant (carrier density) n with relatively small process conditions and variations between devices is used, the magnetic flux density _Bz can be obtained with high accuracy.

[Seventh Embodiment: Specific Example 2 of Current Driving Method]
Next, the magnetic field sensor 7 according to the seventh embodiment will be described. The seventh embodiment relates to a specific example of a drive circuit DV that drives a thin film Hall effect element THD in current (a drive circuit DV including a constant current circuit that supplies a constant current to the thin film Hall effect element THD).

  FIG. 13 shows a circuit configuration diagram of the magnetic field sensor 7 according to the seventh embodiment. As described above, since the seventh embodiment shows a specific example of the internal configuration of the drive circuit DV of the first embodiment, the same components as those in FIG. Omitted. Since the circuit configurations of the element circuits PX11 to PXmn are all common, FIG. 13 representatively shows the element circuit PX11 in the first row and the first column, and is driven in order to distinguish it from the fifth and sixth embodiments. The circuit code is DVc.

As shown in FIG. 13, the magnetic field sensor 7 according to the seventh embodiment includes, for each column of the matrix, current supply wirings IL1 to ILn commonly connected to the drive circuit DVc of the element circuit belonging to one column, the drive potential. Wirings DL1 to DLn, common potential wirings CL1 to CLn, and current sources CS1 to CSn for supplying a driving current to the current supply wirings IL1 to ILn are provided, and each row of the matrix belongs to one row. Drive control wirings SDL1 to SDLm commonly connected to the element circuit drive circuit DVc are provided. In addition, the drive circuit DVc of the element circuit PX11 (common to other element circuits) includes a second connection line L2 that connects the second voltage / current supply terminal Pi2 provided in the thin film Hall effect element THD and the common potential line CL1. And a constant current circuit CC for supplying a constant current to the thin film Hall effect element THD.
In FIG. 13, only the current supply wiring IL1 in the first column, the driving potential wiring DL1, the common potential wiring CL1, the current source CS1, and the driving control wiring SDL1 in the first row are illustrated, and the driving potential wirings DL1 to DLn are illustrated. Are connected to the power supply (VDD), and the common potential lines CL1 to CLm are connected to the ground (GND).

 The constant current circuit CC includes a second driving thin film transistor Td2, a third driving thin film transistor Td3, a fourth driving thin film transistor Td4, a fifth driving thin film transistor Td5, and a first voltage storage capacitor Cs1.

 The second driving thin film transistor Td2 is an n-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is connected to the current supply wiring IL1, and the drain terminal is the source terminal of the third driving thin film transistor Td3. Are connected to the source terminal of the fourth driving thin film transistor Td4 and the drain terminal of the fifth driving thin film transistor Td5.

 The third driving thin film transistor Td3 is also an n-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is the drain terminal of the second driving thin film transistor Td2, and the source terminal of the fourth driving thin film transistor Td4. The drain terminal of the fifth driving thin film transistor Td5 is connected to the second terminal of the first voltage storage capacitor Cs1 and the gate terminal of the fifth driving thin film transistor Td5.

  The fourth driving thin film transistor Td4 is a p-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is the drain terminal of the second driving thin film transistor Td2, the source terminal of the third driving thin film transistor Td3, and The drain terminal of the fifth driving thin film transistor Td5 is connected to the first voltage / current supply terminal Pi1 provided in the thin film Hall effect element THD.

  The fifth driving thin film transistor Td5 is also a p-type MOS transistor, the gate terminal is connected to the drain terminal of the third driving thin film transistor Td3 and the second terminal of the first voltage storage capacitor Cs1, and the source terminal is the driving potential. The drain terminal is connected to the wiring DL1 and the first terminal of the first voltage storage capacitor Cs1, the drain terminal is the drain terminal of the second driving thin film transistor Td2, the source terminal of the third driving thin film transistor Td3, and the source terminal of the fourth driving thin film transistor Td4. Connected with.

  The first voltage storage capacitor Cs1 has a first terminal connected to the drive potential line DL1 and the source terminal of the fifth driving thin film transistor Td5, and a second terminal connected to the drain terminal of the third driving thin film transistor Td3 and the fifth driving thin film transistor. It is connected to the gate terminal of Td5.

 Next, the operation of the magnetic field sensor 7 including the drive circuit DVc configured as described above will be described with reference to FIG. FIG. 14 shows the temporal relationship of the potentials of the drive control wiring SDL1 and detection control wiring SL1 in the first row, the drive control wiring SDL2 and detection control wiring SL2 in the second row, and the drive control wiring SDL3 and detection control wiring SL3 in the third row. It is a timing chart showing a change.

 As shown in FIG. 14, the drive timing control signal is sequentially supplied to the drive control lines SDL1, SDL2, and SDL3, so that the potential of the drive control line SDL1 becomes high level during the period from time t1 to time t2. It is assumed that the potential of the drive control line SDL2 becomes high level during the period from t2 to t3, and the potential of the drive control line SDL3 becomes high level during the period from time t3 to t4. Further, the read timing control signal is sequentially supplied to the detection control lines SL1, SL2, and SL3, so that the potential of the detection control line SL1 becomes high level during the period from time t5 to t6, and during the period from time t6 to t7. It is assumed that the potential of the detection control line SL2 becomes high level and the potential of the detection control line SL3 becomes high level during the period from time t7 to t8.

 Thus, when the potential of the drive control wiring SDL1 becomes high level at time t1, the second driving thin film transistor Td2 and the third thin film transistor Td2 in the driving circuit DVc of the element circuit PX11 (specifically, all element circuits belonging to the first row) The driving thin film transistor Td3 is turned on, while the fourth driving thin film transistor Td4 and the fifth driving thin film transistor Td5 are turned off. Therefore, a current flows through a path of the driving potential wiring DL1, the first voltage storage capacitor Cs1, the third driving thin film transistor Td3, the second driving thin film transistor Td2, and the current supply wiring IL1, and the fifth driving thin film transistor Td5 supplies a constant current. Is stored (charged) in the first voltage storage capacitor Cs1.

When the potential of the drive control line SDL1 becomes low level at time t2, the second drive thin film transistor Td2 and the third drive thin film transistor Td3 are turned off, while the fourth drive thin film transistor Td4 is turned on, The driving thin film transistor Td5 is also turned on by the gate voltage stored in the first voltage storage capacitor Cs1. As a result, a constant current is supplied to the thin film Hall effect element THD via the fourth driving thin film transistor Td4 and the fifth driving thin film transistor Td5, and between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2. In addition, a Hall voltage V _H corresponding to the magnetic field to be measured is generated.

Similarly, when the potential of the drive control wiring SDL2 becomes high level at time t2, a constant current is supplied by the fifth driving thin film transistor Td5 in the drive circuit DVc of the element circuit PX21 (specifically, all element circuits belonging to the second row). Is stored (charged) in the first voltage storage capacitor Cs1. When the potential of the drive control line SDL2 becomes low level at time t3, the constant current is passed through the fourth driving thin film transistor Td4 and the fifth driving thin film transistor Td5 in the driving circuit DVc of the element circuit PX21. And a Hall voltage V _H corresponding to the magnetic field to be measured is generated between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2.

Similarly, when the potential of the drive control wiring SDL3 becomes a high level at time t3, a constant current is supplied by the fifth driving thin film transistor Td5 in the drive circuit DVc of the element circuit PX31 (specifically, all element circuits belonging to the third row). Is stored (charged) in the first voltage storage capacitor Cs1. When the potential of the drive control line SDL4 becomes low level at time t4, the constant current is supplied to the thin film Hall effect element THD via the fourth driving thin film transistor Td4 and the fifth driving thin film transistor Td5 in the driving circuit DVc of the element circuit PX31. And a Hall voltage V _H corresponding to the magnetic field to be measured is generated between the first Hall voltage readout terminal Po1 and the second Hall voltage readout terminal Po2.

On the other hand, when the potential of the detection control line SL1 becomes high level at time t5, as described in the second to fourth embodiments, the read voltage RD (any one of RDa, RDb, and RDc) causes the Hall voltage V _H or current is read in accordance with the Hall voltage V _H. The case where the potentials of the detection control wiring SL2 and the detection control wiring SL3 become high level is the same as in the second to fourth embodiments.
Thus, by providing the constant current circuit in the drive circuit DVc, the thin film Hall effect element THD can be more accurately driven by current.

[Eighth embodiment: specific example in the case of providing a drive circuit in the peripheral region]
Next, the magnetic field sensor 8 according to the eighth embodiment will be described. The eighth embodiment relates to a specific example when the drive circuit DV for driving the thin film Hall effect element THD is provided in the peripheral region of the element circuits PX11 to PXmn arranged in a matrix.

  FIG. 15 is a circuit configuration diagram of the magnetic field sensor 8 according to the eighth embodiment. As described above, since the eighth embodiment shows a specific example of the drive circuit DV provided in the peripheral region, the same components as those in FIG. .

As shown in FIG. 15, in the magnetic field sensor 8 according to the eighth embodiment, the thin film holes of the element circuits belonging to one column for each column of the matrix in the peripheral region of the element circuits PX11 to PXmn arranged in a matrix. Drive circuits DV1 to DVn including constant current circuits for simultaneously driving the effect elements THD are provided. In the peripheral region, a current supply line IL, a drive potential line DL, and a current source CS that supplies a drive current to the current supply line DL are provided in common with the drive circuits DV1 to DVn. Further, drive control lines SDL1 to SDLn are provided corresponding to the respective drive circuits DV1 to DVn. On the other hand, a common potential wiring CL is provided in a peripheral region on the opposite side across the matrix.
Note that the driving potential wiring DL is connected to the power supply (VDD), and the common potential wiring CL is connected to the ground (GND).

 Each of the driving circuits DV1 to DVn includes a constant current circuit including a sixth driving thin film transistor Td6, a seventh driving thin film transistor Td7, an eighth driving thin film transistor Td8, a ninth driving thin film transistor Td9, and a second voltage storage capacitor Cs2. ing. Since the circuit configurations of the respective drive circuits DV1 to DVn are all common, the following description will be made using the drive circuit DV1 in the first column as a representative.

 In the drive circuit DV1, the sixth driving thin film transistor Td6 is an n-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is connected to the current supply wiring IL, and the drain terminal is used for the seventh driving. The source terminal of the thin film transistor Td7, the source terminal of the eighth driving thin film transistor Td8, and the drain terminal of the ninth driving thin film transistor Td9 are connected.

 The seventh driving thin film transistor Td7 is also an n-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is the drain terminal of the sixth driving thin film transistor Td6, and the source terminal of the eighth driving thin film transistor Td8. The drain terminal of the ninth driving thin film transistor Td9 is connected to the second terminal of the second voltage storage capacitor Cs2 and the gate terminal of the ninth driving thin film transistor Td9.

 The eighth driving thin film transistor Td8 is a p-type MOS transistor, the gate terminal is connected to the drive control wiring SDL1, the source terminal is the drain terminal of the sixth driving thin film transistor Td6, the source terminal of the seventh driving thin film transistor Td7, and The drain terminal of the ninth driving thin film transistor Td9 is connected to the first voltage / current supply terminal Pi1 of the thin film Hall effect element THD in the element circuit PX11 in the first row and the first column.

 The ninth driving thin film transistor Td9 is also a p-type MOS transistor, the gate terminal is connected to the drain terminal of the seventh driving thin film transistor Td7 and the second terminal of the second voltage storage capacitor Cs2, and the source terminal is the driving potential. The wiring DL is connected to the first terminal of the second voltage storage capacitor Cs2, and the drain terminal is the drain terminal of the sixth driving thin film transistor Td6, the source terminal of the seventh driving thin film transistor Td7, and the source terminal of the eighth driving thin film transistor Td8. Connected with.

 The second voltage storage capacitor Cs2 has a first terminal connected to the drive potential line DL and the source terminal of the ninth drive thin film transistor Td9, and a second terminal connected to the drain terminal of the seventh drive thin film transistor Td7 and the ninth drive thin film transistor. It is connected to the gate terminal of Td9. The thin film Hall effect elements THD of the element circuits PX11 to PXm1 belonging to the first column are connected in series, and the second voltage / current supply terminal Pi2 of the thin film Hall effect element THD of the element circuit PXm1 in the last row (mth row). Are connected to the common potential wiring CL.

 The same applies to the other columns. For example, the driving circuit DVn in the n-th column includes the gate terminals of the sixth driving thin film transistor Td6, the seventh driving thin film transistor Td7, and the eighth driving thin film transistor Td8 connected to the driving control line SDLn, and The circuit configuration is the same as that of the drive circuit DV1 in the first column except that the terminal is connected to the first voltage / current supply terminal Pi1 of the thin film Hall effect element THD in the element circuit PX1n in the first row and n column. The thin film Hall effect elements THD of the element circuits PX1n to PXmn belonging to the nth column are also connected in series, and the second voltage / current supply terminal Pi2 of the thin film Hall effect element THD of the element circuit PXmn in the last row (mth row). This is also the same in that is connected to the common potential line CL.

 Next, the operation of the magnetic field sensor 8 configured as described above will be described with reference to FIG. FIG. 16 shows the potential times of the drive control lines SDL1, SDL2, and SDL3 in the first, second, and third columns, and the detection control lines SL1, SL2, and SL3 in the first, second, and third rows. It is a timing chart showing a target change.

 As shown in FIG. 16, the drive timing control signal is sequentially supplied to the drive control lines SDL1, SDL2, and SDL3, so that the potential of the drive control line SDL1 becomes high level during the period from time t1 to time t2. It is assumed that the potential of the drive control line SDL2 becomes high level during the period from t2 to t3, and the potential of the drive control line SDL3 becomes high level during the period from time t3 to t4. Further, the read timing control signal is sequentially supplied to the detection control lines SL1, SL2, and SL3, so that the potential of the detection control line SL1 becomes high level during the period from time t5 to t6, and during the period from time t6 to t7. It is assumed that the potential of the detection control line SL2 becomes high level and the potential of the detection control line SL3 becomes high level during the period from time t7 to t8.

 As described above, when the potential of the drive control wiring SDL1 becomes high level at time t1, the sixth driving thin film transistor Td6 and the seventh driving thin film transistor Td7 in the driving circuit DV1 in the first column are turned on, while the eighth driving is performed. The thin film transistor Td8 and the ninth driving thin film transistor Td9 are turned off. Therefore, a current flows through the path of the driving potential wiring DL → second voltage storage capacitor Cs2 → seventh driving thin film transistor Td7 → sixth driving thin film transistor Td6 → current supply wiring IL, and a constant current is generated by the ninth driving thin film transistor Td9. Is stored (charged) in the second voltage storage capacitor Cs2.

When the potential of the drive control line SDL1 becomes low level at time t2, the sixth driving thin film transistor Td6 and the seventh driving thin film transistor Td7 are turned off, while the eighth driving thin film transistor Td8 is turned on, and the ninth driving thin film transistor Td8 is turned on. The driving thin film transistor Td9 is also turned on by the gate voltage stored in the second voltage storage capacitor Cs2. As a result, a constant current is supplied to the thin film Hall effect elements THD in the element circuits PX11 to PXm1 belonging to the first column via the eighth driving thin film transistor Td8 and the ninth driving thin film transistor Td9. between a first Hall voltage reading terminal Po1 terminal of the second Hall voltage reading terminal Po2, Hall voltage V _H will occur in response to a magnetic field to be measured.

Similarly, when the potential of the drive control wiring SDL2 becomes a high level at time t2, the gate voltage necessary for flowing a constant current through the ninth driving thin film transistor Td9 in the driving circuit DV2 in the second column is the second voltage storage memory. It is stored (charged) in the capacitor Cs2. Then, when the potential of the drive control line SDL2 becomes low level at time t3, the constant current is passed through the eighth driving thin film transistor Td8 and the ninth driving thin film transistor Td9 in the driving circuit DV2, and the element circuits PX12˜ The Hall voltage V _H corresponding to the magnetic field to be measured is supplied to the thin film Hall effect element THD in PXm2 and between the first Hall voltage read terminal Po1 and the second Hall voltage read terminal Po2 in each thin film Hall effect element THD. Occurs.

Similarly, when the potential of the drive control wiring SDL3 becomes a high level at time t3, the gate voltage necessary for flowing a constant current through the ninth driving thin film transistor Td9 in the third row driving circuit DV3 is the second voltage storage memory. It is stored (charged) in the capacitor Cs2. Then, when the potential of the drive control wiring SDL3 becomes low level at time t4, the constant current passes through the eighth driving thin film transistor Td8 and the ninth driving thin film transistor Td9 in the driving circuit DV3, and the element circuits PX13 to The Hall voltage V _H corresponding to the magnetic field to be measured is supplied to the thin film Hall effect element THD in PXm3 and between the first Hall voltage read terminal Po1 and the second Hall voltage read terminal Po2 in each thin film Hall effect element THD. Occurs.

On the other hand, when the potential of the detection control line SL1 becomes high level at time t5, as described in the second to fourth embodiments, the read voltage RD (any one of RDa, RDb, and RDc) causes the Hall voltage V _H or current is read in accordance with the Hall voltage V _H. The case where the potentials of the detection control wiring SL2 and the detection control wiring SL3 become high level is the same as in the second to fourth embodiments.

 Thus, by providing the drive circuits DV1 to DVn not in the element circuit but in the peripheral region thereof, it is not necessary to separately use an IC chip for driving, and the cost can be reduced. Further, by providing the constant current circuit, the thin film Hall effect element THD can be more accurately driven by current.

 The preferred embodiments according to the present invention have been described above with reference to the accompanying drawings. However, it goes without saying that the present invention is not limited to such examples, and the above embodiments may be combined. It is obvious for those skilled in the art that various changes or modifications can be conceived within the scope of the technical idea described in the claims. It is understood that it belongs to.

It is a circuit block diagram of the magnetic field sensor 1 which concerns on 1st Embodiment of this invention. It is the structure schematic of thin film Hall effect element THD and a thin-film transistor. It is a principle explanatory view of the Hall effect. It is a schematic diagram which shows the magnetic field measurement result using the magnetic field sensor. It is a circuit block diagram of the magnetic field sensor 2 which concerns on 2nd Embodiment of this invention. 6 is an operation explanatory diagram of a readout circuit RDa in the magnetic field sensor 2. FIG. It is a circuit block diagram of the magnetic field sensor 3 which concerns on 3rd Embodiment of this invention. This is a modification of the magnetic field sensor 3. It is a circuit block diagram of the magnetic field sensor 4 which concerns on 4th Embodiment of this invention. 6 is an operation explanatory diagram of a readout circuit RDc in the magnetic field sensor 4. FIG. It is a circuit block diagram of the magnetic field sensor 5 which concerns on 5th Embodiment of this invention. It is a circuit block diagram of the magnetic field sensor 6 which concerns on 6th Embodiment of this invention. It is a circuit block diagram of the magnetic field sensor 7 which concerns on 7th Embodiment of this invention. FIG. 6 is an operation explanatory diagram of a drive circuit DVc of the magnetic field sensor 7. It is a circuit block diagram of the magnetic field sensor 8 which concerns on 8th Embodiment of this invention. FIG. 6 is an operation explanatory diagram of a drive circuit DV1 of the magnetic field sensor 8.

Explanation of symbols

 1, 2, 3, 4, 5, 6, 7, 8 ... Magnetic field sensor, PX11 to PXmn ... Element circuit, THD ... Thin film Hall effect element, Pi1 ... First voltage / current supply terminal, Pi2 ... Second voltage / current supply terminal , Po1... First Hall voltage readout terminal, Po2... Second Hall voltage readout terminal, DV... Drive circuit, RD... Readout circuit, SL1 to SLm ... detection control wiring, RL1 to RLn.

Claims (4)

A plurality of element circuits arranged in a matrix;
Detection control wiring connected to the plurality of element circuits arranged in the matrix row direction;
A first detection output wiring and a second detection output wiring connected to the plurality of element circuits arranged in the matrix column direction;
A current supply wiring connected to the plurality of element circuits arranged in the column direction of the matrix, a drive potential wiring, a common potential wiring, and a current source for supplying a driving current to the current supply wiring;
Drive control wiring connected to the plurality of element circuits arranged in the matrix row direction;
With
Each of the element circuits drives a thin film Hall effect element having a first Hall voltage readout terminal and a second Hall voltage readout terminal, a readout circuit for reading the Hall voltage of the thin film Hall effect element, and the thin film Hall effect element. A drive circuit,
Each of the readout circuits includes a first readout thin film transistor and a second readout thin film transistor,
A gate terminal of the first readout thin film transistor is connected to the detection control wiring;
A source terminal of the first readout thin film transistor is connected to the first detection output wiring;
A drain terminal of the first readout thin film transistor is connected to the first hole readout terminal;
A gate terminal of the second readout thin film transistor is connected to the detection control wiring;
A source terminal of the second readout thin film transistor is connected to the second detection output wiring;
A drain terminal of the second readout thin film transistor is connected to the second hole readout terminal;
Each of the driving circuits includes a constant current circuit including a second driving thin film transistor, a third driving thin film transistor, a fourth driving thin film transistor, a fifth driving thin film transistor, and a first voltage storage capacitor; A second connection wiring,
A gate terminal of the second driving thin film transistor is connected to the driving control wiring;
A source terminal of the second driving thin film transistor is connected to the current supply wiring;
A drain terminal of the second driving thin film transistor is connected to a source terminal of the third driving thin film transistor;
A gate terminal of the third driving thin film transistor is connected to the driving control wiring;
A source terminal of the third driving thin film transistor is connected to a drain terminal of the second driving thin film transistor;
A drain terminal of the third driving thin film transistor is connected to a gate terminal of the fifth driving thin film transistor;
A gate terminal of the fourth driving thin film transistor is connected to the driving control wiring;
A source terminal of the fourth driving thin film transistor is connected to a drain terminal of the second driving thin film transistor;
A drain terminal of the fourth driving thin film transistor is connected to a first voltage / current supply terminal of the thin film Hall effect element;
A gate terminal of the fifth driving thin film transistor is connected to a drain terminal of the third driving thin film transistor;
A source terminal of the fifth driving thin film transistor is connected to a first terminal of the first voltage storage capacitor;
A drain terminal of the fifth driving thin film transistor is connected to a source terminal of the third driving thin film transistor;
A first terminal of the first voltage storage capacitor is connected to the drive potential wiring;
A second terminal of the first voltage storage capacitor is connected to a gate terminal of the fifth driving thin film transistor;
One end of the second connection wiring is connected to a second voltage / current supply terminal of the thin film Hall effect element,
The other end of the second connection wiring is connected to the common potential wiring;
Magnetic field sensor. A plurality of element circuits arranged in a matrix;
Detection control wiring connected to the plurality of element circuits arranged in the matrix row direction;
A first detection output wiring and a second detection output wiring connected to the plurality of element circuits arranged in the matrix column direction;
A drive circuit that is arranged in the matrix column direction in the peripheral region of the element circuit arranged in the matrix and simultaneously drives the thin film Hall effect elements of the plurality of element circuits in the column direction;
A current supply wiring arranged in the peripheral region and connected to the drive circuit, a drive potential wiring, a current source for supplying a drive current to the current supply wiring, and a drive control provided for each drive circuit Wiring, common potential wiring,
With
Each of the element circuits includes the thin film Hall effect element having a first Hall voltage read terminal and a second Hall voltage read terminal, and a read circuit for reading the Hall voltage of the thin film Hall effect element,
Each of the readout circuits includes a first readout thin film transistor and a second readout thin film transistor,
A gate terminal of the first readout thin film transistor is connected to the detection control wiring;
A source terminal of the first readout thin film transistor is connected to the first detection output wiring;
A drain terminal of the first readout thin film transistor is connected to the first hole readout terminal;
A gate terminal of the second readout thin film transistor is connected to the detection control wiring;
A source terminal of the second readout thin film transistor is connected to the second detection output wiring;
A drain terminal of the second readout thin film transistor is connected to the second hole readout terminal;
Each of the driving circuits includes a constant current circuit including a sixth driving thin film transistor, a seventh driving thin film transistor, an eighth driving thin film transistor, a ninth driving thin film transistor, and a second voltage storage capacitor. ,
A gate terminal of the sixth driving thin film transistor is connected to the driving control wiring;
A source terminal of the sixth driving thin film transistor is connected to the current supply wiring;
A drain terminal of the sixth driving thin film transistor is connected to a source terminal of the seventh driving thin film transistor;
A gate terminal of the seventh driving thin film transistor is connected to the driving control wiring;
A source terminal of the seventh driving thin film transistor is connected to a drain terminal of the sixth driving thin film transistor;
A drain terminal of the seventh driving thin film transistor is connected to a gate terminal of the ninth driving thin film transistor;
A gate terminal of the eighth driving thin film transistor is connected to the driving control wiring;
A source terminal of the eighth driving thin film transistor is connected to a drain terminal of the sixth driving thin film transistor;
The drain terminal of the eighth driving thin film transistor is connected to the first voltage / current supply terminal of the thin film Hall effect element in the element circuit in the first row of the same column,
A gate terminal of the ninth driving thin film transistor is connected to a drain terminal of the seventh driving thin film transistor;
A source terminal of the ninth driving thin film transistor is connected to a first terminal of the second voltage storage capacitor;
A drain terminal of the ninth driving thin film transistor is connected to a source terminal of the seventh driving thin film transistor;
A first terminal of the second voltage storage capacitor is connected to the drive potential wiring;
A second terminal of the second voltage storage capacitor is connected to a gate terminal of the ninth driving thin film transistor;
In each element circuit, the thin film Hall effect elements of the element circuits in the same row are connected in series, and the second voltage current supply terminal of the thin film Hall effect element of the element circuit in the last row is connected to the common potential wiring.
Magnetic field sensor. The readout circuit further includes a capacitor,
A first terminal of the capacitor is connected to the first hole readout terminal;
The magnetic field sensor according to claim 1, wherein a second terminal of the capacitor is connected to the second hall readout terminal . The readout circuit further includes a third readout thin film transistor and a fourth readout thin film transistor,
A gate terminal of the third readout thin film transistor is connected to the detection control wiring;
A source terminal of the third readout thin film transistor is connected to the first Hall voltage readout terminal of the thin film Hall effect element;
A drain terminal of the third readout thin film transistor is connected to the first terminal of the capacitor;
A gate terminal of the fourth readout thin film transistor is connected to the detection control wiring;
A source terminal of the fourth readout thin film transistor is connected to the second Hall voltage readout terminal of the thin film Hall effect element;
4. The magnetic field sensor according to claim 3 , wherein a drain terminal of the fourth readout thin film transistor is connected to the second terminal of the capacitor .

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