JP5236110B2 - 高スループットのマクロ分子分析用のナノチャンネル・アレイ並びにその準備および使用 - Google Patents
高スループットのマクロ分子分析用のナノチャンネル・アレイ並びにその準備および使用 Download PDFInfo
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- JP5236110B2 JP5236110B2 JP2012222956A JP2012222956A JP5236110B2 JP 5236110 B2 JP5236110 B2 JP 5236110B2 JP 2012222956 A JP2012222956 A JP 2012222956A JP 2012222956 A JP2012222956 A JP 2012222956A JP 5236110 B2 JP5236110 B2 JP 5236110B2
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Description
本願は、2001年7月25日出願の米国仮特許出願第60/307,666号の優先権を主張する。DARPA付与番号MDA972−00−1−0031により、本文に開示する発明の1部分に至る研究が支援された。したがって、米国政府は、これら発明において一定の権利を有することがある。
本発明は、ナノチャンネル・アレイに関するものである。また、本発明は、ナノチャンネル・アレイを準備する方法に関する。さらにまた、本発明は、ナノチャンネル・アレイを含むナノ流体チップに関する。また、本発明は、マクロ分子の高スループットの分析に適したシステムに関する。さらに、本発明は、ナノチャンネル・アレイを使用することによって少なくとも1つのマクロ分子を分析する方法に関するものである。
本文では、以下の略語を使用する。すなわち、"nm"はナノメートル、"mTorr"はミリTorrである。
NILおよびエッチング後に、シーリング材料の不均一な堆積を提供し、これは、種々の角度にて傾斜させたサンプル・ウエハでのEビーム蒸着により、または大きなソース・ターゲットを使用したスパッタリング堆積によって行った。このステップを使用して、トレンチ幅を減少させるとともにチャンネルをシーリングした。
以下の実施例では、ナノチャンネル・アレイは、スパッタリングによってSiO2シーリング材料をパターニングした基板上に堆積させるプロセスを使って、準備した。チャンネル開口部は、基板を割ることによって準備し、そして走査電子顕微鏡(SEM)によってイメージ化した。その結果は、以下の通りであり、そしてこれは、トレンチ幅が、スパッタリングを使用したシーリング材料の堆積によって狭くなる、ということを示している。
表面であって、この表面の材料内に複数のチャンネルを有し、これらチャンネルが、約150ナノメートル未満のトレンチ幅と、200ナノメートル未満のトレンチ深さを有する、前記の表面と、
前記チャンネルの少なくともいくつかであって、シーリング材料が上に載って、それらチャンネルを少なくとも実質上包囲されるようにした、前記の少なくともいくつかのチャンネルと、
を備える。
Claims (6)
- ナノチャンネル・アレイであって、
表面であって、前記表面の材料内に複数のチャンネルを有し、前記チャンネルはそれぞれ側壁およびチャンネル底部を有し、前記チャンネルは、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さとを有する前記表面を有し、
前記チャンネルの少なくともいくつかはシーリング材料を上に載せ、このシーリング材料は、前記チャンネル側壁の少なくとも一部を覆い、且つ前記載せられたチャンネルを少なくとも部分的に包囲するものである、ナノチャンネル・アレイ。 - ナノチャンネル・アレイを準備する方法であって、
表面を有する基板を提供する工程と、
前記表面の材料に複数のチャンネルを形成する工程であって、前記チャンネルはそれぞれ側壁およびチャンネル底部を有するものである、前記形成する工程と、
前記複数のチャンネル上に載せるためにシーリング材料を前記複数のチャンネル上に堆積する工程であって、これにより、そのようなチャンネルを少なくとも実質上包囲されたものとし、且つ前記チャンネル側壁の少なくとも一部を覆い、前記実質上包囲されたチャンネルが、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さとを有するものである、前記堆積する工程と、
を有するナノチャンネル・アレイを準備する方法。 - ナノ流体チップであって、
a)ナノチャンネル・アレイであって、
表面を有する基板と、
前記表面の材料内の複数の平行なチャンネルであって、前記チャンネルはそれぞれ側壁およびチャンネル底部を有し、前記チャンネルは、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さとを有する、前記チャンネルと、
前記チャンネルの少なくともいくつかであって、シーリング材料を上に載せるものであり、このシーリング材料は、前記チャンネル側壁の少なくとも一部を覆い、且つ前記載せられたチャンネルを少なくとも部分的に包囲するものである、前記少なくともいくつかのチャンネルと、
流体を受け入れることができる前記少なくともいくつかのチャンネルと、
を有する前記ナノチャンネル・アレイと、
b)前記チャンネルの少なくとも1つと流体連通する少なくとも1つの試料容器であって、前記試料容器は流体を放出することができるものである、前記少なくとも1つの試料容器と、
c)前記チャンネルの少なくとも1つと流体連通する少なくとも1つの廃棄物容器であって、前記廃棄物容器は流体を受け入れることができるものである、前記少なくとも1つの廃棄物容器と、
を有するナノ流体チップ。 - システムであって、
A)ナノ流体チップであって、
a)ナノチャンネル・アレイであって、
表面を有する基板と、
前記表面の材料内の複数の平行なチャンネルであって、前記チャンネルはそれぞれ側壁およびチャンネル底部を有し、前記チャンネルは、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さとを有する、前記チャンネルと、
前記チャンネル側壁の少なくとも一部と隣接するシーリング材料を有する、少なくともいくつかの前記チャンネルと、
前記チャンネルの少なくとも1つであって、シーリング材料を上に載せ、これによりそれらのチャンネルを少なくとも実質上包囲するものである、前記少なくとも1つのチャンネルと、
流体を受け入れることができる前記チャンネルの少なくとも1つと、
を有する、前記ナノチャンネル・アレイと、
b)前記チャンネルの少なくとも1つと流体連通する少なくとも1つの試料容器であって、前記試料容器は流体を放出することができるものである、前記少なくとも1つの試料容器と、
を有する前記ナノ流体チップと、
B)前記ナノチャンネル・アレイ内の前記少なくとも1つの流体から送られる少なくとも1つの信号を検出する装置と、
を有する、システム。 - 少なくとも1つのマクロ分子を分析する方法であって、
ナノ流体チップを提供する工程であって、前記ナノ流体チップが、
a)ナノチャンネル・アレイであって、
表面であって、前記表面の材料内に複数の平行なチャンネルを有し、前記チャンネルはそれぞれ側壁およびチャンネル底部を有し、前記チャンネルが、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さとを有する、前記表面と、
前記チャンネルの少なくとも1つであって、シーリング材料を上に載せるものであり、このシーリング材料は、前記チャンネル側壁の少なくとも一部を覆い、且つ前記載せられたチャンネルを少なくとも部分的に包囲するものである、前記少なくとも1つのチャンネルと、
流体を受け入れることができる前記チャンネルの少なくとも1つと、
を有する前記ナノチャンネル・アレイと、
b)前記チャンネルの少なくとも1つと流体連通する少なくとも1つの試料容器であって、前記試料容器は少なくとも1つのマクロ分子を含む流体を放出することができる、前記少なくとも1つの試料容器と、
を有する、前記ナノ流体チップを提供する工程と、
前記少なくとも1つの試料容器に少なくとも1つの流体を提供する工程であって、前記流体が少なくとも1つのマクロ分子を有する、前記提供する工程と、
前記少なくとも1つのマクロ分子を前記少なくとも1つのチャンネルに移送する工程であって、これにより前記少なくとも1つのマクロ分子を長くするものである、前期移送する工程と、
前記少なくとも1つの長くしたマクロ分子から送られる少なくとも1つの信号を検出する工程と、
前記検出した信号を、前記少なくとも1つのマクロ分子の少なくとも1つの特性に相関させる工程と、
を有する方法。 - 少なくとも1つのナノ流体チップを含むカートリッジであって、前記カートリッジはマクロ分子分析を実施するためのシステムに挿入および除去することができ、前記少なくとも1つのナノ流体チップが、少なくとも1つのナノチャンネル・アレイを有し、
前記ナノチャンネル・アレイが、
表面であって、前記表面の材料内に複数のチャンネルを有し、前記チャンネルはそれぞれ側壁およびチャンネル底部を有し、前記チャンネルは、約150ナノメートル未満の前記側壁間のトレンチ幅と、200ナノメートル未満の前記チャンネル底部に対するトレンチ深さを有する、前記表面と、
前記チャンネルの少なくともいくつかであって、シーリング材料を上に載せるものであり、このシーリング材料は、前記チャンネル側壁の少なくとも一部を覆い、且つ前記載せられたチャンネルを少なくとも部分的に実質上包囲するものである、前記少なくともいくつかのチャンネルと、
を有するカートリッジ。
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EP1417474A2 (en) | 2004-05-12 |
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EP1417474B1 (en) | 2021-12-29 |
IL159865A0 (en) | 2004-06-20 |
US9389217B2 (en) | 2016-07-12 |
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