JP5200209B2 - Liquid crystal display - Google Patents

Description

  The present invention relates to a liquid crystal display device.

  Conventionally, various liquid crystal display devices are known (see, for example, Patent Document 1). In Patent Document 1, one frame forming one color image is composed of three consecutive subframes displaying three unit color images of red (R), green (G), and blue (B). A liquid crystal display device that performs configured field sequential driving is disclosed. In such a field sequential drive liquid crystal display device, in each subframe, writing of unit-color image data to pixels and light emission of a light source corresponding to the unit color are sequentially performed, thereby red, A color image can be displayed when the images of the unit colors of green and blue appear to overlap.

JP 2002-211702 A

  However, in the liquid crystal display device described in Patent Document 1, image data cannot be written to a pixel while image data is written to the pixel and an image is displayed. For this reason, when the response time of the liquid crystal or the light emission time of the light source becomes long, it becomes difficult to perform field sequential driving or impulse driving with a relatively short display time of an image of one subframe or frame. There is.

  The present invention has been made to solve the above-described problems, and one object of the present invention is to provide field sequential driving even when the liquid crystal response and the light emission time of the light source are relatively long. A liquid crystal display device capable of performing impulse driving is provided.

Means for Solving the Problems and Effects of the Invention

A liquid crystal display device according to one aspect of the present invention corresponds to a signal line, a first gate line and a second gate line intersecting with the signal line, and an intersection between the signal line and the first gate line and the second gate line. A first transistor having a signal line connected to one of a source and a drain and a gate connected to a first gate line; A signal storage capacitor having one electrode connected to the other of the source and drain of the first transistor, one of the source and drain connected to one electrode of the signal storage capacitor, and a gate connected to the second gate line. A pixel signal storage including a second transistor and a display pixel capacitor having one electrode connected to the other of the source and drain of the second transistor After the charge corresponding to the image signal is written in the quantity, the charge written in the signal storage capacitor is moved to the display pixel capacitor, and the liquid crystal contained in the pixel is charged by the charge accumulated in the display pixel capacitor. The charge corresponding to the image signal is written in the signal storage capacity between the response period and the period when the backlight is lit for a certain period of time after the response of the liquid crystal and before the backlight is turned off. The capacitance value of the signal storage capacitor is configured such that one electrode is connected to the other of the source and the drain of the second transistor and is larger than the capacitance value of the capacitor including the display pixel capacitor. Yes.

In the liquid crystal display device according to the one aspect, as described above, the pixel includes the signal storage capacity and the display pixel capacity, so that the image signal of the frame or sub-frame to be displayed is written to the display pixel capacity and displayed. In parallel, the image signal of the next frame or subframe to be displayed can be written in the signal storage capacity, so that the period of one frame or one subframe can be shortened. Thereby, even when the response of the liquid crystal or the light emission time of the light source becomes relatively long, the field sequential driving and the impulse driving can be performed.
In addition, the capacitance value of the signal storage capacitor is configured such that one electrode is connected to the other of the source and the drain of the second transistor, and is more than twice the capacitance value of the capacitor including the display pixel capacitor.

In addition , after the charge corresponding to the image signal is written in the signal storage capacity of the pixel, the charge written in the signal storage capacity is moved to the display pixel capacity. With this configuration, after the charge corresponding to the image signal written to the signal storage capacity is moved to the display pixel capacity, the image signal of the next frame or subframe to be displayed can be easily written to the signal storage capacity. Can do.

Moreover, further comprising a backlight as a light source, a period in which the liquid crystal responds included in the pixel by the charge stored in the display pixel capacitor, after liquid crystal response, to a period in which backlighting certain time, A charge corresponding to the image signal is written in the signal storage capacity. With this configuration, it is easy to write and display the image signal of the currently displayed frame or subframe to the display pixel capacity and to write the image signal of the next frame or subframe to the signal storage capacity. Since the steps can be performed in parallel, the period of one frame or one subframe can be easily shortened.

  In this case, preferably, the backlight is configured by a light emitting diode element. With this configuration, the space required for the arrangement is reduced as compared with the case where a fluorescent lamp is used for the backlight, so that the apparatus main body can be reduced in size accordingly.

  In the liquid crystal display device including the backlight, preferably, the backlight is configured by three light emitting diode elements corresponding to red, green, and blue, and the backlight is driven by field sequential driving that sequentially lights up for each color. It is configured to be controlled. With this configuration, pixels corresponding to each of RGB are not necessary, and the number of pixels can be reduced to 1/3.

  In the liquid crystal display device including the backlight, the backlight is preferably configured to be controlled by impulse driving that blinks at predetermined time intervals when displaying an image. If comprised in this way, it can suppress that an afterimage remains in a retina, Therefore The display performance of a moving image can be improved.

  In the liquid crystal display device according to the above aspect, the voltage applied to the signal line is preferably corrected based on the signal voltage of the image of the immediately preceding frame or subframe applied to the display pixel capacitor. Has been. With this configuration, even when the signal voltage of the image of the frame or subframe immediately before being applied to the display pixel capacitor affects the signal voltage of the image of the next frame or subframe to be displayed, the signal line Since the applied voltage can be corrected, an appropriate image can be displayed.

  The liquid crystal display device according to the above aspect preferably further includes a third transistor that has one of the source and the drain connected to one electrode of the display pixel capacitor and resets the charge accumulated in the display pixel capacitor. With this configuration, the charge accumulated in the display pixel capacitor can be discharged by the third transistor, so that the image signal of the image displayed immediately before affects the image signal of the image to be displayed next. Can be suppressed.

  In the liquid crystal display device according to the above aspect, it is preferable that the capacity value of the signal storage capacity is larger than the capacity value of the display pixel capacity. With this configuration, for example, by setting the capacitance value of the signal storage capacitance to twice the capacitance value of the display pixel capacitance, the influence of the image signal displayed immediately before being stored in the display pixel capacitance is increased. Therefore, it is possible to suppress an increase in the amount of correction of the voltage applied to the signal line.

  In the liquid crystal display device according to the above aspect, the liquid crystal included in the pixel is preferably configured to have a bend alignment in which constituent molecules of the liquid crystal are arranged in a bow shape after applying a voltage that causes phase transition of the liquid crystal. Yes. With this configuration, the change in the orientation of the liquid crystal molecules is accelerated by the bending of the bow, so that a liquid crystal display device with a high response speed can be configured.

  In the liquid crystal display device according to the above aspect, the other electrode of the signal storage capacitor and the other electrode of the display pixel capacitor are preferably configured to have the same potential. With this configuration, when the charge accumulated in the signal storage capacitor is moved to the display pixel capacitor, the potential before the movement and the potential after the movement can be made the same. As a result, the change of the image signal can be suppressed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a block diagram showing the overall configuration of the liquid crystal display device according to the first embodiment of the present invention. FIG. 2 is a diagram illustrating a configuration of a pixel according to the first embodiment of the present invention. First, the configuration of the liquid crystal display device 100 according to the first embodiment will be described with reference to FIGS. 1 and 2. In the first embodiment, a case where the present invention is applied to a field sequential liquid crystal display device 100 which is an example of a liquid crystal display device will be described.

  As shown in FIG. 1, the field sequential liquid crystal display device 100 according to the first embodiment includes a driver IC 1 and a liquid crystal module 2. Details will be described below.

As shown in FIG. 1, the driver IC 1 includes a field memory 11, a first latch (memory) 12, a second latch (memory) 13, a digital analog converter (DAC) 14, a timing controller (TC) 15, and a DC / DC converter. (DC / DC) 16, V _COM driver 17 and DSD (drain storage data) driver 18.

  The field memory 11 is configured to receive an RGB parallel signal and has a function of converting the RGB parallel signal into an RGB serial signal. Here, in the first embodiment, the field memory 11 has a function of correcting a signal voltage of an image applied to a signal line 31 described later. The field memory 11 is connected to the first latch 12, and the RGB serial signal output from the field memory 11 passes through the first latch 12, the second latch 13, and the digital / analog converter 14 to be described later. It is configured to be input to the switch 24.

The timing controller 15 is configured to receive a vertical synchronization signal V _SYNC , a horizontal synchronization signal H _SYNC and a clock signal D _CLK . The timing controller 15 is connected to a signal line switch 22, a V driver 23, and an H shift register 25, which will be described later.

Further, the DC / DC converter 16, + with 5V supply is connected, and is configured to output a positive potential _{V DD} of the lower voltage _{V BB} and + 6.5V for -4 V. The DC / DC converter 16 is connected to a V _COM driver 17 and a DSD driver 18. The V _COM driver 17 has a function of generating a potential of the common electrode V _COM . The DSD driver 18 has a function of generating a DSD (drain storage data) signal and is connected to the signal line switch 22.

  As shown in FIG. 1, the liquid crystal module 2 includes a liquid crystal panel 21, a signal line switch 22, a V driver 23, an H switch 24, an H shift register 25, and a backlight 26.

The signal line switch 22 is connected to the liquid crystal panel 21 and has a function of precharging a signal line 31 described later and a function of shorting the common electrode _VCOM and the signal line 31. The signal line switch 22 is connected to the timing controller 15 and is configured to receive the drain storage gate signal DSG from the timing controller 15.

  The V driver 23 is connected to the liquid crystal panel 21 and is connected to the gates of transistors 35 and 37 described later. The V driver 23 is connected to the timing controller 15 and is configured to receive the start signal STV and the clock signal CKV from the timing controller 15.

  The H switch 24 is connected to the liquid crystal panel 21 and is connected to a signal line 31 described later. The H switch 24 is connected to the digital / analog converter 14.

  The H shift register 25 is connected to the H switch 24 and to the timing controller 15, and is configured to receive the start signal STH and the clock signal CKH from the timing controller 15.

  Here, in the first embodiment, the backlight 26 is configured by three light emitting diode elements corresponding to RGB.

  As shown in FIG. 2, in the liquid crystal panel 21, the signal line 31, the gate line 32 and the gate line 33 intersecting with the signal line 31, and the signal line 31 and the gate line 32 and gate line 33 intersect. And a pixel 34 including a liquid crystal 39 to be described later. The gate lines 32 and 33 are examples of the “first gate line” and the “second gate line” in the present invention, respectively.

  Here, in the first embodiment, the pixel 34 includes a transistor 35 having the signal line 31 connected to one of the source and the drain and a gate connected to the gate line 32 and the other of the source and the drain of the transistor 35. On the other hand, the signal storage capacitor 36 to which the electrode 36 a is connected, the transistor 37 having one of the source and drain connected to the one electrode 36 a of the signal storage capacitor 36 and the gate connected to the gate line 33, and the source of the transistor 37 And a liquid crystal 39 having a display pixel capacitor 38 having one electrode 38a connected to the other of the drain and the drain. The transistors 35 and 37 are examples of the “first transistor” and the “second transistor” in the present invention, respectively. The transistors 35 and 37 are constituted by a low temperature polysilicon TFT (Thin Film Transistor) formed at a relatively low temperature of about 600 ° C. or less.

In the first embodiment, the capacity of the signal storage capacitor 36 is configured to be 2 to 5 times the capacity of the display pixel capacitor 38. In the first embodiment, and the other electrode 36b of the signal storage capacitor 36, the other electrode 38b of the display pixel capacitor 38 is connected to the common electrode _{V COM.}

  In the first embodiment, the liquid crystal 39 has a bend alignment in which constituent molecules are arranged in a bow shape after applying a voltage for causing phase transition of the liquid crystal 39. Further, the thickness (cell gap) of the liquid crystal 39 is about 3.8 μm, and the anisotropy of the refractive index of the liquid crystal 39 is about 0.2. The rubbing direction is parallel rubbing in which the rubbing direction is the same between the upper and lower substrates. The liquid crystal 39 is in a normally white mode in which the display turns white when an off voltage is applied. The minimum transmittance voltage is set to 6V.

  In the first embodiment, the driving of the liquid crystal 39 is field sequential driving in which one frame is 120 Hz. The response speed of the liquid crystal 39 is about 0.1 msec when changing from white to black, and is also about 0.1 msec when changing from white to a gradation other than white. Further, the change from black to white is about 1 msec, which is the slowest response time between gradations. The writing time of the image signal to the liquid crystal 39 is about 2 msec.

  FIG. 3 is a diagram for explaining the operation of the liquid crystal display device according to the first embodiment of the present invention. Next, the operation of the liquid crystal display device 100 according to the first embodiment of the present invention will be described with reference to FIGS.

  First, as shown in FIG. 1, RGB parallel signals are input to the field memory 11. In the field memory 11, the RGB parallel signal is converted into an RGB serial signal, and a signal input to the field memory 11 described later is corrected. Next, the RGB serial signal output from the field memory 11 is input to the H switch 24 via the first latch 12, the second latch 13 and the digital analog converter 14.

Further, the timing controller 15 receives the vertical synchronization signal V _SYNC , the horizontal synchronization signal H _SYNC and the clock signal D _CLK . The timing controller 15 outputs a start signal STH and a clock signal CKH to the H shift register 25 and outputs a start signal STV and a clock signal CKV to the V driver 23. Further, the timing controller 15 outputs the drain storage gate signal DSG to the signal line switch 22.

Further, the DC / DC converter 16 is applied with a voltage of +5 V from the power supply, and generates a negative potential V _{BB of} −4 V and a positive potential V _DD of +6.5 V.

The V _COM driver 17 generates the potential of the common electrode V _COM from the voltage supplied from the DC / DC converter 16, and the DSD driver 18 generates a DSD signal. The DSD signal is supplied to the signal line switch 22. The signal line switch 22 precharges the signal line 31 and shorts the common electrode _VCOM and the signal line 31 based on the DSD signal and the DSG signal.

  Next, in the red (R) subframe (see FIG. 3), the pixel 34 is selected by the V driver 23 and the H shift register 25, whereby the gate line 32 is scanned and the transistor 35 is turned on. It becomes. As a result, as shown in FIG. 2, the charge corresponding to the red (R) image signal is written from the signal line 31 to the signal storage capacitor 36. As shown in FIG. 3, the writing time is about 2.5 msec.

  Here, in the first embodiment, after charges corresponding to the image signal are written in all the pixels 34, the gate line 33 is scanned and the transistor 37 is turned on, so that the signal storage capacitor 36 is turned on. The written charges are moved to the display pixel capacitor 38 all at once. The time required for this movement is about 0.1 msec. Thereafter, after about 1 msec of response time of the liquid crystal 39, the red (R) backlight 26 is turned on for about 1.7 msec.

  Here, in the first embodiment, the gate line 32 is scanned and the transistor 35 is turned on in parallel with the response time of the liquid crystal 39 and the time when the red (R) backlight 26 is turned on. Thus, the charge corresponding to the green (G) image signal is written from the signal line 31 to the signal storage capacitor 36. Thereafter, the charge corresponding to the green (G) image signal written in the signal storage capacitor 36 is moved to the display pixel capacitor 38, the response time of the liquid crystal 39, and the green (G) backlight 26 is turned on. In parallel with this, a charge corresponding to the blue (B) image signal is written from the signal line 31 to the signal storage capacitor 36. Thereby, field sequential driving is performed.

  Next, the image signal correction operation according to the first embodiment of the present invention will be described with reference to FIGS.

As shown in FIG. 2, the pixel 34, the signal storage capacitor 36 and the display pixel capacitor 38 and contains, respectively, and a capacitor C ₁ and the capacitance C _LC. The display pixel capacitor 38 stores electric charges corresponding to the signal voltage of, for example, a blue (B) image currently displayed, and the signal storage capacitor 36 displays red (R) to be displayed next. ) Is stored corresponding to the image signal voltage. In this state, the charge amount relationship in the pixel 34 is expressed by the equation (1).

(C ₁ + C _LC ) V _RN = C ₁ V _RN1 + C _LC V _BN (1)
Here, V _RN and V _BN are signal voltages of red (R) and blue (B) images before correction of the Nth subframe, respectively. V _RN1 is the signal voltage of the red (R) image after the correction of the Nth subframe. Here, in the first embodiment, the signal voltage is corrected in the field memory 11 so that the formula (1) is modified and the relationship of the formula (2) is satisfied.

V _RN1 = ((C ₁ + C _LC ) V _RN −C _LC V _BN ) / C ₁ (2)
Further, the signal voltages of the green (G) and blue (B) images are also corrected so as to satisfy the expressions (3) and (4), respectively.

V _GN1 = ((C ₁ + C _LC ) V _GN −C _LC V _RN ) / C ₁ (3)
_{V BN1 = ((C 1 +} C LC) V BN -C LC V GN) / C 1 ····· (4)

  In the first embodiment, as described above, the pixel 34 includes the signal storage capacitor 36 and the display pixel capacitor 38, so that the image signal of the currently displayed subframe is written and displayed in the display pixel capacitor 38. In parallel, since the image signal of the next subframe to be displayed can be written in the signal storage capacity 36, the period of one subframe can be shortened. Thereby, even when the response of the liquid crystal 39 and the light emission time of the backlight 26 become relatively long, the field sequential drive can be performed.

  In the first embodiment, as described above, after the charge corresponding to the image signal is written in the signal storage capacitor 36 of the pixel 34, the charge written in the signal storage capacitor 36 is moved to the display pixel capacitor 38. By configuring, after the charge corresponding to the image signal written in the signal storage capacitor 36 is moved to the display pixel capacitor 38, the image signal of the next subframe to be displayed can be easily written in the signal storage capacitor 36. it can.

  Further, in the first embodiment, as described above, the backlight 26 as the light source is further provided, the period in which the liquid crystal 39 included in the pixel 34 responds by the electric charge accumulated in the display pixel capacitor 38, and the response of the liquid crystal 39. Thereafter, the display pixel capacity 38 of the image signal of the sub-frame currently displayed is configured by writing the charge corresponding to the image signal in the signal storage capacity 36 during the period when the backlight 26 is lit for a certain time. Since the writing and display to the signal storage and the writing of the image signal of the subframe to be displayed next to the signal storage capacity 36 can be easily performed in parallel, the period of one subframe can be easily shortened. it can.

  In the first embodiment, as described above, the backlight 26 includes three light emitting diode elements corresponding to red, green, and blue, and the backlight 26 is sequentially turned on for each color. By configuring so as to be controlled by driving, pixels corresponding to each of RGB are not necessary, so the number of pixels can be reduced to 1/3.

  In the first embodiment, as described above, the voltage applied to the signal line 31 is corrected based on the signal voltage of the image of the immediately preceding subframe applied to the display pixel capacitor 38. Thus, even when the signal voltage of the image of the immediately preceding subframe applied to the display pixel capacitor 38 affects the signal voltage of the image of the next subframe to be displayed, the voltage applied to the signal line 31 is changed. Since it can correct | amend, an appropriate image can be displayed.

  In the first embodiment, as described above, the image displayed immediately before being accumulated in the display pixel capacitor 38 is obtained by setting the capacitance value of the signal storage capacitor 36 to twice the capacitance value of the display pixel capacitor 38. As a result, it is possible to suppress an increase in the amount of correction of the voltage applied to the signal line 31.

  In the first embodiment, as described above, the liquid crystal 39 included in the pixel 34 is configured to have a bend alignment in which constituent molecules of the liquid crystal 39 are arranged in a bow shape after applying a voltage for phase transition. As a result, the change in the alignment of the liquid crystal molecules is accelerated by the bending of the bow, so that the liquid crystal display device 100 having a high response speed can be configured.

In the first embodiment, as described above, and the other electrode 36b of the signal storage capacitor 36, and the other electrode 38b of the display pixel capacitor 38, by connecting the common electrode V _COM, accumulated in the signal storage capacitance 36 When the electric charge to be moved is moved to the display pixel capacitor 38, the electric potential before the movement and the electric potential after the movement can be made the same, so that the change of the image signal due to the movement of the electric charge is suppressed. Can do.

(Second Embodiment)
FIG. 4 is a diagram for explaining the operation of the liquid crystal display device according to the second embodiment of the present invention. Next, referring to FIG. 4, in the second embodiment, unlike the first embodiment, a case where the present invention is applied to an impulse-driven liquid crystal display device 101 will be described.

  In the liquid crystal 39 according to the second embodiment, the thickness is about 6 μm and the anisotropy of the refractive index is about 0.15. The rubbing direction is parallel rubbing in which the rubbing direction is the same between the upper and lower substrates. The liquid crystal 39 is in a normally white mode in which the display turns white when an off voltage is applied. The minimum transmittance voltage is set to 6V.

  Here, in the second embodiment, driving of the liquid crystal 39 is impulse driving. Note that the impulse drive is a drive method for controlling the image not to be displayed until the image is switched to the next frame after the image is displayed in a very short period within the frame. The response speed of the liquid crystal 39 is about 0.2 msec when changing from white to black, and about 0.2 msec when changing from white to a gradation other than white. In the case of changing from black to white, it is about 2 msec. The writing time of the image signal to the liquid crystal 39 is about 1 msec.

  In addition, the other structure of the liquid crystal display device 101 by 2nd Embodiment is the same as that of the said 1st Embodiment.

  Next, the operation of the liquid crystal display device 101 according to the second embodiment of the present invention will be described with reference to FIGS.

  First, when the pixel 34 is selected by the V driver 23 and the H shift register 25 shown in FIG. 1, the gate line 32 shown in FIG. 2 is scanned and the transistor 35 is turned on. As a result, charges corresponding to the image signal are written from the signal line 31 to the signal storage capacitor 36. As shown in FIG. 4, the writing time is about 7 msec.

  Here, in the second embodiment, after charges corresponding to the image signal are written in all the pixels 34, the gate line 33 is scanned, and the transistor 37 is turned on, so that the signal storage capacitor 36 is filled. The written charges are moved to the display pixel capacitor 38 all at once. The time required for this movement is about 1 msec. Thereafter, after about 2 msec of response time of the liquid crystal 39, the backlight 26 is turned on for about 5.3 msec.

  In the second embodiment, the gate line 32 is scanned in parallel with the response time of the liquid crystal 39 and the time when the backlight 26 is turned on, and the transistor 35 is turned on. Then, a charge corresponding to the image signal displayed in the next frame is written from the signal line 31. Further, the backlight 26 is turned on, and after a predetermined time has elapsed, the backlight 26 is turned off for a certain time. Thereby, impulse driving is performed.

  Note that the image signal correction operation of the liquid crystal display device 101 according to the second embodiment is the same as that of the first embodiment.

  In the second embodiment, as described above, the backlight 26 is configured to be controlled by the impulse drive that blinks at a predetermined time interval when displaying an image, thereby suppressing an afterimage from remaining on the retina. Therefore, the display performance of moving images can be improved.

  The remaining effects of the liquid crystal display device 101 according to the second embodiment are similar to those of the aforementioned first embodiment.

(Third embodiment)
FIG. 5 is a diagram illustrating a pixel configuration of a liquid crystal display device according to a third embodiment of the present invention. Next, referring to FIG. 5, in the third embodiment, unlike the first embodiment, the liquid crystal display device 102 in which a transistor 41 for resetting the electric charge accumulated in the display pixel capacitor 38 is provided. Will be described.

In the pixel 34a according to the third embodiment, as shown in FIG. 5, the gate is connected to the gate line 40, one of the source and the drain is connected to one electrode 38a of the display pixel capacitor 38, and the common electrode V _COM and the other of the source and drain connected to, the transistor 41 having the function of resetting the charge accumulated in the display pixel capacitor 38 is provided. The transistor 41 is an example of the “third transistor” in the present invention.

  The remaining configuration of the liquid crystal display device 102 according to the third embodiment is similar to that of the aforementioned first embodiment.

  In the third embodiment, as described above, one of the source and the drain is connected to the one electrode 38a of the display pixel capacitor 38, and the transistor 41 for resetting the charge accumulated in the display pixel capacitor 38 is provided. Since the charge accumulated in the display pixel capacitor 38 can be discharged by the transistor 41, the influence of the image signal of the image displayed immediately before on the image signal of the next displayed image can be suppressed. .

  The remaining effects of the liquid crystal display device 102 according to the third embodiment are similar to those of the aforementioned first embodiment.

(Fourth embodiment)
FIG. 6 is a diagram showing a pixel configuration of the liquid crystal display device according to the fourth embodiment of the present invention. Next, with reference to FIG. 6, in the fourth embodiment, a liquid crystal display device 103 provided with an auxiliary capacitor 42 will be described, unlike the first embodiment.

  In the pixel 34b according to the fourth embodiment, as shown in FIG. 6, one electrode 38a of the display pixel capacitor 38 and one electrode 42a of the auxiliary capacitor 42 are connected to the other of the source and drain of the transistor 37. Has been. Thereby, even when the capacity of the display pixel capacitor 38 is not sufficient, the auxiliary capacitor 42 can store charges corresponding to the signal voltage of the image in the pixel 34b.

  The remaining structure of the liquid crystal display device 103 according to the fourth embodiment is similar to that of the aforementioned first embodiment.

  The remaining effects of the liquid crystal display device 103 according to the fourth embodiment are similar to those of the aforementioned first embodiment.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes all modifications within the meaning and scope equivalent to the scope of claims for patent.

  For example, in the first to fourth embodiments, an example in which a light emitting diode element (LED) is used as a light source for backlight has been described. However, the present invention is not limited to this, and a light source for backlight other than LED is used. May be used.

In the first to fourth embodiments, an example for connecting the other electrode 38b of the other electrode 36b and the display pixel capacitor 38 of the signal storage capacitor 36 to the common electrode V _COM, the present invention will now not limited to, if the potential is the same, may be connected to the other electrode 38b of the other electrode 36b and the display pixel capacitor 38 of the signal storage capacitor 36 to the electrodes other than the common electrode V _COM.

1 is a block diagram illustrating an overall configuration of a liquid crystal display device according to a first embodiment of the present invention. It is a figure which shows the structure of the pixel by 1st Embodiment of this invention. It is a figure for demonstrating operation | movement of the liquid crystal display device by 1st Embodiment of this invention. It is a figure for demonstrating operation | movement of the liquid crystal display device by 2nd Embodiment of this invention. It is a figure which shows the structure of the pixel of the liquid crystal display device by 3rd Embodiment of this invention. It is a figure which shows the structure of the pixel of the liquid crystal display device by 4th Embodiment of this invention.

Explanation of symbols

26 Backlight 31 Signal line 32 Gate line (first gate line)
33 Gate line (second gate line)
34, 34a, 34b Pixel 35 Transistor (first transistor)
36 Signal storage capacity 36a One electrode 36b The other electrode 37 Transistor (second transistor)
38 Display pixel capacity 38a One electrode 38b The other electrode 39 Liquid crystal 41 Transistor (third transistor)

Claims (10)

A signal line,
A first gate line and a second gate line intersecting the signal line;
A pixel including a liquid crystal disposed corresponding to an intersection of the signal line and the first gate line and the second gate line;
With a backlight as a light source,
In the pixel, the signal line is connected to one of a source and a drain, a first transistor having a gate connected to the first gate line, and one electrode connected to the other of the source and the drain of the first transistor. A signal storage capacitor, a second transistor having one of a source and a drain connected to one electrode of the signal storage capacitor and a gate connected to the second gate line, and a source and a drain of the second transistor A display pixel capacitor to which one electrode is connected to the other,
After the charge corresponding to the image signal is written to the signal storage capacity of the pixel, the charge written to the signal storage capacity is moved to the display pixel capacity,
The backlight is turned on between a period in which the liquid crystal contained in the pixel responds due to the electric charge accumulated in the display pixel capacitor and a period in which the backlight is lit for a certain time after the response of the liquid crystal. Is configured so that charges corresponding to the image signal are written into the signal storage capacity before
The capacitance value of the signal storage capacitor is configured such that one electrode is connected to the other of the source and the drain of the second transistor and is larger than the capacitance value of the capacitor including the display pixel capacitor. .   The capacitance value of the signal storage capacitor is configured such that one electrode is connected to the other of the source and the drain of the second transistor, and is more than twice the capacitance value of the capacitor including the display pixel capacitor. The liquid crystal display device according to claim 1.   The liquid crystal display device according to claim 1, wherein the backlight includes a light emitting diode element.   The backlight is configured by three light emitting diode elements corresponding to red, green, and blue, and the backlight is configured to be controlled by field sequential driving that lights in order for each color. Item 4. A liquid crystal display device according to item 3.   The liquid crystal display device according to claim 3, wherein the backlight is configured to be controlled by impulse driving that blinks at a predetermined time interval when displaying an image.   The voltage applied to the signal line is corrected based on the signal voltage of the image of the immediately preceding frame or subframe applied to the display pixel capacitor. 2. A liquid crystal display device according to item 1.   6. The device according to claim 1, further comprising: a third transistor having one of a source and a drain connected to one electrode of the display pixel capacitor and resetting a charge accumulated in the display pixel capacitor. Liquid crystal display device.   The liquid crystal display device according to claim 1, wherein a capacity value of the signal storage capacity is configured to be larger than a capacity value of the display pixel capacity.   9. The liquid crystal included in the pixel is configured to have a bend alignment in which constituent molecules of the liquid crystal are arranged in a bow shape after applying a voltage that causes phase transition of the liquid crystal. 2. A liquid crystal display device according to item 1.   The liquid crystal display device according to claim 1, wherein the other electrode of the signal storage capacitor and the other electrode of the display pixel capacitor are configured to have the same potential.

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