JP5078631B2 - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a desired structure without separating semiconductor chips by reducing a load on the semiconductor chips and a sealing resin, in a semiconductor device of a double-sided mounting structure where a plurality of semiconductor chips are arranged and jointed on/to both sides of a circuit board. <P>SOLUTION: In a region where a semiconductor chip 31 mounted on the upper surface of the circuit board overlaps a semiconductor chip 32 mounted on the undersurface thereof, a recessed part 21 (or a projecting part 22) is formed on a surface of the circuit board. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor chip double-sided mounting structure in which a plurality of semiconductor chips are arranged and bonded on both sides of a circuit board.

  In general, the IC chip is encapsulated in a package such as plastic and mounted on a circuit board. Recently, bare chip mounting has been used that can significantly reduce the mounting area compared to mounting of such a semiconductor package.

There are the following three types of bare chip mounting that is mounted on a circuit board in the state of an IC chip.
(1) Wire bonding the electrode on the chip and the electrode on the circuit board (2) Connect the electrode on the chip and the electrode on the circuit board with a film having lead wires (3) Face down the IC chip directly to the circuit board In the third flip chip, the circuit formation surface of the semiconductor substrate is opposed to the circuit formation surface of the circuit board, and the conductive state is achieved by superimposing via a bump formed of a metal such as gold. Compared with face-up mounting, where the circuit formation surface of the circuit board and the surface opposite to the circuit formation surface of the semiconductor chip are opposed to each other and the fine metal wires are drawn by wire bonding, as in the case of the first wire bonding. Therefore, it can be miniaturized and is widely used.

In recent years, in order to achieve high functionality, even when a double-sided mounting structure in which semiconductor chips are mounted on both sides of a circuit board is adopted, there is a method for connecting a bare chip and a circuit board by face-down mounting in order to achieve downsizing. It has been taken.
JP 200423045 A

  In a semiconductor double-sided mounting structure, in order to have a plurality of functions, semiconductor chips mounted on both sides of a circuit board are not necessarily the same, and the thickness and size of the chip are often different. In addition, when mounting together with passive components to form one module, the semiconductor chips 31 and 32 are not symmetrical with respect to the circuit board 2 as shown in FIG. May be arranged. 51 and 52 are bumps, and 41 is a sealing adhesive resin.

  In general, the thermal expansion coefficients of the semiconductor chips 31 and 32 are extremely small compared to the thermal expansion coefficients of the sealing adhesive resin 41 used for bonding to the circuit board 2 and the circuit board 2 itself, and semiconductor chips of different sizes are shifted and arranged. In this case, since the warp tendency is different between the upper and lower sides of the circuit board 2, the entire circuit board 2 as shown in FIG. Greatly warps. Due to the deviation, the entire circuit board 2 becomes wavy. At this time, the warping of one semiconductor chip 32 causes the sealing adhesive resin 41 of the other semiconductor chip 31 facing the outer peripheral portion of the semiconductor chip to be pulled, and peeling occurs between the semiconductor chip and the circuit formation surface. It is considered that the electrical performance is adversely affected.

  The present invention has been made to solve the above-described problems of the prior art. In a double-sided mounting structure of a semiconductor chip in which a plurality of semiconductor chips are arranged and bonded on both sides of a circuit board, the chip and the sealing resin are provided. An object of the present invention is to realize a desired structure without reducing the load on the semiconductor chip and without placing restrictions on the placement of the semiconductor chip.

According to a first aspect of the present invention, there is provided a semiconductor device including a circuit board and a rectangular parallelepiped first semiconductor mounted on a first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin. A semiconductor device comprising a chip and a second semiconductor chip that is mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin, as viewed from the upper surface of the circuit board In this case, the first and second semiconductor chips have overlapping portions and their gravity centers are shifted from each other, include the overlapping portions, and are formed on the first surface in a region between the plurality of first bumps. It has a formed recess, and the recess is filled with the sealing adhesive resin.
According to a second aspect of the present invention, there is provided a semiconductor device comprising: a circuit board; a rectangular parallelepiped which is mounted on a first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin. A semiconductor device comprising: a semiconductor chip; and a second rectangular semiconductor chip mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin, from the upper surface of the circuit board When viewed, the first and second semiconductor chips have overlapping portions and the positions of their centers of gravity are shifted from each other, include the overlapping portions, and the first region in the region between the plurality of first bumps. It has a convex part formed on the surface and having a higher elastic modulus than the sealing adhesive resin .

According to a third aspect of the present invention, there is provided a semiconductor device including a circuit board and a rectangular parallelepiped first semiconductor mounted on the first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin. A semiconductor device comprising a chip and a second semiconductor chip that is mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin, as viewed from the upper surface of the circuit board In this case, the first and second semiconductor chips have overlapping portions and the positions of the centers of gravity are shifted from each other, and the entire area of the first and second semiconductor chips when viewed from the upper surface of the circuit board, Having a recess formed in a key shape along a position corresponding to the outer periphery of the projection area of the second semiconductor chip on the first surface, and the recess is filled with the sealing adhesive resin. Features.

  According to this configuration, it is possible to reduce local undulation caused by the shift of semiconductor chips of different sizes, and the tensile force of the sealing adhesive resin resulting therefrom, and between the semiconductor chip and the sealing adhesive resin. Can be avoided.

Hereinafter, the present invention will be described with reference to FIGS.
In addition, the same code | symbol is attached | subjected and demonstrated to what comprises the same effect | action.
(Embodiment 1)
1A and 1B show Embodiment 1 of the present invention.

  The semiconductor chip 31 is flip-flop mounted on the upper surface of the circuit board 2 face down, and the semiconductor chip 32 is flip-flop mounted on the lower surface of the circuit board 2 face down.

  Specifically, a sealing adhesive resin 41 is formed on the upper surface of the circuit board 2, and the semiconductor chip 31 is mounted thereon. The outer shape of the semiconductor chip 31 is an example of dimensions in the system LSI, but here, it is assumed that the length is 3 mm × width 3 mm and the thickness is 200 μm.

  The external shape of the circuit board 2 is 6 mm × 6 mm in length and the thickness is 300 μm, and it is a double-sided circuit board having a 6-layer structure. Although not shown in detail, the electrodes on the surface of the circuit board 2 and the pads on the surface of the semiconductor chip 31 are electrically joined via bumps 51. The bump 51 has a height of about 20 μm and a diameter of about 50 μm. Since the height of the electrode on the surface of the circuit board 2 is about 20 μm, the total height of the sealing adhesive resin 41 interposed between the circuit board 2 and the semiconductor chip 31 is about 40 μm.

As the sealing adhesive resin 41, a conductive adhesive resin mixed with a metal filler, an insulating adhesive resin, or the like is used, and a fillet is formed in the periphery of the semiconductor chip 31.
The bump 51 is formed of a metal such as solder and gold or a conductive resin ball and a combination thereof. The center of the bump 51 is formed so as to be about 150 μm inside from the edge of the semiconductor chip 31.

  These structures are formed when the sealing adhesive resin 41 in a sheet state is first pasted on the circuit board 2 to mount the semiconductor chip 31 and heated / pressed from the upper surface of the semiconductor chip 31. In some cases, the semiconductor chip 31 is formed by bonding only the bumps 51 and then injecting and bonding a paste-like sealing adhesive resin 41.

  Similarly, a sealing adhesive resin 42 is formed on the other lower surface of the circuit board 2, and a semiconductor chip 32 is mounted on the sealing adhesive resin 42, and is electrically connected via bumps 52. The external size of the semiconductor chip 32 is the same as that of the semiconductor chip 31, and the bonding method, bump shape, etc. are all the same as those of the semiconductor chip 31.

  As shown in FIG. 1B, the semiconductor chip 31 and the semiconductor chip 32 are not arranged symmetrically when viewed from above, but the center of gravity of the semiconductor chip 32 with respect to the center of gravity G1 of the semiconductor chip 31. G2 is arranged 1 mm in the vertical direction and 1 mm in the horizontal direction.

  On the top surface of the circuit board 2 on which the semiconductor chip 31 is mounted, as shown in FIGS. 1A and 1B, a recess 21 is formed in a region where the semiconductor chip 32 and the semiconductor chip 31 overlap. The depth of the recess 21 is about 30 μm, and the sealing adhesive resin 41 is also filled in the recess 21. The height of the sealing adhesive resin 41, that is, the distance from the semiconductor chip 31 to the circuit board 2 is In No. 21, the height is as high as 70 μm. The recess 21 provided in the circuit board 2 is formed by performing processing such as etching from the surface when the circuit board 2 is manufactured.

Detailed dimension examples of the region where the recess 21 is formed will be shown below.
Although the entire area where the semiconductor chip 32 and the semiconductor chip 31 overlap each other, the area is limited according to the arrangement restriction of the bumps 51 formed on the semiconductor chip 31.

  As shown in FIG. 1B, the planar position of the recess 21 is at least D1 = 100 μm as a region necessary for filling the sealing adhesive resin around the bump 51 formed on the semiconductor chip 31. It is assumed that it exists inside.

  Further, since the tensile force received by the sealing adhesive resin 41 on the semiconductor chip 31 side due to the warp on the semiconductor chip 32 side may be maximized outside the edge of the semiconductor chip 32, the recess 21 is It is preferable to form the semiconductor chip 32 so as to extend to a region outside the edge. Here, it is assumed that D2 = 100 μm or more is formed.

  In this way, since the sealing adhesive resin 41 between the recess 21 and the semiconductor chip 31 is formed high, the side of the semiconductor chip 32 mounted on the other side of the circuit board 2 is warped. The influence of the undulation of the circuit board 2 corresponding to the outer peripheral portion of the semiconductor chip 32 is alleviated by the sealing adhesive resin 41 of the concave portion 21 having a certain amount of height, and the semiconductor chip 31 and the sealing adhesive resin of the portion concerned. The tensile force generated at the interface of 41 can be reduced.

(Embodiment 2)
2 and 3 show a second embodiment of the present invention.
In the first embodiment, all of the recesses 21 formed on the upper surface of the circuit board 2 are formed in a region where the semiconductor chip 31 and the semiconductor chip 32 overlap, but this is difficult due to restrictions on the electrical wiring of the circuit board 2. In this case, as shown in FIG. 2, the same effect can be obtained even if the formation is limited to the key-shaped region along the position corresponding to the outer periphery of the semiconductor chip 32, which is the region where the tensile force is maximized. At this time, it is assumed that the width of the key-shaped recess 21 is formed in the semiconductor chip 32 with a width of 100 μm or more on the outside and 100 μm or more on the inside, and a total of 200 μm or more.

  Further, the rectangular recesses 21 shown in FIG. 1 or the recesses 21 arranged in the key-shaped region shown in FIG. 2 are supposed to be formed continuously in the semiconductor chip 31. In addition to the bumps 51, a copper pattern other than the electrodes is often formed on the surface of the circuit board 2 in 31, so that it cannot always be formed continuously. When it is difficult to form the recesses 21 due to the influence of such a pattern, for example, as shown in FIG. 3, for example, intermittently according to the layout of the bumps 51 formed on the semiconductor chip 31 and other restrictions. You may comprise by the recessed part 21a, 21b, 21c formed in this.

  In the first and second embodiments, the recesses 21, 21a, 21b, and 21c are formed only on the surface of the circuit board 2 that faces the semiconductor chip 31 for the sake of simplification. Since the influence of the undulation on the other side of the chip is the same, it is formed only on the surface of the circuit board 2 facing the semiconductor chip 32, or the surface of the circuit board 2 facing the semiconductor chip 31 and the semiconductor chip 32 of the circuit board 2. It is conceivable to form recesses 21, 21 a, 21 b, and 21 c in the same manner on the surface facing each other.

(Embodiment 3)
4 (a) and 4 (b) show Embodiment 3 of the present invention.
In the third embodiment, as shown in FIGS. 4A and 4B, the convex portion 22 is formed on the surface of the circuit board 2 on which the semiconductor chip 31 is mounted. The height of the convex portion 22 is about 30 μm. The material constituting the convex portion 22 is a material having a higher elastic modulus than the sealing adhesive resin, such as an epoxy resin containing glass cloth. Specifically, the elastic modulus of the sealing adhesive resin is about 5 GPa, whereas the epoxy resin with glass cloth has an elastic modulus of 10 GPa or more.

  By forming such a hard material on the circuit board 2, the thickness of the circuit board in the region including the hard material can be locally increased, and the semiconductor chip 32 mounted on the other side of the circuit board 2. The effect of warping the side can be prevented from being exerted on the semiconductor chip 31 side, and the tensile force generated at the interface between the semiconductor chip 31 and the sealing adhesive resin 51 can be reduced.

Detailed dimension examples of the region where the convex portion 22 is formed will be shown below.
Although the entire area where the semiconductor chip 32 and the semiconductor chip 31 overlap each other, the area is limited according to the arrangement restriction of the bumps 51 formed on the semiconductor chip 31. For example, in the case of FIG. 4B, the outer shape of the planar region of the convex portion 22 is a region necessary for filling the sealing adhesive resin around the bump 51 formed on the semiconductor chip 31. As shown by the symbol D3 in FIG. 4B, it is assumed that it exists at least 100 μm or more inside. In addition, since the tensile force received by the sealing adhesive resin 41 on the semiconductor chip 31 side due to the warp on the semiconductor chip 32 side may be maximum outside the edge of the semiconductor chip 32, the convex portion 22 is As shown by the symbol D4 in FIG. 4B, it is preferable that the semiconductor chip 32 is formed so as to extend to the region outside the edge. Here, D4 is formed to protrude 100 μm or more from the semiconductor chip 32.

(Embodiment 4)
5 and 6 show a fourth embodiment of the present invention.
In the third embodiment, all of the recesses 22 formed on the upper surface of the circuit board 2 are formed in a region where the semiconductor chip 31 and the semiconductor chip 32 overlap. In this fourth embodiment, as shown in FIG. In addition, the same effect can be obtained by forming only the key-shaped region along the position corresponding to the outer periphery of the semiconductor chip 32, which is the region where the tensile force is maximized. The width of the key-shaped convex portion 22 at this time is specifically formed in the semiconductor chip 32 with a width of 100 μm or more on the outside and 100 μm or more on the inside, with a total width of 200 μm or more.

  Further, the convex portions 22 arranged in the square or key-shaped region shown above are continuously formed in the semiconductor chip 31, but actually, the bumps 51 are formed in the semiconductor chip 31. In addition, since a copper pattern other than an electrode is often formed on the surface of the circuit board 2, it cannot always be formed continuously. When it is difficult to form the convex portion 22 due to the influence of such a pattern, for example, as shown in FIG. 6 for example, intermittently according to the layout of the bump 51 formed on the semiconductor chip 31 and other restrictions. Alternatively, the convex portions 22a, 22b, and 22c may be formed.

  In addition, the convex portions 22, 22a, 22b, and 22c in the third embodiment and the fourth embodiment are formed using a metal material such as copper, so that an effect different from the above can be obtained. Specifically, in general, since the epoxy resin has low adhesion to the metal material, the sealing adhesive resin 41 and the convex portion 22 are easily separated from an external load. By preliminarily separating the sealing adhesive resin 41 and the convex portion 22 by the warp on the side on which the semiconductor chip 32 is mounted, the tensile force at the interface between the sealing adhesive resin 41 and the semiconductor chip 31 is prevented from being generated. Can be expected. In this case, the release from the sealing adhesive resin 41 is performed by applying a release agent such as fluorine or silicon on the outermost surface of the convex portion 22 or performing a release treatment such as an organic thin film. It is more effective to increase the sex.

  In the third and fourth embodiments, the protrusions 22, 22a, 22b, and 22c are formed only on the surface of the circuit board 2 that faces the semiconductor chip 31 for simplicity of explanation. Since the influence of the swell on the other of the semiconductor chip is the same, it is formed only on the surface of the circuit board 2 facing the semiconductor chip 32, or the surface of the circuit board 2 facing the semiconductor chip 31 and the semiconductor chip of the circuit board 2. Similarly, it is conceivable to form convex portions 22, 22 a, 22 b and 22 c on the surface facing 32.

(Embodiment 5)
7 to 9 show a fifth embodiment of the present invention.
In the fifth embodiment, as shown in FIGS. 7A and 7B, in the region where the semiconductor chip 31 is mounted on the circuit board 2, the region that does not overlap with the semiconductor chip 32 on the back side thereof, An elastic body 23 is formed on the surface of the circuit board 2 on which the semiconductor chip 32 is mounted. FIG. 8 is a rear view of FIG. 7B, and it can be seen that the elastic body 23 is formed in a key shape along the outer periphery of the semiconductor chip 32.

  Thus, the elastic body 23 formed so as to cover the side surface of the semiconductor chip 32 in a key shape is made of a material having a smaller linear expansion or a higher elastic modulus than the base material of the circuit board 32. Specifically, an elastic body 23 having a linear expansion coefficient of 20 ppm / ° C. and an elastic modulus of 8 GPa was used. As a typical example of such a material, there is generally an epoxy resin having a high filler concentration. By forming such an elastic body in the region, the elastic body 23 suppresses the entire waviness of the circuit board 2 as shown in FIG. 8, and the sealing adhesive resin of the semiconductor chip is pulled by the waviness. Can be avoided.

Specific dimensions of the region where the elastic body 23 is disposed will be described below.
The elastic body 23 is disposed over the entire region where the semiconductor chip 31 and the semiconductor chip 32 do not overlap in order to maximize the effect. As described above, the deviation between the semiconductor chip 31 and the semiconductor chip 32 is 1 mm in the vertical direction and 1 mm in the horizontal direction. Therefore, the elastic body 23 formed on the side surface of the semiconductor chip 32 is shown in FIG. As shown by symbol D5, the semiconductor chip 32 is formed with a width of about 1 mm from the edge. The height of the elastic body 23 is about 240 μm, which is the sum of the height of the sealing adhesive resin 42 of 40 μm and the thickness of the semiconductor chip 32 of 200 μm.

  In the above, it may be intermittently arranged according to the arrangement restrictions of other passive components existing around the semiconductor chip. The height is also up to the upper surface of the semiconductor chip 32, but the height may be lowered according to the required amount.

  The elastic body 23 is formed only on the surface of the circuit board 2 on which the semiconductor chip 32 is mounted for the sake of simplicity of explanation. It is also conceivable to form the same on the surface on which 31 is mounted.

  The double-sided mounting structure of the semiconductor chip of the present invention can reduce local undulation caused by misalignment of semiconductor chips of different sizes, and the tensile force of the sealing adhesive resin resulting therefrom. Peeling phenomenon that occurs between the adhesive resins can be avoided. Thereby, the circuit board and the semiconductor chip can be made thinner, and the semiconductor mounting structure can be reduced in size and height.

Sectional drawing and top view of the semiconductor device in Embodiment 1 of this invention The top view of the semiconductor device in Embodiment 2 of this invention Another plan view of the semiconductor device according to the embodiment Sectional drawing and top view of the semiconductor device in Embodiment 3 of this invention Plan view of a semiconductor device in a fourth embodiment of the invention Another plan view of the semiconductor device according to the embodiment Sectional drawing and top view of the semiconductor device in Embodiment 5 of this invention Rear view in the same embodiment Schematic diagram showing the application effect of the same embodiment Outline diagram explaining general double-sided mounting structure of semiconductor chip Outline diagram explaining problems in the double-sided mounting structure of semiconductor chips

Explanation of symbols

2 Circuit boards 21, 21a, 21b, 21c Recesses 22, 22a, 22b, 22c Protrusions 23 Elastic bodies 31, 32 Semiconductor chips 41, 42 Sealing adhesive resins 51, 52 Bumps

Claims (3)

A circuit board;
A rectangular parallelepiped first semiconductor chip mounted on the first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin;
A rectangular parallelepiped second semiconductor chip mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin,
When viewed from the upper surface of the circuit board, the first and second semiconductor chips have overlapping portions and their gravity positions are shifted from each other.
A semiconductor device having a recess including the overlapping portion and formed in the first surface in a region between the plurality of first bumps, and the recess is filled with the sealing adhesive resin. . A circuit board;
A rectangular parallelepiped first semiconductor chip mounted on the first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin;
A rectangular parallelepiped second semiconductor chip mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin,
When viewed from the upper surface of the circuit board, the first and second semiconductor chips have overlapping portions and their gravity positions are shifted from each other.
A semiconductor device including a convex portion including the overlapping portion and formed on the first surface in a region between the plurality of first bumps and having a higher elastic modulus than the sealing adhesive resin . A circuit board;
A rectangular parallelepiped first semiconductor chip mounted on the first surface of the circuit board via a plurality of first bumps and sealed with a sealing adhesive resin;
A rectangular parallelepiped second semiconductor chip mounted on the second surface of the circuit board via a plurality of second bumps and sealed with a resin,
When viewed from the upper surface of the circuit board, the first and second semiconductor chips have overlapping portions and their gravity positions are shifted from each other.
In the entire area of the first and second semiconductor chips when viewed from the upper surface of the circuit board, a key shape is formed along a position corresponding to the outer periphery of the projection area of the second semiconductor chip on the first surface. A semiconductor device having a recessed portion formed and filled with the sealing adhesive resin .

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