JP5072147B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device having a circuit including thin film transistors (hereinafter referred to as TFTs). For example, the present invention relates to an electro-optical device typified by a liquid crystal display device and a configuration of an electric apparatus in which the electro-optical device is mounted as a component. Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and the electro-optical device and the electric appliance are also included in the category.
[0002]
[Prior art]
In recent years, a technique for manufacturing a semiconductor device in which a semiconductor thin film is formed over an insulating substrate, for example, a semiconductor device using a semiconductor element such as a thin film transistor (TFT) has been rapidly developed. This is because the demand for liquid crystal display devices (typically, active matrix liquid crystal display devices) has increased.
[0003]
In addition, heat treatment performed by a known method (thermal annealing method, laser annealing method, rapid thermal annealing method (RTA method), etc.) in the manufacturing process of the semiconductor device is an essential step. In particular, it is indispensable after doping treatment and after wiring formation.
[0004]
This is because the energy of ions implanted into the semiconductor film in the doping process is very large compared to the binding energy of the elements forming the semiconductor film. For this reason, ions implanted into the semiconductor film blow off elements forming the semiconductor film from lattice points to cause defects in the crystal. Therefore, after the doping process, the defect is recovered, and a heat treatment is performed to activate the implanted impurity element at the same time. The activation of the impurity element is an important process for making the region doped with the impurity element a low-resistance region and functioning as a lightly doped drain (LDD) region, a source region, and a drain region. is there.
[0005]
In addition, the heat treatment performed after the formation of the wiring is a particularly important process for reducing the Schottky barrier at the contact portion between the semiconductor film and the wiring to form an ohmic contact and reducing the contact resistance. Since the semiconductor film and the wiring are in ohmic contact, a voltage drop and power loss at the contact portion between the wiring and the semiconductor film can be ignored during device operation, so that a high-performance semiconductor device can be manufactured. In most cases, the heat treatment in this step is performed by a thermal annealing method.
[0006]
[Problems to be solved by the present invention]
However, as the performance of semiconductor devices increases, the formation of layers having a relatively low heat-resistant temperature, such as the gate electrode becoming metal, is increasing. In particular, since the heat treatment after the above-described doping treatment and after the formation of the wiring is performed after the formation of the gate electrode and the wiring, it is desired to perform the treatment at a low temperature and in a short time.
[0007]
In addition, reducing the number of processes as much as possible is very important for reducing the manufacturing cost and improving the manufacturing yield.
[0008]
The present invention is a technique for solving such a problem, and in a semiconductor device typified by an active matrix liquid crystal display device manufactured using a TFT, the operating characteristics and reliability of the semiconductor device are improved. At the same time, the object is to reduce the number of processes to realize a reduction in manufacturing cost and an improvement in yield.
[0009]
[Means for Solving the Problems]
The present invention provides a method for recovering crystallinity of a semiconductor film after doping, activating impurity elements, and reducing contact resistance after forming a wiring. It is defined as a surface on the opposite side to the surface on which the film is formed. Here, the laser light is irradiated from the back surface side of the substrate because the wiring blocks the laser light from the front surface side of the substrate (in this specification, it is defined as a surface on which a semiconductor film is formed). This is because the contact portion between the semiconductor film and the semiconductor film is not heated. Further, some interlayer insulating films have low heat resistance, which is to prevent laser light from being directly irradiated onto the interlayer insulating film.
[0010]
In the present invention, it is essential that the contact portion between the wiring and the semiconductor film is heated. Therefore, it is possible to heat the semiconductor film and use laser light having a wavelength that allows the laser light to pass through the semiconductor film and reach the contact portion between the wiring and the semiconductor film. This makes it possible to perform the two processes of heat treatment after doping treatment and heat treatment after wiring formation, which have been conventionally performed, in one process of irradiating laser light from the back side of the substrate after wiring formation. The number of processes can be reduced as compared with the prior art.
[0011]
Of course, even if the laser beam does not reach the contact portion, it is possible to recover the crystallinity of the semiconductor film and activate the impurity element by the heat that the laser beam heated the semiconductor film. Since the contact portion between the semiconductor film and the wiring is also heated, it is possible to reduce the contact resistance.
[0012]
Further, the substrate may be heated to about 500 degrees when irradiating with laser light. By doing so, it becomes possible to perform laser light irradiation with a smaller energy density. As a result, the area of the laser beam on the irradiated surface can be increased and the throughput of the process can be improved.
[0013]
In the manufacturing method of the present invention, a first insulating film is formed over a semiconductor film formed over the surface of a substrate, and a first conductive layer is formed over the semiconductor film via the first insulating film. Then, an impurity element is selectively introduced into the semiconductor film to form a channel formation region overlapping with the first conductive layer, a source region and a drain region including impurity regions, and the semiconductor film and the first film A second insulating film is formed to cover the insulating film and the first conductive layer, and the first insulating film and the second insulating film, or the second insulating film are partially etched. A part of the source region and the drain region is exposed to form a second conductive layer in contact with the source region or a part of the drain region, and laser light is emitted from the back side of the substrate to the semiconductor film. Irradiating.
[0014]
In another manufacturing method of the present invention, a semiconductor film is formed over a surface of a substrate, the semiconductor film is crystallized by heat treatment, a first insulating film is formed over the crystallized semiconductor film, A first conductive layer is formed over the semiconductor film with a first insulating film interposed therebetween, an impurity element is selectively introduced into the semiconductor film, a channel formation region overlapping with the first conductive layer, and an impurity region A source region and a drain region are formed, a second insulating film is formed to cover the semiconductor film, the first insulating film, and the first conductive layer, and the first insulating film and the first insulating film are formed. The second insulating film or the second insulating film is partially etched to expose a part of the source region and the drain region and to be in contact with a part of the source region or the drain region. A conductive layer of Characterized by the irradiation from the back surface side laser light to the semiconductor film.
[0015]
In another manufacturing method of the present invention, a semiconductor film is formed over a surface of a substrate, a metal element is introduced into the semiconductor film, the semiconductor film is crystallized by heat treatment, and the crystallized semiconductor film is formed. A first insulating film is formed, a first conductive layer is formed over the semiconductor film via the first insulating film, an impurity element is selectively introduced into the semiconductor film, and the first conductive film is formed. Forming a channel formation region overlapping with the layers, a source region and a drain region made of impurity regions, and forming a second insulating film covering the semiconductor film, the first insulating film, and the first conductive layer; Etching the first insulating film and the second insulating film or the second insulating film to expose a part of the source region and the drain region, and Contact with part of drain region A second conductive layer that, and then irradiating the laser light to the semiconductor film from the back side of the substrate.
[0016]
In each of the manufacturing steps, the impurity element is an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity. Alternatively, an impurity element imparting n-type conductivity and an impurity element imparting p-type conductivity may be used.
[0017]
In each of the manufacturing steps, it is preferable that a part of the laser light passes through the substrate and the semiconductor film. 2 and 3 show the transmittance with respect to the wavelength. 2A shows the transmittance with respect to the wavelength of the 1737 glass substrate (thickness 0.7 mm), and FIG. 2B shows the transmittance with respect to the wavelength of the synthetic quartz glass substrate (thickness 1.1 mm). 3 (A) is the transmittance with respect to the wavelength when the laser beam is irradiated from the surface side of the amorphous silicon film (film thickness 55 nm) formed on the 1737 glass substrate, and FIG. 3 (B) is the 1737 glass substrate. This is the transmittance with respect to the wavelength when the laser beam is irradiated from the surface side of the crystalline silicon film (film thickness 55 nm) formed thereon. 2 and 3, the wavelength of the laser beam is desirably 350 nm (preferably 400 nm) or more.
[0018]
Further, the substrate may be heated to about 500 degrees when irradiating with laser light. By doing so, it becomes possible to perform laser light irradiation with a smaller energy density. As a result, the area of the laser beam on the irradiated surface can be increased and the throughput of the process can be improved.
[0019]
As a laser beam used in the present invention, for example, YAG laser, YVO _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, or the like can be used after being modulated to the second harmonic by a known method. A ruby laser, a Ti: sapphire laser, or the like can also be used. In particular, a YAG laser superior in pulse energy is preferable.
[0020]
Further, a Q switch method (Q modulation switch method) often used in a YAG laser may be used. This is a method of outputting a steep pulse laser having a very high energy value by rapidly increasing the Q value from a state in which the Q value of the laser resonator is sufficiently low. This is a known technique.
[0021]
In addition, it is desirable that the laser light be irradiated after being shaped into a linear shape by an optical system. When a linear beam is used, scanning is performed only in the direction perpendicular to the major axis direction of the linear beam (or the irradiation position of the laser beam is irradiated), unlike the case of using a spot laser beam that requires scanning in the front, rear, left and right directions. This is because laser irradiation can be performed on the entire irradiated surface by movement relative to the surface), so that mass productivity is high. In addition, shaping | molding a laser beam linearly means shape | molding a laser beam so that the shape in the irradiation surface when a to-be-processed object is irradiated with a laser beam may become linear. That is, it means that the cross-sectional shape of the laser beam is formed into a linear shape. In addition, “linear” here does not mean “line” in a strict sense, but means a rectangle (or oval) having a large aspect ratio. For example, the aspect ratio is 10 or more (preferably 100 to 10,000).
[0022]
In each of the above manufacturing steps, the material of the semiconductor film is not limited, but a compound semiconductor film such as silicon or a silicon germanium (SiGe) alloy may be preferably used.
[0023]
In the manufacturing process, the metal element is one or more elements selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Sn, and Sb. .
[0024]
By applying the present invention as described above, the number of steps can be reduced and the performance of the semiconductor device can be greatly improved. For example, in the case of a TFT, the impurity element is sufficiently activated, so that the region to which the impurity element is added can be made to function as an LDD region, a source region, and a drain region with a low resistance region. To do. The operation speed of the TFT is improved by reducing the contact resistance. In particular, the mobility can be improved.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described with reference to FIG.
[0026]
First, the base insulating film 12 is formed on the substrate 11. As the substrate 11, a glass substrate or a synthetic quartz glass substrate that is transparent to laser light is used. As the base insulating film 12, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed. Although an example in which a single layer structure is used as the base insulating film 12 is shown here, a structure in which two or more layers of the insulating film are stacked may be used. Note that the base insulating film is not necessarily formed.
[0027]
Next, a semiconductor film is formed over the base insulating film 12. As the semiconductor film, a semiconductor film having an amorphous structure is formed with a thickness of 25 to 100 nm (preferably 30 to 60 nm) by a known means (sputtering method, LPCVD method, plasma CVD method, or the like). There is no limitation on the material of the semiconductor film, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy. Then, after performing a known crystallization process (laser crystallization method, thermal crystallization method, thermal crystallization method using a catalyst such as nickel) to form a crystalline semiconductor film, patterning is performed to obtain a semiconductor. Layers 13 and 14 are formed. Here, the semiconductor layer 13 is an n-channel TFT, and the semiconductor layer 14 is a p-channel TFT.
[0028]
A gate insulating film 15 covering the semiconductor layers 13 and 14 is formed. The gate insulating film 15 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm using a plasma CVD method, a sputtering method, or the like.
[0029]
Next, as illustrated in FIG. 1A, a conductive film 16 having a thickness of 100 to 500 nm is formed over the gate insulating film 15. The conductive film may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, Nd, and Al, or an alloy material or compound material containing the element as a main component, or may be formed of phosphorus or the like. A semiconductor film typified by a crystalline silicon film doped with an impurity element may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used.
[0030]
Next, a resist mask (not shown) is formed by photolithography, and an etching process for forming electrodes and wirings is performed to form the conductive layers 17 and 18.
[0031]
Next, using the conductive layers 17 and 18 as a mask, the gate insulating film 15 is selectively removed to form insulating layers 19 and 20. Of course, the gate insulating film 15 may not be selectively removed.
[0032]
Then, first and second doping processes are performed to add an impurity element to the semiconductor layer. (FIG. 1B) The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁵ / Cm ² The acceleration voltage is set to 5 to 100 keV. In this case, the conductive layers 17 and 18 serve as a mask for the impurity element, and the impurity regions 21 and 22 are formed in a self-aligning manner. First, an impurity element imparting n-type is added, and then an impurity element imparting p-type is added to form impurity regions 26 and 27. However, as shown in FIGS. 1B and 1C, when an impurity element imparting n-type is added, the semiconductor layer forming the p-channel TFT is covered with a mask 23 made of resist, and p-type is added. When the impurity element imparting is added, the semiconductor layer for forming the n-channel TFT is covered with a mask 25 made of resist.
[0033]
Next, an interlayer insulating film 28 is formed. The interlayer insulating film 28 is formed of an inorganic insulating film material or an organic insulating material. Alternatively, a film whose surface is planarized may be used. Of course, the interlayer insulating film 28 may have a laminated structure instead of a single layer.
[0034]
And it is desirable to perform the process which hydrogenates a semiconductor layer by performing the heat processing for 1 to 12 hours at 300-450 degreeC in the atmosphere containing 3-100% hydrogen. This step is performed in the semiconductor layer by thermally excited hydrogen. ¹⁶ -10 ¹⁸ /cm ^Three This is a step of terminating the dangling bond. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed. In any case, the defect density in the semiconductor layers 104 to 108 is 10 ¹⁶ /cm ^Three It is desirable that the hydrogen content be as follows. For this purpose, hydrogen of about 0.01 to 0.1% of the total number of atoms included in the semiconductor layer may be provided. Of course, it may be performed before the interlayer insulating film is formed.
[0035]
Then, a wiring 29 that is electrically connected to each impurity region is formed. The wiring may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, Nd, and Al, or an alloy material or compound material containing the element as a main component, or an impurity such as phosphorus. A semiconductor film typified by a crystalline silicon film doped with an element may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used. Here, an example in which a single-layer structure is used as the wiring 29 is shown, but a structure in which two or more layers are stacked may be used.
[0036]
FIG. 1F is a diagram illustrating a process of irradiating a laser beam from the back side of the substrate to recover the crystallinity of the semiconductor layer, activate the impurity element, and reduce the contact resistance. In order to irradiate the laser beam from the back surface side of the substrate, for example, a stage on which the substrate is placed may be made of a light-transmitting glass or synthetic quartz. Further, the wavelength of the laser light is desirably a wavelength that appropriately transmits through the substrate and the semiconductor film, and is desirably 350 nm (preferably 400 nm) or more from FIGS. For example, YAG laser, YVO _Four Laser, YLF laser, YAlO _Three Second harmonics such as laser and glass laser, ruby laser, Ti: sapphire laser, and the like can be used. In particular, a YAG laser superior in pulse energy is preferable. Laser light irradiation can be performed in a vacuum, in the air, in a nitrogen atmosphere, or the like. Further, the substrate may be heated to about 500 degrees when irradiating with laser light. By doing so, it becomes possible to perform laser light irradiation with a smaller energy density. As a result, the area of the laser beam on the irradiated surface can be increased and the throughput of the process can be improved.
[0037]
Use one of the laser oscillators described above, and irradiate laser light in any atmosphere, but it is optimal depending on the substrate used, the type and thickness of the underlying insulating film and semiconductor film, the electrode and wiring materials, etc. Since the appropriate irradiation conditions are different, the practitioner may determine appropriately.
[0038]
By the laser light irradiation method of the present invention, the crystallinity of the semiconductor film is restored, the impurity elements are activated, and the contact resistance is sufficiently reduced. In addition, the electrical characteristics of the TFT manufactured in this way are improved, and the characteristics of a semiconductor device manufactured using the TFT can be improved.
[0039]
The present invention configured as described above will be described in more detail in the following embodiments.
[0040]
【Example】
[Example 1]
An embodiment of the present invention will be described with reference to FIG.
[0041]
First, the base insulating film 12 is formed on the substrate 11. As the substrate 11, a glass substrate or a synthetic quartz glass substrate that is transparent to laser light is used. As the base insulating film 12, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed. Although an example in which a single layer structure is used as the base insulating film 12 is shown here, a structure in which two or more layers of the insulating film are stacked may be used. Note that the base insulating film is not necessarily formed. In this embodiment, a silicon oxide film having a thickness of 150 nm is formed on a synthetic quartz glass substrate by a CVD method.
[0042]
Next, a semiconductor film is formed over the base insulating film 12. As the semiconductor film, a semiconductor film having an amorphous structure is formed with a thickness of 25 to 100 nm (preferably 30 to 60 nm) by a known means (sputtering method, LPCVD method, plasma CVD method, or the like). There is no limitation on the material of the semiconductor film, but it is preferably formed of silicon or a silicon germanium (SiGe) alloy. Then, after performing a known crystallization process (laser crystallization method, thermal crystallization method, thermal crystallization method using a catalyst such as nickel) to form a crystalline semiconductor film, patterning is performed to obtain a semiconductor. Layers 13 and 14 are formed. Here, the semiconductor layer 13 is an n-channel TFT, and the semiconductor layer 14 is a p-channel TFT. In this embodiment, after an amorphous silicon film having a film thickness of 55 nm is formed by CVD, the amorphous silicon film is crystallized using a XeCl excimer laser, and semiconductor layers 13 and 14 are formed by patterning.
[0043]
A gate insulating film 15 covering the semiconductor layers 13 and 14 is formed. The gate insulating film 15 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm using a plasma CVD method, a sputtering method, or the like. In this embodiment, a silicon oxide film having a thickness of 100 nm is formed by a CVD method.
[0044]
Next, as illustrated in FIG. 1A, a conductive film 16 having a thickness of 100 to 500 nm is formed over the gate insulating film 15. The conductive film may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, Nd, and Al, or an alloy material or compound material containing the element as a main component, or may be formed of phosphorus or the like. A semiconductor film typified by a crystalline silicon film doped with an impurity element may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used. In this embodiment, Ta having a film thickness of 400 nm is formed by sputtering.
[0045]
Next, a resist mask (not shown) is formed by photolithography, and an etching process for forming electrodes and wirings is performed to form the conductive layers 17 and 18.
[0046]
Next, using the conductive layers 17 and 18 as a mask, the gate insulating film 15 is selectively removed to form insulating layers 19 and 20. Of course, the gate insulating film 15 may not be selectively removed.
[0047]
Then, first and second doping processes are performed to add an impurity element to the semiconductor layer. (FIG. 1B) The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁵ / Cm ² And an acceleration voltage of 5 to 100 keV. In this case, the conductive layers 17 and 18 serve as a mask for the impurity element, and the impurity regions 21 and 22 are formed in a self-aligning manner. First, an impurity element imparting n-type is added, and then an impurity element imparting p-type is added to form impurity regions 26 and 27. However, as shown in FIGS. 1B and 1C, when an impurity element imparting n-type is added, the semiconductor layer forming the p-channel TFT is covered with a mask 23 made of resist, and p-type is added. When the impurity element imparting is added, the semiconductor layer for forming the n-channel TFT is covered with a mask 25 made of resist. In this embodiment, phosphorus is used as an impurity element imparting n-type, an acceleration voltage is set to 10 keV by an ion implantation method, and an average concentration is 2 × 10. ²⁰ / Cm ^Three It introduces so that it may become. Further, boron is used as the impurity element imparting p-type, the acceleration voltage is set to 10 keV, and the average concentration is 2 × 10. ²⁰ / Cm ^Three It introduces so that it may become.
[0048]
Next, an interlayer insulating film 28 is formed. The interlayer insulating film 28 is formed of an inorganic insulating film material or an organic insulating material. Alternatively, a film whose surface is planarized may be used. Of course, the interlayer insulating film 28 may have a laminated structure instead of a single layer. In this embodiment, a silicon oxide film having a thickness of 1.6 μm is formed.
[0049]
And it is desirable to perform the process which hydrogenates a semiconductor layer by performing the heat processing for 1 to 12 hours at 300-450 degreeC in the atmosphere containing 3-100% hydrogen. This step is performed in the semiconductor layer by thermally excited hydrogen. ¹⁶ -10 ¹⁸ /cm ^Three This is a step of terminating the dangling bond. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed. In any case, the defect density in the semiconductor layers 104 to 108 is 10 ¹⁶ /cm ^Three It is desirable that the hydrogen content be as follows. For this purpose, hydrogen of about 0.01 to 0.1% of the total number of atoms included in the semiconductor layer may be provided. Of course, it may be performed before the interlayer insulating film is formed.
[0050]
Then, a wiring 29 that is electrically connected to each impurity region is formed. The wiring may be formed of an element selected from Ta, W, Ti, Mo, Cu, Cr, Nd, and Al, or an alloy material or compound material containing the element as a main component, or an impurity such as phosphorus. A semiconductor film typified by a crystalline silicon film doped with an element may be used. Further, an AgPdCu alloy may be used. Alternatively, an oxide conductive film (typically an ITO film) that is transparent to visible light may be used. Here, an example in which a single-layer structure is used as the wiring 29 is shown, but a structure in which two or more layers are stacked may be used. In this embodiment, a laminated film of a Ti film having a thickness of 50 nm and an alloy film having a thickness of 500 nm (alloy film of Al and Ti) is formed by patterning.
[0051]
FIG. 1F is a diagram illustrating a process of irradiating a laser beam from the back side of the substrate to recover the crystallinity of the semiconductor layer, activate the impurity element, and reduce the contact resistance. In order to irradiate the laser beam from the back surface side of the substrate, for example, a stage on which the substrate is placed may be made of a light-transmitting glass or synthetic quartz. Further, the wavelength of the laser light is desirably a wavelength that appropriately transmits through the substrate and the semiconductor film, and is desirably 350 nm (preferably 400 nm) or more from FIGS. For example, YAG laser, YVO _Four Laser, YLF laser, YAlO _Three Second harmonics such as laser and glass laser, ruby laser, Ti: sapphire laser, and the like can be used. In particular, a YAG laser superior in pulse energy is preferable. Laser light irradiation can be performed in a vacuum, in the air, in a nitrogen atmosphere, or the like. Further, the substrate may be heated to about 500 degrees when irradiating with laser light. By doing so, it becomes possible to perform laser light irradiation with a smaller energy density. As a result, the area of the laser beam on the irradiated surface can be increased and the throughput of the process can be improved. In this embodiment, a YAG laser is used, and modulated in the second harmonic (wavelength 532 nm) by a nonlinear optical element and irradiated in the atmosphere.
[0052]
According to the present invention, the crystallinity of the semiconductor film is restored, the impurity elements are activated, and the contact resistance is sufficiently reduced. In addition, the electrical characteristics of the TFT manufactured in this way are improved, and the characteristics of a semiconductor device manufactured using the TFT can be improved.
[0053]
[Example 2]
In this embodiment, a method for manufacturing a TFT having a structure different from that in Embodiment 1 will be described. However, only a method for manufacturing an n-channel TFT will be described here.
[0054]
According to the first embodiment, the state of FIG. In this embodiment, the conductive layer is formed of W.
[0055]
Subsequently, etching is performed to form a gate electrode 31 having a tapered end. A mask (not shown) made of a resist is formed by photolithography, and an etching process for forming electrodes and wirings is performed. In this embodiment, an ICP (Inductively Coupled Plasma) etching method is used as an etching process, and CF is used as an etching gas. _Four And Cl ₂ And O ₂ The gas flow ratio was 25/25/10 (sccm), and 500 W RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and perform etching. . Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. was used. 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. By this etching process, the W film is etched so that the end portion of the conductive layer is tapered. Note that in order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%. In the above etching treatment, by making the shape of the resist mask suitable, the end portion of the conductive layer is tapered due to the effect of the bias voltage applied to the substrate side. The angle of this taper portion is 15 to 45 °. Reference numeral 32 denotes a gate insulating film, and a region not covered with the conductive layer 31 is etched and thinned by about 20 to 50 nm.
[0056]
Then, an impurity element is introduced by performing a doping process. In the doping treatment, an impurity element imparting n-type conductivity or an impurity element imparting p-type conductivity is introduced by an ion doping method, an ion implantation method, or the like. An impurity element imparting n-type conductivity and an impurity element imparting p-type conductivity may be introduced. In addition, hydrogen may be added. By the doping process, a region 33 in which the impurity element is introduced at a high concentration, a region 34 in which the impurity element is introduced at a low concentration due to a taper at the end of the gate electrode, and a region (channel formation region) 35 in which the impurity element is not introduced are formed. In this embodiment, phosphorus is used as an impurity element imparting n-type conductivity. The phosphorus injection condition was 5% PH diluted with hydrogen. _Three , Acceleration voltage 10 keV, dose amount 1.5 × 10 ¹⁵ /cm ² And The time required for implantation is about 8 minutes, and the average concentration of the crystalline semiconductor film is 2 × 10. ²⁰ /cm ^Three Of phosphorus can be injected.
[0057]
Subsequently, after the interlayer insulating film 36 and the wiring 37 are formed according to the first embodiment, laser light is irradiated from the back side of the substrate to recover the crystallinity of the semiconductor film, the activation of the impurity element, and the contact resistance. Make sufficient reductions. The electrical characteristics of the TFT manufactured in this way are improved, and the characteristics of a semiconductor device manufactured using the TFT can be improved.
[0058]
[Example 3]
In this example, a manufacturing process of a TFT having a structure different from that of Example 1 or Example 2 is described.
[0059]
First, a transparent glass substrate or a synthetic quartz glass substrate is used as the substrate 40. Further, as the base insulating film, an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film may be formed in a single layer or a stacked structure. Note that the base insulating film is not necessarily formed. In this embodiment, a synthetic quartz glass substrate is used as the substrate 40.
[0060]
A conductive film is formed and etched to form a conductive film having a desired shape. There is no particular limitation on the material of the conductive film, but the conductive film may be formed of an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, or an alloy material or compound material containing the element as a main component. Good. Alternatively, a semiconductor film typified by a crystalline silicon film doped with an impurity element such as phosphorus may be used. Further, an AgPdCu alloy may be used. Needless to say, the conductive film may be a stacked layer instead of a single layer. In this embodiment, a conductive film 306 made of a W film having a thickness of 400 nm is formed. The W film is formed by sputtering using a W target. In addition, tungsten hexafluoride (WF ₆ It can also be formed by a thermal CVD method using Then, patterning is performed to form the conductive layer 41.
[0061]
The insulating film 42 may be an insulating film containing silicon such as a silicon oxide film or a silicon nitride oxide film (SiOxNy) by a known means (sputtering method, LPCVD method, plasma CVD method or the like). Of course, the insulating film is not limited to a single layer but may be a stacked layer. In this embodiment, a silicon oxide film having a thickness of 150 nm is formed by plasma CVD.
[0062]
Subsequently, a semiconductor film 43 having an amorphous structure is formed with a thickness of 25 to 80 nm (preferably 30 to 60 nm) by a known means (sputtering method, LPCVD method, plasma CVD method, or the like). There is no limitation on the material of the semiconductor film, but the semiconductor film is preferably formed of silicon or a silicon germanium (SiGe) alloy. In this embodiment, an amorphous silicon film having a thickness of 50 nm is formed by plasma CVD. Then, the semiconductor film is crystallized by performing a known crystallization method (laser crystallization method, thermal crystallization method using RTA or furnace annealing furnace, thermal crystallization method using a metal element that promotes crystallization). Let In this embodiment, an aqueous solution of nickel acetate (weight-concentrated concentration 5 ppm, volume 5 ml) is applied to the surface of the amorphous silicon film by spin coating (solution coating method) and exposed to a nitrogen atmosphere at 550 ° C. for 4 hours. In addition to nickel, metal elements for promoting crystallization include Fe, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Sn, and Sb. Alternatively, a plurality of metal elements can be used. In addition to the spin coating method, the metal element may be added by a plasma treatment method, a vapor deposition method, an ion implantation method, or a sputtering method. Note that the heating time and temperature for crystallization depend on the semiconductor film and the metal element to be added, so that the practitioner may determine as appropriate.
[0063]
Subsequently, a mask 44 is formed and a doping process is performed to selectively introduce an impurity element into the semiconductor film. In the doping treatment, one or more elements selected from rare gas elements and an impurity element imparting n-type or an impurity element imparting p-type are introduced by an ion doping method, an ion implantation method, or the like. In addition, hydrogen may be added. In this embodiment, phosphorus is used as an impurity element imparting n-type. The phosphorus injection condition was 5% PH diluted with hydrogen. _Three , Acceleration voltage 80 keV, dose amount 1.5 × 10 ¹⁵ /cm ² And
[0064]
When a metal element is used to crystallize the semiconductor film as in this embodiment, it is desirable to perform heat treatment to getter the metal element. By the heat treatment, the metal element moves from the channel formation region to the region to which the impurity element is added, so that the channel formation region can be a high resistance region.
[0065]
Then, after removing the mask and forming a semiconductor layer to be an active region, an interlayer insulating film 48 and a wiring 49 are formed according to the first embodiment. Subsequently, laser light is irradiated from the back side of the substrate to recover the crystallinity of the semiconductor film, activate the impurity elements, and reduce the contact resistance. By irradiating the laser beam from the back side, the gate electrode 41 is heated, and the semiconductor layer is further heated by the heat, so that the efficiency is high. The electrical characteristics of the TFT manufactured in this way are improved, and the characteristics of a semiconductor device manufactured using the TFT can be improved.
[0066]
In this embodiment, only the impurity region 47 functioning as the source region and the drain region is formed as the impurity region. However, the present invention has an LDD structure or a GOLD (Gate-drain Overlapped LDD) structure even in the bottom gate structure. It can also be applied to cases.
[0067]
[Example 4]
In this embodiment, a method for manufacturing an active matrix substrate will be described with reference to FIGS. In this specification, a substrate in which a pixel portion having a CMOS circuit, a driver circuit, a pixel TFT, and a storage capacitor is formed over the same substrate is referred to as an active matrix substrate for convenience.
[0068]
First, in this embodiment, a substrate 400 made of glass such as barium borosilicate glass represented by Corning # 7059 glass or # 1737 glass or aluminoborosilicate glass is used. Note that a quartz substrate may be used as the substrate 400. Further, a plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may be used.
[0069]
Next, a base film 401 made of an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed over the substrate 400. Although a two-layer structure is used as the base film 401 in this embodiment, a single-layer film of the insulating film or a structure in which two or more layers are stacked may be used. As the first layer of the base film 401, a plasma CVD method is used, and SiH _Four , NH _Three And N ₂ A silicon oxynitride film 401a formed using O as a reactive gas is formed to a thickness of 10 to 200 nm (preferably 50 to 100 nm). In this embodiment, a 50 nm thick silicon oxynitride film 401a (composition ratio Si = 32%, O = 27%, N = 24%, H = 17%) is formed. Next, as the second layer of the base film 401, a plasma CVD method is used, and SiH _Four And N ₂ A silicon oxynitride film 401b formed using O as a reactive gas is stacked to a thickness of 50 to 200 nm (preferably 100 to 150 nm). In this embodiment, a silicon oxynitride film 401b (composition ratio Si = 32%, O = 59%, N = 7%, H = 2%) having a thickness of 100 nm is formed.
[0070]
Next, semiconductor layers 402 to 406 are formed over the base film. The semiconductor layers 402 to 406 are formed by forming a semiconductor film with a thickness of 25 to 100 nm (preferably 30 to 60 nm) by a known means (sputtering method, LPCVD method, plasma CVD method or the like), and a known crystallization method ( Laser crystallization, thermal crystallization using an RTA or furnace annealing furnace, thermal crystallization using a metal element that promotes crystallization, or the like). Then, the obtained crystalline semiconductor film is patterned into a desired shape to form semiconductor layers 402 to 406. Examples of the semiconductor film include an amorphous semiconductor film, a microcrystalline semiconductor film, a crystalline semiconductor film, and the like, and a compound semiconductor film having an amorphous structure such as an amorphous silicon germanium film may be applied. In this embodiment, a 55 nm amorphous silicon film is formed by plasma CVD. Then, a crystalline silicon film is formed by a laser crystallization method, and semiconductor layers 402 to 406 are formed by a patterning process using a photolithography method.
[0071]
When a crystalline semiconductor film is formed by a laser crystallization method, a pulse oscillation type or continuous emission type excimer laser, YAG laser, YVO _Four Laser, YLF laser, YAlO _Three A laser, a glass laser, a ruby laser, a Ti: sapphire laser, or the like can be used. In the case of using these lasers, it is preferable to use a method in which a laser beam emitted from a laser oscillator is linearly collected by an optical system and irradiated onto a semiconductor film. Crystallization conditions are appropriately selected by the practitioner. When an excimer laser is used, the pulse oscillation frequency is 300 Hz, and the laser energy density is 100 to 700 mJ / cm. ² (Typically 200-300mJ / cm ² ). When a YAG laser is used, the second harmonic is used and the pulse oscillation frequency is 1 to 300 Hz, and the laser energy density is 300 to 1000 mJ / cm. ² (Typically 350-500mJ / cm ² ) Then, the laser beam condensed linearly with a width of 100 to 1000 μm, for example 400 μm, is irradiated over the entire surface of the substrate, and the linear beam superposition ratio (overlap ratio) at this time is 50 to 98%. Good.
[0072]
Further, after forming the semiconductor layers 402 to 406, a small amount of impurity element (boron or phosphorus) may be doped in order to control the threshold value of the TFT.
[0073]
Next, a gate insulating film 407 covering the semiconductor layers 402 to 406 is formed. The gate insulating film 407 is formed of an insulating film containing silicon with a thickness of 40 to 150 nm by plasma CVD or sputtering. In this embodiment, a silicon oxynitride film (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) with a thickness of 110 nm is formed by plasma CVD. Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.
[0074]
When a silicon oxide film is used, TEOS (Tetraethyl Orthosilicate) and O ₂ The reaction pressure is 40 Pa, the substrate temperature is 300 to 400 ° C., and the high frequency (13.56 MHz) power density is 0.5 to 0.8 W / cm. ² And can be formed by discharging. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by thermal annealing at 400 to 500 ° C. thereafter.
[0075]
Next, a first conductive film 408 with a thickness of 20 to 100 nm and a second conductive film 409 with a thickness of 100 to 400 nm are stacked over the gate insulating film 407. In this embodiment, a first conductive film 408 made of a TaN film with a thickness of 30 nm and a second conductive film 409 made of a W film with a thickness of 370 nm are stacked. The TaN film was formed by sputtering, and was sputtered in a nitrogen-containing atmosphere using a Ta target. The W film was formed by sputtering using a W target. In addition, tungsten hexafluoride (WF ₆ It can also be formed by a thermal CVD method using In any case, in order to use as a gate electrode, it is necessary to reduce the resistance, and the resistivity of the W film is desirably 20 μΩcm or less. The resistivity of the W film can be reduced by increasing the crystal grains. However, when there are many impurity elements such as oxygen in the W film, the crystallization is hindered and the resistance is increased. Therefore, in this embodiment, a sputtering method using a target of high purity W (purity 99.9999%) is used, and the W film is formed with sufficient consideration so that impurities are not mixed in from the gas phase during film formation. By forming, a resistivity of 9 to 20 μΩcm could be realized.
[0076]
In this embodiment, the first conductive film 408 is TaN and the second conductive film 409 is W. However, there is no particular limitation, and all of them are Ta, W, Ti, Mo, Al, Cu, Cr, Nd. You may form with the element selected from these, or the alloy material or compound material which has the said element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Further, an AgPdCu alloy may be used. In addition, the first conductive film is formed using a tantalum (Ta) film, the second conductive film is formed using a W film, the first conductive film is formed using a titanium nitride (TiN) film, and the second conductive film is formed. The first conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of an Al film, and the first conductive film is formed of a tantalum nitride (TaN) film. The second conductive film may be a combination of Cu films.
[0077]
Next, resist masks 410 to 415 are formed by photolithography, and a first etching process for forming electrodes and wirings is performed. The first etching process is performed under the first and second etching conditions. (FIG. 6B) In this embodiment, the ICP etching method is used as the first etching condition, and the etching gas is CF. _Four And Cl ₂ And O ₂ Each gas flow rate ratio was 25/25/10 (sccm), and 500 W of RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and perform etching. . Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. was used. 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The W film is etched under this first etching condition so that the end portion of the first conductive layer is tapered.
[0078]
Thereafter, the resist masks 410 to 415 are not removed and the second etching condition is changed, and the etching gas is changed to CF. _Four And Cl ₂ The gas flow ratio is 30/30 (sccm), and 500 W of RF (13.56 MHz) power is applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and etching for about 30 seconds. Went. 20 W of RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. CF _Four And Cl ₂ Under the second etching condition in which is mixed, the W film and the TaN film are etched to the same extent. Note that in order to perform etching without leaving a residue on the gate insulating film, it is preferable to increase the etching time at a rate of about 10 to 20%.
[0079]
In the first etching process, the shape of the mask made of resist is made suitable, and the end portions of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. It becomes. The angle of this taper portion is 15 to 45 °. Thus, the first shape conductive layers 417 to 422 (the first conductive layers 417 a to 422 a and the second conductive layers 417 b to 422 b) composed of the first conductive layer and the second conductive layer by the first etching treatment. Form. Reference numeral 416 denotes a gate insulating film, and a region not covered with the first shape conductive layers 417 to 422 is etched and thinned by about 20 to 50 nm.
[0080]
Next, a second etching process is performed without removing the resist mask. Here, CF is used as an etching gas. _Four And Cl ₂ And O ₂ Then, the W film is selectively etched. At this time, second conductive layers 428b to 433b are formed by a second etching process. On the other hand, the first conductive layers 417a to 422a are hardly etched, and the second shape conductive layers 428 to 433 are formed.
[0081]
Then, a first doping process is performed without removing the resist mask, and an impurity element imparting n-type conductivity is added to the semiconductor layer at a low concentration. The doping process may be performed by an ion doping method or an ion implantation method. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 5x10 ¹⁴ /cm ² And an acceleration voltage of 40 to 80 keV. In this embodiment, the dose is 1.5 × 10 ¹³ /cm ² The acceleration voltage is set to 60 keV. As an impurity element imparting n-type, an element belonging to Group 15, typically phosphorus (P) or arsenic (As), is used here, but phosphorus (P) is used. In this case, the conductive layers 428 to 433 serve as a mask for the impurity element imparting n-type, and the impurity regions 423 to 427 are formed in a self-aligning manner. Impurity regions 423 to 427 have a size of 1 × 10 ¹⁸ ~ 1x10 ²⁰ /cm ^Three An impurity element imparting n-type is added in a concentration range of.
[0082]
After removing the resist mask, new resist masks 434a to 434c are formed, and the second doping process is performed at an acceleration voltage higher than that of the first doping process. The condition of the ion doping method is a dose of 1 × 10 ¹³ ~ 1x10 ¹⁵ /cm ² The acceleration voltage is set to 60 to 120 keV. In the doping treatment, the second conductive layers 428b to 432b are used as masks against the impurity element, and doping is performed so that the impurity element is added to the semiconductor layer below the tapered portion of the first conductive layer. Subsequently, the third doping process is performed by lowering the acceleration voltage than that in the second doping process to obtain the state of FIG. The condition of the ion doping method is a dose of 1 × 10 ¹⁵ ~ 1x10 ¹⁷ /cm ² The acceleration voltage is set to 50 to 100 keV. The low-concentration impurity regions 436, 442, and 448 overlapping with the first conductive layer by the second doping process and the third doping process have 1 × 10 ¹⁸ ~ 5x10 ¹⁹ /cm ^Three An impurity element imparting n-type is added in the concentration range of 1 × 10 in the high concentration impurity regions 435, 438, 441, 444, and 447. ¹⁹ ~ 2x10 ²⁰ /cm ^Three An impurity element imparting n-type is added in a concentration range of.
[0083]
Of course, by selecting an appropriate acceleration voltage, the low-concentration impurity region and the high-concentration impurity region formed by the second doping process and the third doping process can be performed by one doping process.
[0084]
Next, after removing the resist mask, new resist masks 450a to 450c are formed, and a fourth doping process is performed. By this fourth doping treatment, impurity regions 451, 453 to 456, 458, and 460 in which an impurity element imparting a conductivity type opposite to the one conductivity type is added to the semiconductor layer that becomes the active layer of the p-channel TFT. , 461. The second conductive layers 428a to 432a are used as masks against the impurity element, and an impurity element imparting p-type is added to form an impurity region in a self-aligning manner. In this embodiment, the impurity regions 451, 453 to 455, 457, 459, and 460 are diborane (B ₂ H ₆ ) Using an ion doping method. (FIG. 7B) In the fourth doping process, the semiconductor layer forming the n-channel TFT is partially covered with masks 450a to 450c made of resist. Phosphorus is added to the impurity regions 438 and 439 at different concentrations by the first to third doping treatments, and the concentration of the impurity element imparting p-type is 1 × 10 5 in any of the regions. ¹⁹ ~ 2x10 ²⁰ atoms / cm ^Three By performing the doping treatment so as to become, no problem arises because it functions as the source region and drain region of the p-channel TFT.
[0085]
Through the above steps, impurity regions are formed in the respective semiconductor layers.
[0086]
Next, the resist masks 450 a to 450 c are removed, and a first interlayer insulating film 461 is formed. The first interlayer insulating film 461 is formed of an insulating film containing silicon with a thickness of 100 to 200 nm using a plasma CVD method or a sputtering method. In this embodiment, a silicon oxynitride film having a thickness of 150 nm is formed by a plasma CVD method. Needless to say, the first interlayer insulating film 461 is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.
[0087]
Then, hydrogenation can be performed by heat treatment (heat treatment at 300 to 550 ° C. for 1 to 12 hours). This step is a step of terminating dangling bonds in the semiconductor layer with hydrogen contained in the first interlayer insulating film 461. The semiconductor layer can be hydrogenated regardless of the presence of the first interlayer insulating film. As other means for hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) or heat treatment at 300 to 450 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen may be performed. .
[0088]
Next, a second interlayer insulating film 462 made of an inorganic insulating film material or an organic insulating material is formed over the first interlayer insulating film 461. In this embodiment, an acrylic resin film having a film thickness of 1.6 μm is formed, but one having a viscosity of 10 to 1000 cp, preferably 40 to 200 cp is used. Alternatively, a film whose surface is planarized may be used as the second interlayer insulating film 462.
[0089]
In the driver circuit 506, wirings 464 to 468 that are electrically connected to the impurity regions are formed. Note that these wirings are formed by patterning a laminated film of a Ti film having a thickness of 50 nm and an alloy film (alloy film of Al and Ti) having a thickness of 500 nm. (Fig. 8 (A))
[0090]
In the pixel portion 507, a pixel electrode 470, a gate wiring 469, and a connection electrode 468 are formed. With this connection electrode 468, the source wiring (stacked layer of 443a and 443b) is electrically connected to the pixel TFT. In addition, the gate wiring 469 is electrically connected to the gate electrode of the pixel TFT. In addition, the pixel electrode 470 is electrically connected to the drain region 442 of the pixel TFT and further electrically connected to the semiconductor layer 458 functioning as one electrode forming a storage capacitor. Further, as the pixel electrode 470, it is desirable to use a highly reflective material such as a film containing Al or Ag as a main component or a laminated film thereof.
[0091]
Subsequently, laser light irradiation is performed from the back side of the substrate disclosed in the present invention to sufficiently recover the crystallinity of the semiconductor film, activate the impurity elements, and reduce the contact resistance. Further, the substrate may be heated to about 500 degrees when irradiating with laser light. By doing so, it becomes possible to perform laser light irradiation with a smaller energy density. As a result, the area of the laser beam on the irradiated surface can be increased and the throughput of the process can be improved.
[0092]
As described above, a CMOS circuit including an n-channel TFT 501 and a p-channel TFT 502, a driver circuit 506 having an n-channel TFT 503, and a pixel portion 507 having a pixel TFT 504 and a storage capacitor 505 are formed over the same substrate. can do. Thus, the active matrix substrate is completed.
[0093]
The n-channel TFT 501 of the driver circuit 506 includes a channel formation region 437, a low-concentration impurity region 436 (GOLD region) that overlaps with the first conductive layer 428a that forms part of the gate electrode, and a high-concentration function as a source region or a drain region. An impurity region 452 and an impurity region 451 into which an impurity element imparting n-type conductivity and an impurity element imparting p-type conductivity are introduced are provided. The p-channel TFT 502, which is connected to the n-channel TFT 501 and the electrode 466 to form a CMOS circuit, includes a channel formation region 440, a high-concentration impurity region 454 that functions as a source region or a drain region, and an impurity element that imparts n-type conductivity And an impurity region 453 into which an impurity element imparting p-type conductivity is introduced. In the n-channel TFT 503, a channel formation region 443, a low concentration impurity region 442 (GOLD region) overlapping with the first conductive layer 430a which forms part of the gate electrode, and a high concentration impurity functioning as a source region or a drain region The region 456 includes an impurity region 455 into which an impurity element imparting n-type conductivity and an impurity element imparting p-type conductivity are introduced.
[0094]
The pixel TFT 504 in the pixel portion is provided with a channel formation region 446, a low concentration impurity region 445 (LDD region) formed outside the gate electrode, a high concentration impurity region 458 functioning as a source region or a drain region, and an n-type. An impurity region 457 into which an impurity element and an impurity element imparting p-type conductivity are introduced is provided. In addition, an impurity element imparting n-type conductivity and an impurity element imparting p-type conductivity are added to the semiconductor layer functioning as one electrode of the storage capacitor 505. The storage capacitor 505 is formed of an electrode (stack of 432a and 432b) and a semiconductor layer using the insulating film 416 as a dielectric.
[0095]
In the pixel structure of this embodiment, the end portions of the pixel electrodes are arranged and formed so as to overlap the source wiring so that the gap between the pixel electrodes is shielded from light without using a black matrix.
[0096]
Further, FIG. 9 shows a top view of a pixel portion of an active matrix substrate manufactured in this embodiment. In addition, the same code | symbol is used for the part corresponding to FIGS. A chain line AA ′ in FIG. 8B corresponds to a cross-sectional view taken along the chain line AA ′ in FIG.
Further, a chain line BB ′ in FIG. 8B corresponds to a cross-sectional view taken along the chain line BB ′ in FIG.
[0097]
Note that this embodiment can be freely combined with any one of Embodiments 1 to 3.
[0098]
[Example 5]
In this embodiment, a process of manufacturing a reflective liquid crystal display device from the active matrix substrate manufactured in Embodiment 4 will be described below. FIG. 10 is used for the description.
[0099]
First, after obtaining an active matrix substrate in the state of FIG. 8B according to Embodiment 4, an alignment film 567 is formed on at least the pixel electrode 470 on the active matrix substrate of FIG. . In this embodiment, before forming the alignment film 567, an organic resin film such as an acrylic resin film is patterned to form columnar spacers 572 for maintaining a substrate interval at a desired position. Further, instead of the columnar spacers, spherical spacers may be scattered over the entire surface of the substrate.
[0100]
Next, a counter substrate 569 is prepared. Next, colored layers 570 and 571 and a planarization film 573 are formed over the counter substrate 569. The red colored layer 570 and the blue colored layer 572 are overlapped to form a light shielding portion. Further, the light shielding portion may be formed by partially overlapping the red colored layer and the green colored layer.
[0101]
In this example, the substrate shown in Example 4 is used. Therefore, in FIG. 9 showing a top view of the pixel portion of Example 4, at least the gap between the gate wiring 469 and the pixel electrode 470, the gap between the gate wiring 469 and the connection electrode 468, and the gap between the connection electrode 468 and the pixel electrode 470 are shown. It is necessary to shield the light. In this example, the respective colored layers were arranged so that the light-shielding portions formed by the lamination of the colored layers overlapped at the positions where light shielding should be performed, and the counter substrate was bonded.
[0102]
As described above, the number of steps can be reduced by shielding the gap between the pixels with the light shielding portion formed by the lamination of the colored layers without forming a light shielding layer such as a black mask.
[0103]
Next, a counter electrode 576 made of a transparent conductive film was formed over the planarization film 573 in at least the pixel portion, an alignment film 574 was formed over the entire surface of the counter substrate, and a rubbing process was performed.
[0104]
Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are attached to each other with a sealant 568. A filler is mixed in the sealing material 568, and two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material 575 is injected between both substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used for the liquid crystal material 575. In this way, the reflective liquid crystal display device shown in FIG. 10 is completed. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Further, a polarizing plate (not shown) was attached only to the counter substrate. And FPC was affixed using the well-known technique.
[0105]
In addition, this embodiment can be freely combined with any one of Embodiments 1 to 4, and the liquid crystal display panel manufactured as described above can be used as a display portion of various electronic devices.
[0106]
[Example 6]
In this embodiment, a process for manufacturing an active matrix liquid crystal display device different from that in Embodiment 5 from the active matrix substrate manufactured in Embodiment 4 will be described below. FIG. 11 is used for the description.
[0107]
First, in accordance with Embodiment 4, after obtaining an active matrix substrate in the state of FIG. 8B, an alignment film 1067 is formed on the active matrix substrate of FIG. 8B and a rubbing process is performed. Note that in this embodiment, before forming the alignment film 1067, columnar spacers for maintaining the distance between the substrates are formed at desired positions by patterning an organic resin film such as an acrylic resin film. Further, instead of the columnar spacers, spherical spacers may be scattered over the entire surface of the substrate.
[0108]
Next, a counter substrate 1068 is prepared. The counter substrate is provided with a color filter in which a colored layer 1074 and a light shielding layer 1075 are arranged corresponding to each pixel. Further, a light shielding layer 1077 is also provided in the driver circuit portion. A planarizing film 1076 covering the color filter and the light shielding layer 1077 is provided. Next, a counter electrode 1069 made of a transparent conductive film was formed over the planarization film 1076 in the pixel portion, an alignment film 1070 was formed over the entire surface of the counter substrate, and a rubbing process was performed.
[0109]
Then, the active matrix substrate on which the pixel portion and the driver circuit are formed and the counter substrate are attached to each other with a sealant 1071. A filler is mixed in the sealant 1071, and two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material 1073 is injected between both substrates and completely sealed with a sealant (not shown). A known liquid crystal material may be used for the liquid crystal material 1073. Thus, the active matrix type liquid crystal display device shown in FIG. 11 is completed. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Furthermore, a polarizing plate or the like was appropriately provided using a known technique. And FPC was affixed using the well-known technique.
[0110]
In addition, this embodiment can be freely combined with any one of Embodiments 1 to 4, and the liquid crystal display panel manufactured as described above can be used as a display portion of various electronic devices.
[0111]
[Example 7]
The CMOS circuit and the pixel portion formed by applying the present invention can be used for various electro-optical devices (such as active matrix liquid crystal display devices). That is, the present invention can be implemented in all electronic devices in which these electro-optical devices are incorporated in the display unit.
[0112]
Such electronic devices include video cameras, digital cameras, projectors, head-mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.), etc. Can be mentioned. Examples of these are shown in FIGS.
[0113]
FIG. 12A illustrates a personal computer, which includes a main body 3001, an image input portion 3002, a display portion 3003, a keyboard 3004, and the like. The display portion 3003 can be manufactured by applying the present invention.
[0114]
FIG. 12B illustrates a video camera, which includes a main body 3101, a display portion 3102, an audio input portion 3103, operation switches 3104, a battery 3105, an image receiving portion 3106, and the like. The display portion 3102 can be manufactured by applying the present invention.
[0115]
FIG. 12C illustrates a mobile computer, which includes a main body 3201, a camera unit 3202, an image receiving unit 3203, an operation switch 3204, a display unit 3205, and the like. The display portion 3205 can be manufactured by applying the present invention.
[0116]
FIG. 12D illustrates a goggle type display, which includes a main body 3301, a display portion 3302, an arm portion 3303, and the like. The display portion 3302 can be manufactured by applying the present invention.
[0117]
FIG. 12E shows a player that uses a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 3401, a display portion 3402, a speaker portion 3403, a recording medium 3404, an operation switch 3405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet. The display portion 3402 can be manufactured by applying the present invention.
[0118]
FIG. 12F illustrates a digital camera, which includes a main body 3501, a display portion 3502, an eyepiece portion 3503, an operation switch 3504, an image receiving portion (not shown), and the like. The display portion 3502 can be manufactured by applying the present invention.
[0119]
FIG. 13A illustrates a front projector, which includes a projection device 3601, a screen 3602, and the like. The present invention can be applied to a liquid crystal display device 3808 constituting a part of the projection device 3601 and other driving circuits.
[0120]
FIG. 13B illustrates a rear projector, which includes a main body 3701, a projection device 3702, a mirror 3703, a screen 3704, and the like. The present invention can be applied to the liquid crystal display device 3808 constituting a part of the projection device 2702 and other driving circuits.
[0121]
Note that FIG. 13C is a diagram illustrating an example of the structure of the projection devices 3601 and 3702 in FIGS. 13A and 13B. The projection devices 3601 and 3702 include a light source optical system 3801, mirrors 3802 and 3804 to 3806, a dichroic mirror 3803, a prism 3807, a liquid crystal display device 3808, a phase difference plate 3809, and a projection optical system 3810. Projection optical system 2810 includes an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0122]
FIG. 13D illustrates an example of the structure of the light source optical system 3801 in FIG. In this embodiment, the light source optical system 3801 includes a reflector 2811, a light source 3812, lens arrays 3813 and 3814, a polarization conversion element 2815, and a condenser lens 3816. Note that the light source optical system illustrated in FIG. 13D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0123]
However, the projector shown in FIG. 13 shows a case where a transmissive electro-optical device is used, and an application example in a reflective electro-optical device is not shown.
[0124]
FIG. 14A shows a cellular phone, which includes a main body 3901, an audio output portion 3902, an audio input portion 3903, a display portion 3904, operation switches 3905, an antenna 3906, and the like. The present invention can be applied to the display portion 3904.
[0125]
FIG. 14B illustrates a portable book (electronic book), which includes a main body 4001, display portions 4002 and 4003, a storage medium 4004, operation switches 4005, an antenna 4006, and the like. The present invention can be applied to the display portions 4002 and 4003.
[0126]
FIG. 14C illustrates a display device, which includes a main body 4101, a support base 4102, a display portion 4103, and the like. The present invention can be applied to the display portion 4103. The display device of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display device having a diagonal of 10 inches or more (particularly 30 inches or more).
[0127]
As described above, the application range of the present invention is extremely wide and can be applied to electronic devices in various fields. Moreover, the electronic device of a present Example is realizable even if it uses the structure which consists of what combination of Examples 1-6.
【Effect of the invention】
By adopting the configuration of the present invention, the following basic significance can be obtained.
(A) It is possible to sufficiently recover the crystallinity of the semiconductor film after the doping treatment, activate the impurity element, and reduce the contact resistance after forming the wiring.
(B) Conventionally, two processes, a heat treatment after doping treatment and a heat treatment after wiring formation, which are conventionally performed, are performed in one process of irradiating laser light from the back side of the substrate after wiring formation. It is possible to reduce the number of processes. Thereby, the manufacturing cost can be reduced and the manufacturing yield can be improved.
(C) It is a method by which a TFT having excellent electrical characteristics can be manufactured while satisfying the above advantages.
[Brief description of the drawings]
FIGS. 1A to 1C illustrate an example of a method for manufacturing a TFT of the present invention. FIGS.
FIG. 2A is a graph showing transmittance with respect to wavelength of a 1737 glass substrate.
(B) The figure which shows the transmittance | permeability with respect to the wavelength of a synthetic quartz glass substrate.
FIG. 3A is a graph showing transmittance with respect to wavelength of an amorphous silicon film.
(B) The figure which shows the transmittance | permeability with respect to the wavelength of a crystalline silicon film.
4A to 4C illustrate an example of a method for manufacturing a TFT of the present invention.
FIG. 5 illustrates an example of a method for manufacturing a TFT of the present invention.
FIG. 6 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 7 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 8 is a cross-sectional view illustrating a manufacturing process of a pixel TFT and a TFT of a driver circuit.
FIG. 9 is a top view illustrating a pixel in a pixel portion.
FIG. 10 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.
FIG. 11 is a cross-sectional view illustrating a manufacturing process of an active matrix liquid crystal display device.
FIG. 12 illustrates an example of a semiconductor device.
FIG 13 illustrates an example of a semiconductor device.
FIG 14 illustrates an example of a semiconductor device.

Claims (22)

On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
A step of selectively introducing an impurity element into the semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Crystallizing the semiconductor film by heat treatment;
Selectively introducing an impurity element into the crystallized semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Introducing a metal element into the semiconductor film;
Crystallizing the semiconductor film by heat treatment;
Selectively introducing an impurity element into the crystallized semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
A step of selectively introducing an impurity element into the semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Crystallization of the semiconductor film by a first heat treatment;
Selectively introducing an impurity element into the crystallized semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by a second heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Introducing a metal element into the semiconductor film;
Crystallization of the semiconductor film by a first heat treatment;
Selectively introducing an impurity element into the crystallized semiconductor film to form a channel formation region overlapping with the first conductive layer, and a source region and a drain region made of the impurity region;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by a second heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
By selectively introducing an impurity element into the semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second impurity region Forming a source region and a drain region comprising:
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Crystallizing the semiconductor film by heat treatment;
An impurity element is selectively introduced into the crystallized semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second Forming a source region and a drain region made of a plurality of impurity regions;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Introducing a metal element into the semiconductor film;
Crystallizing the semiconductor film by heat treatment;
An impurity element is selectively introduced into the crystallized semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second Forming a source region and a drain region made of a plurality of impurity regions;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
By selectively introducing an impurity element into the semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second impurity region Forming a source region and a drain region comprising:
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Crystallization of the semiconductor film by a first heat treatment;
An impurity element is selectively introduced into the crystallized semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second Forming a source region and a drain region made of a plurality of impurity regions;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by a second heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: On a substrate, an element selected from Ta, W, Ti, Mo, Al, Cu, Cr, and Nd, an alloy material containing the element as a main component, a compound material containing the element as a main component, or an AgPdCu alloy Forming a first conductive layer using any of them ;
Forming a first insulating film on the first conductive layer;
Forming a semiconductor film on the first conductive layer via the first insulating film;
Introducing a metal element into the semiconductor film;
Crystallization of the semiconductor film by a first heat treatment;
An impurity element is selectively introduced into the crystallized semiconductor film, a channel formation region overlapping with the first conductive layer, a first impurity region overlapping with part of the first conductive layer, and a second Forming a source region and a drain region made of a plurality of impurity regions;
Forming a second insulating film on the semiconductor film into which the impurity element is selectively introduced;
Hydrogenating the semiconductor film by a second heat treatment;
Etching the second insulating film partially to expose a part of the source region and the drain region;
Forming a second conductive layer in contact with a part of the source region or the drain region;
Irradiating a contact portion between the semiconductor film and the semiconductor film and the second conductive layer from the back side of the substrate with a YAG laser modulated to a second harmonic;
A method for manufacturing a semiconductor device, comprising: In any one of Claims 1 thru | or 12 ,
A method for manufacturing a semiconductor device, characterized in that the shape of the irradiation surface of the YAG laser modulated into the second harmonic or the vicinity thereof is linear. In any one of Claims 1 thru | or 12 ,
The method for manufacturing a semiconductor device, wherein the semiconductor film is a film containing silicon as a main component. In any one of claims 1 to 12 and claim 29,
A method for manufacturing a semiconductor device, wherein the semiconductor film has a thickness of 25 to 100 nm. In any one of Claims 1 thru | or 12 ,
The impurity element in the source region and the drain region is an impurity element imparting n-type conductivity, an impurity element imparting p-type, or an impurity element imparting n-type and an impurity element imparting p-type. A method for manufacturing a semiconductor device. In any one of Claims 1 to 12 and Claim 16 ,
The method for manufacturing a semiconductor device, wherein the concentration of the impurity element in each of the source region and the drain region is 2 × 10 ²⁰ / cm ³ or less. In any one of Claims 1 thru | or 12 ,
A method for manufacturing a semiconductor device, wherein the temperature of the substrate is set to 0 to 500 degrees in the step of irradiating the YAG laser modulated to the second harmonic from the back side of the substrate. Claim 3 or claim 6 or claim 9 or Oite to claim 1 2,
The metal element is one or more elements selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, Ag, Au, Sn, and Sb. Device fabrication method. In any one of Claims 1 thru | or 12 ,
A method for manufacturing a semiconductor device, wherein the substrate is heated in the step of irradiating a YAG laser modulated to the second harmonic from the back side of the substrate. In any one of Claims 1 thru | or 12 ,
Forming a pixel electrode in contact with a part of the drain region on the second insulating film;
In the step of forming the first conductive layer, a source wiring is formed together with the first conductive layer,
In the step of forming the second conductive layer, the second conductive layer is formed in contact with a part of the source region and the source wiring,
A method for manufacturing a semiconductor device, wherein an end portion of the pixel electrode is disposed so as to overlap with the source wiring. In any one of Claims 1 thru | or 12 ,
A method for manufacturing a semiconductor device, characterized in that a light-shielding portion is provided by forming a first colored layer and a second colored layer on a counter substrate to be bonded to the substrate.

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