JP4766758B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device using a gettering technique and a semiconductor device obtained by the manufacturing method. In particular, the present invention relates to a method for manufacturing a semiconductor device using a crystalline semiconductor film manufactured by adding a metal element having a catalytic action in crystallization of a semiconductor film, and the semiconductor device.
[0002]
Note that in this specification, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.
[0003]
[Prior art]
As a typical semiconductor element using a semiconductor film having a crystal structure (hereinafter referred to as a crystalline semiconductor film), a thin film transistor (hereinafter referred to as a TFT) is known. TFT is attracting attention as a technique for forming an integrated circuit on an insulating substrate such as glass, and a drive circuit integrated liquid crystal display device or the like is being put into practical use. In a conventional technique, a crystalline semiconductor film is obtained by heating an amorphous semiconductor film deposited by a plasma CVD method or a low pressure CVD method by a heat treatment or a laser annealing method (a technique for crystallizing a semiconductor film by laser light irradiation). Have been made.
[0004]
The crystalline semiconductor film thus manufactured is an aggregate of a large number of crystal grains, and the crystal orientation is oriented in an arbitrary direction and cannot be controlled, which is a factor that limits the characteristics of the TFT. With respect to such problems, the technique disclosed in Japanese Patent Laid-Open No. 7-183540 is a technique for producing a crystalline semiconductor film by adding a metal element having a catalytic action to crystallization of a semiconductor film such as nickel. In addition to the effect of reducing the heating temperature required for crystallization, it is possible to increase the orientation of crystal orientation in a single direction. When a TFT is formed using such a crystalline semiconductor film, not only the field effect mobility is improved, but also the subthreshold coefficient (S value) is reduced, and the electrical characteristics can be dramatically improved. .
[0005]
However, since a metal element having a catalytic action is added, the metal element remains in the film of the crystalline semiconductor film or on the surface of the film, and there is a problem that the characteristics of the obtained element are varied. As an example, there is a problem that an off current increases in a TFT and varies between individual elements. That is, a metal element having a catalytic action for crystallization becomes unnecessary once a crystalline semiconductor film is formed.
[0006]
Gettering using phosphorus is effectively used as a technique for removing such a metal element from a specific region of a crystalline semiconductor film. For example, the metal element can be easily removed from the channel formation region by adding phosphorus to the source / drain region of the TFT and performing heat treatment at 450 to 700 ° C.
[0007]
[Problems to be solved by the invention]
Phosphorus is an ion doping method (PH _Three This is a method in which ions are dissociated with plasma and ions are accelerated by an electric field and injected into a semiconductor. Basically, ions are not separated by mass). The phosphorus concentration required for ²⁰ /cm ^Three That's it. Addition of phosphorus by the ion doping method results in the amorphous state of the crystalline semiconductor film, but an increase in the phosphorus concentration poses a problem because it hinders recrystallization by subsequent annealing. Further, the addition of high-concentration phosphorus is problematic because it increases the processing time required for doping and decreases the throughput in the doping process.
[0008]
Furthermore, the concentration of boron necessary to invert the conductivity type of phosphorus added to the source / drain regions of the p-channel TFT must be 1.5 to 3 times, which makes recrystallization difficult. As a result, the resistance of the source / drain regions is increased, which is a problem.
[0009]
The present invention is a means for solving such problems, and effectively removes the metal element remaining in the crystalline semiconductor film obtained by using a metal element having a catalytic action for crystallization of the semiconductor film. It aims at providing the technology to do.
[0010]
[Means for Solving the Problems]
The gettering technique is positioned as a main technique in the manufacturing technique of an integrated circuit using a single crystal silicon wafer. Gettering is known as a technique for reducing the impurity concentration of an active region of an element by segregating metal impurities taken into a semiconductor to gettering sites with some energy. It is roughly divided into extrinsic gettering and intrinsic gettering. The extrinsic gettering provides a gettering effect by applying a strain field and chemical action from the outside. A ring getter that diffuses high-concentration phosphorus from the back surface of a single crystal silicon wafer corresponds to this, and gettering using phosphorus for the above-described crystalline semiconductor film can also be regarded as a kind of extrinsic gettering.
[0011]
On the other hand, intrinsic gettering is known as utilizing a strain field of lattice defects involving oxygen generated inside a single crystal silicon wafer. The present invention pays attention to intrinsic gettering using such lattice defects or lattice distortions, and adopts the following means to apply to a crystalline semiconductor film having a thickness of about 10 to 100 nm. It is.
[0012]
The present invention includes a step of forming a first semiconductor film having a crystal structure on a silicon nitride film using a metal element, a step of forming a film (barrier layer) serving as an etching stopper, and a step including a rare gas element. A step of forming a second semiconductor film (gettering site), a step of gettering a metal element at the gettering site, and a step of removing the second semiconductor film.
[0013]
In the step of forming the second semiconductor film containing a rare gas element (gettering site), a semiconductor film having an amorphous structure or a crystal structure is formed, and then the rare gas element is added to the semiconductor film. Good. As a method for adding a rare gas element, an ion doping method or an ion implantation method may be used.
[0014]
Further, the rare gas element is one or a plurality selected from He, Ne, Ar, Kr, and Xe. By accelerating these ions with an electric field and injecting them into the semiconductor film, dangling bonds and lattice distortion can be obtained. It can be formed to form a gettering site.
[0015]
As another means for forming the second semiconductor film (gettering site) containing a rare gas element, the plasma CVD method using a source gas containing the rare gas element or the low pressure thermal CVD method contains the rare gas element. A second semiconductor film may be formed. However, film forming conditions are adjusted so that film peeling does not occur.
[0016]
As another means, a second semiconductor film containing a rare gas element may be formed by a sputtering method.
[0017]
In addition, after obtaining a second semiconductor film containing a rare gas element in the film formation stage by using a plasma CVD method, a low pressure thermal CVD method, a sputtering method, or the like, a rare gas element is further added to improve gettering efficiency. May be.
[0018]
In addition to rare gas elements, H, H ₂ , O, O ₂ , One or more selected from P may be added. Thus, a gettering effect is synergistically obtained by adding a plurality of elements. Above all, O, O ₂ Is effective, and the oxygen concentration in the SIMS analysis in the second semiconductor film is set to 5 × 10 5 by the film formation condition or addition after film formation. ¹⁸ / Cm ^Three Or more, preferably 1 × 10 ¹⁹ / Cm ^Three ~ 1x10 ^{twenty two} / Cm ^Three If the concentration range is within this range, gettering efficiency is improved. Note that the rare gas element hardly diffuses, but in the case where other elements added in addition to the rare gas element easily diffuse, the thickness of the second semiconductor film is adjusted so that the other elements added later It is preferable not to diffuse into the first semiconductor film by this heat treatment. In addition to the second semiconductor film, the barrier layer also has a function of preventing diffusion of other elements.
[0019]
In addition, the present invention is characterized in that gettering efficiency is improved by using an insulating film made of a silicon nitride film having a thickness of 10 nm or less as the base insulating film in contact with the first semiconductor film having a crystal structure. This silicon nitride film also has a blocking effect.
[0020]
The configuration of the invention disclosed in this specification is as follows.
A first step of forming an electrode on an insulating surface;
A second step of forming a flat first insulating film on the electrode;
A third step of forming a second insulating film made of a silicon nitride film on the first insulating film;
A fourth step of forming a first semiconductor film having an amorphous structure on the second insulating film;
A fifth step of adding a metal element to the first semiconductor film;
A sixth step of crystallizing the first semiconductor film to form a first semiconductor film having a crystal structure;
A seventh step of forming a barrier layer on the surface of the first semiconductor film having the crystal structure;
1 × 10 of rare gas element on the barrier layer ¹⁹ ~ 1x10 ^{twenty two} / Cm ^Three An eighth step of forming a second semiconductor film containing at a concentration of
A ninth step of gettering the metal element to the second semiconductor film to remove or reduce the metal element in the first semiconductor film having a crystal structure;
A method for manufacturing a semiconductor device, comprising: a tenth step of removing the second semiconductor film and the barrier layer.
[0021]
In the above structure, the metal element is one or more selected from Fe, Ni, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
[0022]
In the above structure, the oxygen concentration in the first semiconductor film is set to 5 × 10 5 in order to improve gettering efficiency. ¹⁸ / Cm ^Three The following is preferable.
[0023]
In the above structure, the oxygen concentration contained in the second semiconductor film is set to 5 × 10 5 in order to improve gettering efficiency. ¹⁸ / Cm ^Three The above is preferable.
[0024]
In the above structure, the second insulating film is preferably a silicon nitride film in order to improve gettering efficiency.
[0025]
In each of the above configurations, a known technique for improving flatness, for example, a polishing process called CMP (Chemical Mechanical Polishing) may be used as the second process for forming the flat first insulating film.
[0026]
Note that in each of the above structures, the electrode is provided to shield external light applied to the semiconductor film having a crystal structure after the semiconductor device is finally completed.
[0027]
In each of the above configurations, the sixth step includes heat treatment, irradiation with intense light, or laser light (excimer laser light having a wavelength of 400 nm or less, second harmonic and third harmonic of a YAG laser). One of the irradiation processes is one process, or a combination of these processes.
[0028]
In each of the above structures, the seventh step of forming the barrier layer is a step of oxidizing the surface of the semiconductor film having the crystal structure with a solution containing ozone, or the crystal structure by irradiation with ultraviolet rays in an oxygen atmosphere. What is necessary is just to make it the process which is a process of oxidizing the surface of the semiconductor film which has this.
[0029]
In each of the above structures, the ninth step may use heat treatment or treatment for irradiating the semiconductor film having an amorphous structure with strong light. Further, the ninth step may be a process of performing a heat treatment and irradiating the semiconductor film having the amorphous structure with strong light.
[0030]
Further, the intense light is light emitted from a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp.
[0031]
Further, the present invention is not limited to the above structure, and a gettering site may be formed by adding a rare gas element only to the upper layer of the second semiconductor film. Alternatively, the third semiconductor film may be formed over the second semiconductor film that does not contain a rare gas element, and the gettering site may be formed by adding the rare gas element only to the third semiconductor film.
[0032]
According to the present invention relating to the above manufacturing method, the following configuration is obtained.
[0033]
The configuration of the invention disclosed in this specification is as follows.
A first electrode on the insulating surface, a flat first insulating film on the first electrode, a second insulating film made of a silicon nitride film on the first insulating film, and a semiconductor layer on the second insulating film And a third insulating film on the semiconductor layer, and a second electrode on the third insulating film,
The first electrode is overlapped with the semiconductor layer with the first insulating film and the second insulating film interposed therebetween, and the second electrode is connected to the semiconductor layer with the third insulating film interposed therebetween. The semiconductor device is characterized by overlapping.
[0034]
In the above structure, the first insulating film is a mechanically polished and planarized insulating film.
[0035]
In the above structure, a region of the semiconductor layer that overlaps the second electrode with the third insulating film interposed therebetween is a channel formation region. The concentration of the metal element contained in the channel formation region is 1 × 10 ¹⁷ / Cm ^Three It is characterized by being less than.
[0036]
The metal element contained in the channel formation region is one or more selected from Fe, Co, Ni, Ru, Rh, Pd, Os, Ir, Pt, Cu, and Au.
[0037]
In the above structure, the semiconductor layer contains a rare gas element at least partially. However, depending on the gettering conditions, a rare gas element may not be included.
[0038]
In addition, after sputtering nickel element on the insulating film made of a silicon nitride film, a first semiconductor film is formed, a barrier layer is provided, and a second semiconductor film containing a rare gas element is formed. The first semiconductor film may be crystallized and gettered simultaneously by heat treatment or strong light.
[0039]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
[0040]
One of the features of the present invention is a process for forming an electrode on an insulating surface, a process for forming a flat first insulating film covering the electrode, and a second process comprising a silicon nitride film on the first insulating film. A process for forming the insulating film, a process for forming a crystalline semiconductor film on the second insulating film using a metal element that promotes crystallization, a process for forming a barrier layer on the crystalline semiconductor film, A process of forming a semiconductor film containing a rare gas element (gettering site) on the barrier layer and a process of heat treatment, and the metal element contained in the crystalline semiconductor film is moved by the heat treatment; The metal element is removed or reduced from the crystalline semiconductor film by passing through the barrier layer and captured by a gettering site (a semiconductor film containing ions of a rare gas element). Note that strong light may be irradiated instead of the heat treatment, or strong light may be irradiated simultaneously with the heat treatment.
[0041]
(Embodiment 1)
A typical TFT manufacturing procedure will be briefly described below with reference to FIGS.
[0042]
In FIG. 1A, 100 is a substrate having an insulating surface, 101 is an electrode, 102 is a planarization film, 103 is an insulating film made of a silicon nitride film, and 104 is a semiconductor film having an amorphous structure.
[0043]
First, a conductive film is formed on the substrate 100 and patterned to form an electrode 101 made of metal or alloy. This electrode 101 is a scanning line connected to a gate electrode formed later. This electrode also functions as a light-shielding layer that protects an active layer formed later from light. Here, a quartz substrate is used as the substrate 100 here, and a stacked structure of a polysilicon film and a tungsten silicide (W—Si) film is used as the electrode 101.
[0044]
Next, an insulating film (an insulating film such as a silicon oxide film, a silicon nitride film, or a silicon oxynitride film) covering the electrode 101 is formed with a thickness of 100 to 1000 nm (typically 300 to 500 nm), and planarization is performed. A planarizing film 102 is formed. The planarizing film refers to an insulating film that has been subjected to planarization, and a known technique for improving planarity, for example, a polishing process called CMP (Chemical Mechanical Polishing) may be used.
[0045]
Next, an insulating film 103 made of a silicon nitride film is formed on the planarizing film. Next, a first semiconductor film 104 having an amorphous structure is formed over the insulating film 103. (Fig. 1 (A))
[0046]
Next, as a technique for crystallizing the first semiconductor film 104 having an amorphous structure, it is crystallized using a technique described in Japanese Patent Laid-Open No. 8-78329. The technology described in this publication forms a semiconductor film having a crystal structure that starts from an added region by selectively adding a metal element that promotes crystallization to an amorphous silicon film and performing heat treatment. Is. Here, a nickel-containing layer 105 is formed by applying a solution containing nickel over the first semiconductor film 104. (FIG. 1A) As a means other than the method for forming the nickel-containing layer 105 by coating, a means for forming an extremely thin film by sputtering, vapor deposition, or plasma treatment may be used.
[0047]
Next, crystallization is performed by heat treatment or irradiation with intense light. In this case, crystallization forms silicide in the portion of the semiconductor film in contact with the metal element serving as a catalyst, and the crystallization proceeds using the silicide as a nucleus. Thus, the first semiconductor film 106 having the crystal structure illustrated in FIG. 1C is formed. Note that the concentration of oxygen contained in the first semiconductor film 106 is 5 × 10 5. ¹⁸ / Cm ^Three The following is desirable. Here, after heat treatment for dehydrogenation (450 ° C., 1 hour), heat treatment for crystallization (550 to 650 ° C. for 4 to 24 hours) is performed. When crystallization is performed by irradiation with strong light, any one of infrared light, visible light, ultraviolet light, or a combination thereof can be used. Typically, a halogen lamp, a metal halide, or the like is used. Light emitted from a lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, or high pressure mercury lamp is used. The lamp light source is turned on for 1 to 60 seconds, preferably 30 to 60 seconds, and this is repeated 1 to 10 times, and the semiconductor film is instantaneously heated to about 600 to 1000 ° C. Note that if necessary, heat treatment for releasing hydrogen contained in the first semiconductor film 104 having an amorphous structure may be performed before irradiation with strong light. In addition, crystallization may be performed by simultaneously performing heat treatment and irradiation with strong light.
[0048]
Next, the first semiconductor film 106 having a crystal structure is irradiated with a laser beam in order to increase the crystallization rate (the ratio of the crystal component in the entire volume of the film) and repair defects remaining in the crystal grains. It is desirable. As the light, excimer laser light having a wavelength of 400 nm or less, and second and third harmonics of a YAG laser are used.
[0049]
Next, a barrier layer 107 made of an extremely thin oxide film is formed with an ozone-containing aqueous solution, and a second semiconductor film 108 is formed on the barrier layer 107. (FIG. 1D) This barrier layer 107 functions as an etching stopper when only the second semiconductor film 108 is selectively removed in a later step. The oxygen concentration contained in the second semiconductor film 108 is 5 × 10 5. ¹⁸ / Cm ^Three It is desirable to set it above. The second semiconductor film 108 may be a semiconductor film having an amorphous structure or a semiconductor film having a crystal structure.
[0050]
Next, a rare gas element is added to the second semiconductor film 108 by an ion doping method or an ion implantation method to form a gettering site. (FIG. 1E) As the rare gas element, one or more selected from helium (He), neon (Ne), argon (Ar), krypton (Kr), and xenon (Xe) are used. Here, in order to form a gettering site, these inert gases are used as an ion source and implanted into the second semiconductor film by an ion doping method or an ion implantation method. There are two meanings of implanting these inert gas ions. One is to form a dangling bond by implantation to give distortion to the semiconductor film, and the other is to give distortion by implanting the ions between the lattices of the semiconductor film. Ion implantation of an inert gas can satisfy both of these simultaneously, but the latter is particularly prominent when elements having a larger atomic radius than silicon, such as argon (Ar), krypton (Kr), and xenon (Xe), are used. It is done. Further, by injecting a rare gas element, not only lattice distortion but also dangling bonds are formed, contributing to the gettering action. Further, in the case where phosphorus, which is an impurity element of one conductivity type, is injected into a semiconductor film in addition to a rare gas element, gettering can be performed using the Coulomb force of phosphorus.
[0051]
In the step of FIG. 1E, it is desirable to maintain the film crystal structure of the first semiconductor as much as possible without adding a rare gas element to the lower layer.
[0052]
Next, gettering is performed. (FIG. 1 (F)) As a step of performing gettering, heat treatment may be performed in a nitrogen atmosphere at 450 to 800 ° C. for 1 to 24 hours, for example, 550 ° C. for 14 hours. Moreover, you may irradiate strong light instead of heat processing. Moreover, you may irradiate strong light in addition to heat processing. By this gettering, nickel moves in the direction of the arrow in FIG. 1F, and the metal element contained in the first semiconductor film 106 covered with the barrier layer 107 is removed or the concentration of the metal element is reduced. Done. Here, all the nickel is moved to the second semiconductor film 109 so that the nickel does not segregate to the first semiconductor film 106, and the nickel contained in the first semiconductor film 106 is hardly present, that is, the nickel concentration in the film is 1 ×. 10 ¹⁸ / Cm ^Three Below, desirably 1 × 10 ¹⁷ / Cm ^Three Getter enough to get:
[0053]
In this embodiment, since nickel tends to move to a region having a high oxygen concentration during the gettering, the insulating film 103 in contact with the first semiconductor film is a silicon nitride film, and the first semiconductor The oxygen concentration contained in the second semiconductor film 109 provided above the film is 5 × 10 5. ¹⁸ / Cm ^Three As described above, the gettering efficiency is improved.
[0054]
Next, using the barrier layer 107 as an etching stopper, only the second semiconductor film 109 is selectively removed, and then the barrier layer 107 is removed and the first semiconductor film 106 is formed using a known patterning technique. The semiconductor layer 110 having the shape is formed. (Fig. 2 (A))
[0055]
Next, after cleaning the surface of the semiconductor layer with an etchant containing hydrofluoric acid, an insulating film containing silicon as a main component and serving as the gate insulating film 111 is formed. The surface cleaning and the formation of the gate insulating film are desirably performed continuously without exposure to the atmosphere.
[0056]
Next, after cleaning the surface of the gate insulating film, the gate electrode 112 is formed. Although not shown here, a gate electrode 112 is formed after a contact hole for connecting to the electrode 101 is formed. Next, an impurity element imparting n-type conductivity (P, As, or the like) to the semiconductor, here phosphorus, is added as appropriate, so that the source region 113 and the drain region 114 are formed. After the addition, heat treatment, intense light irradiation, or laser light irradiation is performed to activate the impurity element. Simultaneously with activation, plasma damage to the gate insulating film and plasma damage to the interface between the gate insulating film and the semiconductor layer can be recovered. In particular, in an atmosphere of room temperature to 300 ° C., it is very effective to activate the impurity element by irradiating the second harmonic of the YAG laser from the front surface or the back surface. A YAG laser is a preferred activation means because it requires less maintenance.
[0057]
In the subsequent steps, the interlayer insulating film 116 is formed, hydrogenation is performed, contact holes reaching the source region and the drain region are formed, the source electrode 117 and the drain electrode 118 are formed, and the TFT is completed.
[0058]
The concentration of the metal element contained in the channel formation region 115 of the TFT thus obtained is 1 × 10 ¹⁷ / Cm ^Three Less than.
[0059]
In the above manufacturing method, when the second semiconductor film is thin and a rare gas element is also added to the first semiconductor film, the rare gas element is contained at least in the upper layer of the channel formation region 115. ing. Note that the depth at which the rare gas element exists can be freely determined by appropriately selecting conditions in the ion doping method or the ion implantation method.
[0060]
The present invention is not limited to the TFT structure shown in FIG. 2B. If necessary, a lightly doped drain (LDD) having an LDD region between a channel formation region and a drain region (or source region) is provided. ) Structure may be used. In this structure, a region to which an impurity element is added at a low concentration is provided between a channel formation region and a source region or a drain region formed by adding an impurity element at a high concentration, and this region is referred to as an LDD region. I'm calling. Further, a so-called GOLD (Gate-drain Overlapped LDD) structure in which an LDD region is disposed so as to overlap with a gate electrode through a gate insulating film may be employed.
[0061]
Although an n-channel TFT has been described here, it goes without saying that a p-channel TFT can be formed by using a p-type impurity element instead of an n-type impurity element.
[0062]
Although the top gate type TFT has been described as an example here, the present invention can be applied regardless of the TFT structure. For example, it can be applied to a bottom gate type (reverse stagger type) TFT or a forward stagger type TFT. Is possible.
[0063]
(Embodiment 2)
Alternatively, the second semiconductor film and the third semiconductor film may be formed over the barrier layer, and a gettering site may be formed by adding a rare gas element only to the third semiconductor film. Here, an example will be described with reference to FIG.
[0064]
The layers up to the barrier layer 307 are formed as in the first embodiment. In accordance with Embodiment Mode 1, an electrode 301, a planarization film 302, an insulating film 303 including a silicon nitride film, and a semiconductor film 306 having a crystal structure are formed over a substrate 300. Note that FIG. 3A corresponds to FIG. 1C. As in Embodiment Mode 1, crystallization is also performed using nickel.
[0065]
Next, a barrier layer 307 is formed as in Embodiment Mode 1. Next, a second semiconductor film 308 and a third semiconductor film 309 are formed over the barrier layer 307. (FIG. 3B) The second semiconductor film 308 includes oxygen (concentration of 5 × 10 5 in SIMS analysis). ¹⁸ / Cm ^Three Or more, preferably 1 × 10 ¹⁹ / Cm ^Three It is desirable to improve the gettering efficiency by containing the above.
[0066]
Next, a rare gas element is added to the third semiconductor film 309 to form the gettering site 310. (FIG. 3C) Note that a rare gas element is not added to the second semiconductor film 308 when a rare gas element is added. The second semiconductor film 308 provides an interval between the first semiconductor film 306 and the third semiconductor film (gettering site) 310. During gettering, metal elements tend to gather near the boundary of the gettering site, so that the boundary of the gettering site is separated from the first semiconductor film 306 by the second semiconductor film 308 as in this embodiment. It is desirable to keep away.
[0067]
In the subsequent steps, after gettering is performed as shown in FIG. 3D in accordance with Embodiment Mode 1, a semiconductor layer 311 is formed as shown in FIG. 3E to complete the TFT.
[0068]
The TFT thus obtained also has a metal element concentration of 1 × 10 5 contained in the channel formation region. ¹⁷ / Cm ^Three Less than.
[0069]
The present invention having the above-described configuration will be described in more detail with the following examples.
[0070]
(Example)
[Example 1]
In this embodiment, an example is shown in which an active matrix substrate in which a double gate TFT is used for a TFT in a pixel portion is applied to a double gate TFT.
[0071]
First, a conductive film is formed over the substrate 401 having an insulating surface, and the scanning lines 402 are formed by patterning. The scanning line 402 also functions as a light shielding layer that protects an active layer formed later from light. Here, a quartz substrate is used as the substrate 401, and a stacked structure of a polysilicon film (film thickness of 50 nm) and a tungsten silicide (W-Si) film (film thickness of 100 nm) is used as the scanning line 402. The polysilicon film protects the contamination from the tungsten silicide to the substrate.
[0072]
Next, insulating films 403a and 403b that cover the scanning lines 402 are formed to a thickness of 100 to 1000 nm (typically 300 to 500 nm). Here, after a silicon oxide film having a thickness of 100 nm using the CVD method and a silicon oxide film having a thickness of 280 nm using the LPCVD method are stacked, planarization treatment, here, CMP treatment is performed. After the planarization treatment, an insulating film (also referred to as a silicon nitride film) 403c made of a silicon nitride film is formed.
[0073]
Next, an amorphous semiconductor film is formed with a thickness of 10 to 100 nm. Here, an amorphous silicon film (amorphous silicon film) having a thickness of 69 nm is formed by LPCVD. Note that when a film is formed by the LPCVD method, a step of removing the film on the back surface side is necessary, but the description is omitted here for the sake of simplicity. Next, the amorphous semiconductor film was crystallized using the technique described in Japanese Patent Laid-Open No. 8-78329 as a technique for crystallizing the amorphous semiconductor film. The technique described in this publication forms a crystalline silicon film 200 that starts from an added region by selectively adding a metal element that promotes crystallization to an amorphous silicon film and performing heat treatment. It is. Here, nickel was used as a metal element for promoting crystallization, and after heat treatment for dehydrogenation (450 ° C., 1 hour), heat treatment for crystallization (600 ° C., 12 hours) was performed.
[0074]
Next, after a barrier layer 201 made of an extremely thin oxide film is formed on the surface of the crystalline silicon film 200 with a solution containing ozone, an amorphous silicon film 202 is formed on the oxide film, and the amorphous silicon film A rare gas element (Ar in this case) is added to the entire surface of 202 to form a gettering site for gettering Ni. (Fig. 4 (A))
[0075]
In addition to the rare gas element, one or more selected from Group 15 elements, Group 13 elements, silicon, oxygen, and hydrogen may be added.
[0076]
Next, a heat treatment (getting nitrogen at 550 ° C. for 4 hours) was performed to getter Ni from the region to be the active layer of the TFT. (FIG. 4B) By this heat treatment, the metal (Ni) contained in the crystalline silicon film moves from the region to be the active layer of the TFT in the direction of the arrow in FIG. The metal (Ni) is removed or reduced from the crystalline silicon film 200 by being captured by the element-added region.
[0077]
Next, after removing only the gettering site using the barrier layer as an etching stopper, the barrier layer is also removed.
[0078]
Next, patterning is performed to remove unnecessary portions of the crystalline silicon film, so that the semiconductor layer 404 is formed. Note that FIG. 4C2 is a top view of the pixel after the semiconductor layer 404 is formed. In FIG. 4C2, a cross-sectional view taken along the dotted line AA ′ corresponds to FIG.
[0079]
Next, in order to form a storage capacitor, a mask 405 is formed, and a part of the semiconductor layer (a region to be a storage capacitor) 406 is doped with phosphorus. (Fig. 5 (A))
[0080]
Next, after removing the mask 405 and forming an insulating film covering the semiconductor layer, the mask 407 is formed and the insulating film over the region 406 serving as a storage capacitor is removed. (Fig. 5 (B))
[0081]
Next, the mask 407 is removed, and thermal oxidation is performed to form an insulating film (gate insulating film) 408a. By this thermal oxidation, the final gate insulating film thickness was 80 nm. Note that an insulating film 408b thinner than other regions was formed over the region serving as the storage capacitor. (FIG. 5C1) A top view of the pixel here is shown in FIG. 5C2. In FIG. 5C2, a cross-sectional view taken along dotted line BB ′ corresponds to FIG. In addition, a region indicated by a chain line in FIG. 5 is a portion where a thin insulating film 408b is formed.
[0082]
Next, a channel doping process for adding a p-type or n-type impurity element at a low concentration to a region to be a channel region of the TFT was performed over the entire surface or selectively. This channel doping process is a process for controlling the TFT threshold voltage. Here, diborane (B ₂ H ₆ Boron was added by ion doping with plasma excitation without mass separation. Of course, an ion implantation method that performs mass separation may be used.
[0083]
Next, a mask 409 is formed over the insulating film 408a and the insulating films 403a and 403b, and a contact hole reaching the scanning line 402 is formed. (FIG. 6A) Then, after the contact hole is formed, the mask is removed.
[0084]
Next, a conductive film is formed and patterned to form the gate electrode 410 and the capacitor wiring 411. Here, a stacked structure of a phosphorus-doped silicon film (thickness 150 nm) and tungsten silicide (thickness 150 nm) was used. Note that the storage capacitor includes a capacitor wiring 411 and a part 406 of the semiconductor layer, with the insulating film 408b as a dielectric.
[0085]
Next, phosphorus is added at a low concentration in a self-aligning manner using the gate electrode 410 and the capacitor wiring 411 as a mask. (FIG. 6C1) A top view of the pixel here is shown in FIG. 6C2. In FIG. 6C2, a cross-sectional view taken along dotted line CC ′ corresponds to FIG. The concentration of phosphorus in this low concentration region is 1 × 10 ¹⁶ ~ 5x10 ¹⁸ atoms / cm ^Three , Typically 3 × 10 ¹⁷ ~ 3x10 ¹⁸ atoms / cm ^Three Adjust so that
[0086]
Next, a mask 412 is formed, phosphorus is added at a high concentration, and a high concentration impurity region 413 to be a source region or a drain region is formed. (FIG. 7A) The phosphorus concentration in this high-concentration impurity region is 1 × 10 ²⁰ ~ 1x10 ^{twenty one} atoms / cm ^Three (Typically 2 × 10 ²⁰ ~ 5x10 ²⁰ atoms / cm ^Three ). Note that in the semiconductor layer 404, a region overlapping with the gate electrode 410 becomes a channel formation region 414, and a region covered with the mask 412 becomes a low-concentration impurity region 415 and functions as an LDD region. Then, after the impurity element is added, the mask 412 is removed.
[0087]
Next, although not shown here, in order to form a p-channel TFT used for a driver circuit formed over the same substrate as the pixel, a region that becomes an n-channel TFT is covered with a mask, and boron is added to form a source region. Alternatively, a drain region is formed.
[0088]
Next, after the mask 412 is removed, a passivation film 416 that covers the gate electrode 410 and the capacitor wiring 411 is formed. Here, a silicon oxide film was formed with a thickness of 70 nm. Next, a heat treatment step for activating the n-type or p-type impurity element added to the semiconductor layer at each concentration is performed. Here, heat treatment was performed at 850 ° C. for 30 minutes.
[0089]
Next, an interlayer insulating film 417 made of an organic resin material is formed. Here, an acrylic resin film having a thickness of 400 nm was used. Next, after a contact hole reaching the semiconductor layer is formed, an electrode 418 and a source wiring 419 are formed. In this embodiment, the electrode 418 and the source wiring 419 are each a laminated film having a three-layer structure in which a Ti film is formed with a thickness of 100 nm, an aluminum film containing Ti is formed with a thickness of 300 nm, and a Ti film is formed with a thickness of 150 nm. Note that a cross-sectional view taken along dotted line DD ′ in FIG. 7B2 corresponds to FIG. 7B1.
[0090]
Next, after performing a hydrogenation process, an interlayer insulating film 420 made of acrylic is formed. (FIG. 8A1) Next, a light-shielding conductive film 100 nm is formed over the interlayer insulating film 420 to form a light-shielding layer 421. Next, an interlayer insulating film 422 is formed. Next, a contact hole reaching the electrode 418 is formed. Next, after forming a 100 nm transparent conductive film (here, indium tin oxide (ITO) film), patterning is performed to form pixel electrodes 423 and 424. In FIG. 8A2, a cross-sectional view taken along dotted line EE ′ corresponds to FIG.
[0091]
Thus, in the pixel portion, a pixel TFT composed of an n-channel TFT is formed while ensuring an area (aperture ratio 76.5%) of a display region (pixel size 26 μm × 26 μm), and a sufficient storage capacitor (51.5 fF) is formed. ) Can be obtained.
[0092]
Needless to say, the present embodiment is an example and is not limited to the steps of the present embodiment. For example, as each conductive film, an element selected from tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), chromium (Cr), silicon (Si), or an alloy in which the elements are combined A film (typically, a Mo—W alloy or a Mo—Ta alloy) can be used. As each insulating film, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or an organic resin material (polyimide, acrylic, polyamide, polyimide amide, BCB (benzocyclobutene), or the like) film can be used.
[0093]
As described above, a pixel portion having an n-channel TFT and a storage capacitor and a driving circuit (not shown) having a CMOS circuit made of an n-channel TFT and a p-channel TFT can be formed on the same substrate. it can. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
[0094]
Note that this embodiment can be combined with Embodiment Mode 1 or Embodiment Mode 2.
[0095]
[Example 2]
In this embodiment, a process for manufacturing a liquid crystal module from the active matrix substrate obtained in Embodiment 1 will be described below.
[0096]
An alignment film is formed on the active matrix substrate of FIG. 8 and a rubbing process is performed. In this embodiment, before the alignment film is formed, columnar spacers for maintaining the distance between the substrates are formed at desired positions by patterning an organic resin film such as an acrylic resin film. Further, instead of the columnar spacers, spherical spacers may be scattered over the entire surface of the substrate.
[0097]
Next, a counter substrate is prepared. The counter substrate is provided with a color filter in which a colored layer and a light shielding layer are arranged corresponding to each pixel. Further, a light shielding layer was also provided in the drive circuit portion. A flattening film covering the color filter and the light shielding layer was provided. Next, a counter electrode made of a transparent conductive film was formed on the planarizing film in the pixel portion, an alignment film was formed on the entire surface of the counter substrate, and a rubbing process was performed.
[0098]
Then, the active matrix substrate on which the pixel portion and the driving circuit are formed and the counter substrate are bonded together with a sealant. A filler is mixed in the sealing material, and two substrates are bonded to each other with a uniform interval by the filler and the columnar spacer. Thereafter, a liquid crystal material is injected between both substrates and completely sealed with a sealant. A known liquid crystal material may be used as the liquid crystal material. In this way, the liquid crystal module is completed. If necessary, the active matrix substrate or the counter substrate is divided into a desired shape. Furthermore, a polarizing plate or the like was appropriately provided using a known technique. And FPC was affixed using the well-known technique.
[0099]
The structure of the liquid crystal module thus obtained will be described with reference to the top view of FIG.
[0100]
The top view shown in FIG. 9 is a pixel portion, a driving circuit, an external input terminal 809 to which an FPC (Flexible Printed Circuit Board: Flexible Printed Circuit) 811 is attached, a wiring 810 for connecting the external input terminal to the input portion of each circuit, and the like. And an opposing substrate 800 provided with a color filter or the like are attached to each other with a sealant 807 interposed therebetween.
[0101]
A light shielding layer 803a is provided on the counter substrate side so as to overlap with the gate wiring side driving circuit 501a, and a light shielding layer 803b is formed on the counter substrate side so as to overlap with the source wiring side driving circuit 501b. In addition, the color filter 802 provided on the counter substrate side over the pixel portion 502 includes a light-shielding layer and a colored layer of each color of red (R), green (G), and blue (B) corresponding to each pixel. It has been. When actually displaying, a color display is formed with three colors of a red (R) colored layer, a green (G) colored layer, and a blue (B) colored layer. It shall be arbitrary.
[0102]
Here, the color filter 802 is provided on the counter substrate for colorization; however, there is no particular limitation, and the color filter may be formed on the active matrix substrate when the active matrix substrate is manufactured.
[0103]
In addition, a light-shielding layer is provided between adjacent pixels in the color filter to shield light other than the display area. Here, the light shielding layers 803a and 803b are also provided in the region covering the driver circuit. However, the region covering the driver circuit is covered with a cover when the liquid crystal display device is incorporated later as a display portion of an electronic device. It is good also as a structure which does not provide a light shielding layer. Further, when the active matrix substrate is manufactured, a light shielding layer may be formed on the active matrix substrate.
[0104]
Further, without providing the light-shielding layer, the light-shielding layer is appropriately disposed between the counter substrate and the counter electrode so as to be shielded from light by stacking a plurality of colored layers constituting the color filter. Or the drive circuit may be shielded from light.
[0105]
An FPC 811 made of a base film and wiring is bonded to the external input terminal with an anisotropic conductive resin. Furthermore, the mechanical strength is increased by the reinforcing plate.
[0106]
The liquid crystal module manufactured as described above can be used as a display portion of various electronic devices.
[0107]
Note that this embodiment can be combined with Embodiment Mode 1 or Embodiment Mode 2.
[0108]
[Example 3]
In Example 1 and Example 2, an example of a transmission type is shown, but in this example, an example of a reflection type is shown in FIG. In this embodiment, the pixel electrode connected to the drain region of the TFT in the pixel portion is a reflective electrode.
[0109]
The electrode 418 in Example 1 is used as a pixel electrode, and a reflective electrode 1000 that is to be a pixel electrode is formed. The reflective electrode is made of a highly reflective material such as a film containing Al or Ag as a main component or a laminated film thereof. Further, after forming the pixel electrode, it is preferable to increase the whiteness by adding a step such as a known sandblasting method or an etching method to make the surface uneven, thereby preventing specular reflection and scattering the reflected light. .
[0110]
Note that this embodiment can be combined with Embodiment Mode 1 or Embodiment Mode 2.
[0111]
[Example 4]
The TFT formed by implementing Embodiment 1 or Embodiment 2 can be used for various modules (liquid crystal display device, light-emitting display device, active matrix EC display, DMD (digital micromirror device), etc.). it can. That is, the present invention can be implemented in all electronic devices in which these modules are incorporated in the display unit.
[0112]
Such electronic devices include video cameras, digital cameras, head mounted displays (goggles type displays), car navigation systems, projectors, car stereos, personal computers, personal digital assistants (mobile computers, mobile phones, electronic books, etc.), etc. Can be mentioned. Examples of these are shown in FIGS.
[0113]
FIG. 11A illustrates a personal computer, which includes a main body 2001, an image input portion 2002, a display portion 2003, a keyboard 2004, and the like. The present invention can be applied to the display portion 2003.
[0114]
FIG. 11B shows a video camera, which includes a main body 2101, a display portion 2102, an audio input portion 2103, operation switches 2104, a battery 2105, an image receiving portion 2106, and the like. The present invention can be applied to the display portion 2102.
[0115]
FIG. 11C illustrates a mobile computer, which includes a main body 2201, a camera unit 2202, an image receiving unit 2203, operation switches 2204, a display unit 2205, and the like. The present invention can be applied to the display portion 2205.
[0116]
FIG. 11D shows a goggle type display, which includes a main body 2301, a display portion 2302, an arm portion 2303, and the like. The present invention can be applied to the display portion 2302.
[0117]
FIG. 11E shows a player using a recording medium (hereinafter referred to as a recording medium) on which a program is recorded, and includes a main body 2401, a display portion 2402, a speaker portion 2403, a recording medium 2404, an operation switch 2405, and the like. This player uses a DVD (Digital Versatile Disc), CD, or the like as a recording medium, and can perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 2402.
[0118]
FIG. 11F illustrates a digital camera, which includes a main body 2501, a display portion 2502, an eyepiece portion 2503, operation switches 2504, an image receiving portion (not shown), and the like. The present invention can be applied to the display portion 2502.
[0119]
FIG. 12A illustrates a front projector, which includes a projection device 2601, a screen 2602, and the like. The present invention can be applied to a liquid crystal module 2808 that constitutes a part of the projection device 2601.
[0120]
FIG. 12B illustrates a rear projector, which includes a main body 2701, a projection device 2702, a mirror 2703, a screen 2704, and the like. The present invention can be applied to the liquid crystal module 2808 that constitutes a part of the projection device 2702.
[0121]
FIG. 12C is a diagram showing an example of the structure of the projection devices 2601 and 2702 in FIGS. 12A and 12B. The projection devices 2601 and 2702 include a light source optical system 2801, mirrors 2802 and 2804 to 2806, a dichroic mirror 2803, a prism 2807, a liquid crystal module 2808, a retardation plate 2809, and a projection optical system 2810. Projection optical system 2810 includes an optical system including a projection lens. Although the present embodiment shows a three-plate type example, it is not particularly limited, and for example, a single-plate type may be used. Further, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the optical path indicated by an arrow in FIG. Good.
[0122]
FIG. 12D illustrates an example of the structure of the light source optical system 2801 in FIG. In this embodiment, the light source optical system 2801 includes a reflector 2811, a light source 2812, lens arrays 2813 and 2814, a polarization conversion element 2815, and a condenser lens 2816. Note that the light source optical system illustrated in FIG. 12D is an example and is not particularly limited. For example, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarization function, a film for adjusting a phase difference, or an IR film in the light source optical system.
[0123]
However, the projector shown in FIG. 12 shows a case where a transmissive electro-optical device is used, and an application example in a reflective electro-optical device and an EL module is not shown.
[0124]
FIG. 13A shows a mobile phone, which includes a main body 2901, an audio output portion 2902, an audio input portion 2903, a display portion 2904, operation switches 2905, an antenna 2906, an image input portion (CCD, image sensor, etc.) 2907, and the like. The present invention can be applied to the display portion 2904.
[0125]
FIG. 13B illustrates a portable book (electronic book), which includes a main body 3001, display portions 3002 and 3003, a storage medium 3004, operation switches 3005, an antenna 3006, and the like. The present invention can be applied to the display portions 3002 and 3003.
[0126]
FIG. 13C shows a display, which includes a main body 3101, a support base 3102, a display portion 3103, and the like. The present invention can be applied to the display portion 3103.
[0127]
As described above, the applicable range of the present invention is so wide that the present invention can be applied to methods for manufacturing electronic devices in various fields. Moreover, the electronic device of a present Example is realizable even if it uses the structure which consists of what combination of Examples 1-3.
[0128]
【The invention's effect】
As described above, intrinsic gettering performed by injecting a rare gas element into a semiconductor film in the present invention has an extremely high effect of gettering a metal element remaining in a crystalline semiconductor film. This not only contributes to high purity of the crystalline semiconductor film manufactured using a metal element having a catalytic action, but can also contribute to improvement of productivity of a semiconductor device using the crystalline semiconductor film. . That is, the rare gas element is an inert gas and can be easily handled in ion doping. Further, it has a feature that the time required for doping is short.
[Brief description of the drawings]
FIGS. 1A and 1B illustrate a manufacturing process of Embodiment 1. FIGS.
FIGS. 2A and 2B illustrate a manufacturing process of Embodiment 1. FIGS.
3A and 3B illustrate a manufacturing process of Embodiment 2.
FIGS. 4A and 4B are diagrams illustrating a manufacturing process of an active matrix substrate. FIGS.
FIGS. 5A and 5B are diagrams illustrating a manufacturing process of an active matrix substrate. FIGS.
FIGS. 6A and 6B are diagrams illustrating a manufacturing process of an active matrix substrate. FIGS.
FIGS. 7A and 7B are diagrams illustrating a manufacturing process of an active matrix substrate. FIGS.
FIGS. 8A to 8C are diagrams illustrating a manufacturing process of an active matrix substrate. FIGS.
FIG. 9 is a diagram illustrating an appearance of a liquid crystal module.
FIG. 10 is a cross-sectional view of an active matrix substrate.
FIG 11 illustrates an example of an electronic device.
FIG 12 illustrates an example of an electronic device.
FIG 13 illustrates an example of an electronic device.

Claims (16)

Forming an electrode on an insulating surface;
Forming a first insulating film on the electrode;
Forming a second insulating film on the first insulating film;
Forming a first silicon film having an amorphous structure on the second insulating film;
By adding Ni to the first silicon film having an amorphous structure and performing heat treatment, the first silicon film having the amorphous structure is crystallized by crystallizing the first silicon film having the amorphous structure. Forming a film,
Forming a barrier layer on the surface of the first silicon film having the crystal structure;
1 × 10 of rare gas element on the barrier layer ¹⁹ ~ 1x10 ²² / Cm ³ Forming a second silicon film containing at a concentration of
Gettering the Ni into the second silicon film to remove or reduce the Ni in the first silicon film having the crystal structure;
A method for manufacturing a semiconductor device, wherein the second silicon film and the barrier layer are sequentially removed. Forming an electrode on an insulating surface;
Forming a first insulating film flat on the electrode,
A second insulating film formed on the first insulating film,
Forming a first silicon film having an amorphous structure on the second insulating film,
The addition of Ni in the first silicon film having an amorphous structure, by performing heat treatment, the first silicon having a crystal structure of the first silicon film is crystallized with the amorphous structure Forming a film ,
Forming a barrier layer on the surface of the first silicon film having the crystal structure ;
Wherein the rare gas element in the barrier layer and the second silicon film is formed at a concentration of ^{1 × 10 19 ~1 × 10 22} / cm 3,
The Ni and gettering said second silicon film, the Ni removal or reduction of the first silicon film having a crystalline structure,
The method for manufacturing a semiconductor device comprising a benzalkonium be sequentially removing the second silicon layer and the barrier layer. Forming an electrode on an insulating surface;
Forming a first insulating film on the electrode;
Forming a second insulating film on the first insulating film;
After dispersing Ni on the second insulating film, forming a first silicon film having an amorphous structure;
Forming a barrier layer on the surface of the first silicon film having the amorphous structure;
1 × 10 of rare gas element on the barrier layer ¹⁹ ~ 1x10 ²² / Cm ³ Forming a second silicon film containing at a concentration of
By performing heat treatment, the first silicon film having an amorphous structure is crystallized to form a first silicon film having a crystalline structure, and the Ni is gettered to the second silicon film. And removing or reducing the Ni in the first silicon film having the crystal structure,
A method for manufacturing a semiconductor device, wherein the second silicon film and the barrier layer are sequentially removed. Forming an electrode on an insulating surface;
Forming a flat first insulating film on the electrode;
Forming a second insulating film on the first insulating film;
After dispersing Ni on the second insulating film, forming a first silicon film having an amorphous structure;
Forming a barrier layer on the surface of the first silicon film having the amorphous structure;
1 × 10 of rare gas element on the barrier layer ¹⁹ ~ 1x10 ²² / Cm ³ Forming a second silicon film containing at a concentration of
By performing heat treatment, the first silicon film having an amorphous structure is crystallized to form a first silicon film having a crystalline structure, and the Ni is gettered to the second silicon film. And removing or reducing the Ni in the first silicon film having the crystal structure,
A method for manufacturing a semiconductor device, wherein the second silicon film and the barrier layer are sequentially removed. In any one of Claims 1 thru | or 4 ,
Said second silicon film, a method for manufacturing a semiconductor device forming a silicon film, and forming by adding a rare gas element in the silicon film. In any one of Claims 1 thru | or 4 ,
Said second silicon film, a silicon film is formed by adding a rare gas element in the silicon film, O, O 2, _P, H, and one or more kinds selected from H ₂ A method for manufacturing a semiconductor device. In any one of Claims 1 thru | or 4 ,
The method for manufacturing a semiconductor device, wherein the second silicon film is formed by forming a silicon film containing a rare gas element by a plasma CVD method or a low pressure thermal CVD method. In any one of Claims 1 thru | or 4 ,
The method for manufacturing a semiconductor device, wherein the second silicon film is formed by forming a silicon film containing a rare gas element by a sputtering method. In any one of Claims 1 thru | or 8 ,
The second insulating film, a method for manufacturing a semiconductor device which is a silicon nitride film. In claim 9 ,
A method for manufacturing a semiconductor device, wherein the silicon nitride film has a thickness of 10 nm or less. In any one of Claims 1 thru | or 10,
A method for manufacturing a semiconductor device, wherein an active layer of a thin film transistor is formed so as to overlap with the electrode by using the first silicon film having the crystal structure from which Ni is removed or reduced. In any one of Claims 1 thru | or 11,
The method for manufacturing a semiconductor device, wherein the barrier layer functions as an etching stopper when removing the second silicon film. In any one of Claims 1 to 12,
The method for manufacturing a semiconductor device, wherein the barrier layer is formed by oxidizing a surface of the first silicon film using a solution containing ozone. In any one of Claims 1 to 12,
The method for manufacturing a semiconductor device, wherein the barrier layer is formed by oxidizing the surface of the first silicon film by ultraviolet irradiation in an oxygen atmosphere. In any one of claims 1 to 14,
The method for manufacturing a semiconductor device is characterized in that the concentration of oxygen contained in the first silicon film is 5 × 10 ¹⁸ / cm ³ or less. In any one of claims 1 to 15,
The method for manufacturing a semiconductor device, wherein the oxygen concentration contained in the second silicon film is 5 × 10 ¹⁸ / cm ³ or more.

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