JP4969072B2 - 回路装置およびその製造方法 - Google Patents
回路装置およびその製造方法 Download PDFInfo
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- JP4969072B2 JP4969072B2 JP2005252189A JP2005252189A JP4969072B2 JP 4969072 B2 JP4969072 B2 JP 4969072B2 JP 2005252189 A JP2005252189 A JP 2005252189A JP 2005252189 A JP2005252189 A JP 2005252189A JP 4969072 B2 JP4969072 B2 JP 4969072B2
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- 239000012528 membrane Substances 0.000 claims description 2
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- 238000007747 plating Methods 0.000 description 45
- 238000009713 electroplating Methods 0.000 description 18
- 238000007789 sealing Methods 0.000 description 17
- 239000000463 material Substances 0.000 description 16
- 239000004065 semiconductor Substances 0.000 description 15
- 230000017525 heat dissipation Effects 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 10
- 239000010949 copper Substances 0.000 description 10
- 229910052802 copper Inorganic materials 0.000 description 9
- 238000007772 electroless plating Methods 0.000 description 8
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- 229910052782 aluminium Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
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- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
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- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
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- 230000000149 penetrating effect Effects 0.000 description 2
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- 239000004593 Epoxy Substances 0.000 description 1
- 229910001111 Fine metal Inorganic materials 0.000 description 1
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
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- 229940043430 calcium compound Drugs 0.000 description 1
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- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011256 inorganic filler Substances 0.000 description 1
- 229910003475 inorganic filler Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000013532 laser treatment Methods 0.000 description 1
- 150000002681 magnesium compounds Chemical class 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000010397 one-hybrid screening Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 150000003112 potassium compounds Chemical class 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
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- 150000003377 silicon compounds Chemical class 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
本形態では、図1から図3を参照して、回路装置の一例として混成集積回路装置を例に説明する。
本形態では、図4から図7を参照して、図1に構造を示した混成集積回路装置10Aの製造方法を説明する。
本形態では、図8から図10を参照して、図2に構造を示した混成集積回路装置10Bの製造方法を説明する。本形態の製造方法は、基本的には上述した第2の実施の形態と同様であり、相違点は、第1接続部25Aおよび第2接続部25Bから接続部25を構成する点にある(図2参照)。以下では、その相違点を中心に混成集積回路装置10Bの製造方法を説明する。
11 リード
12 封止樹脂
14 回路素子
15 金属細線
16 回路基板
17A 第1絶縁層
17B 第2絶縁層
17B1 第1樹脂膜
17B2 第2樹脂膜
18A 第1配線層
18B 第2配線層
19 ロウ材
20 境界面
21 スキージ
22 凹部
24 ユニット
25 接続部
25A 第1接続部
25B 第2接続部
27 サーマルビア
28 導電膜
29 レジスト
31 キャビティ
32 貫通孔
33 レーザー
34 メッキ膜
Claims (15)
- 絶縁層を介して積層された第1配線層および第2配線層を有する回路装置に於いて、
前記絶縁層は、前記第1配線層の間に充填された第1樹脂膜と、前記第1樹脂膜に積層されて前記第1樹脂膜よりも多量のフィラーが混入された第2樹脂膜から成り、
前記第1樹脂膜と前記第2樹脂膜との境界面は、前記第1配線層同士の間で、前記第1樹脂膜側に突出するように湾曲することを特徴とする回路装置。 - 前記第1樹脂膜には、フィラーが混入されないことを特徴とする請求項1に記載の回路装置。
- 前記第1配線層と前記第2配線層とは、前記絶縁層を貫通する接続部を介して接続されることを特徴とする請求項1または請求項2に記載の回路装置。
- 前記接続部は、前記第1配線層を部分的に厚み方向に突出させた第1接続部と、
前記第2配線層を部分的に厚み方向に突出させた第2接続部からなり、
前記第1接続部と前記第2接続部とは、前記絶縁層の厚み方向の中間部にて接触することを特徴とする請求項3に記載の回路装置。 - 前記境界面の両端は前記第1接続部の上面と同一平面上に位置し、
前記境界面の中間部分が前記第1樹脂膜側に突出することを特徴とする請求項4に記載の回路装置。 - 主面が第1絶縁層により被覆された回路基板と、前記第1絶縁層の表面に形成された第1配線層と、第2絶縁層を介して前記第1配線層に積層された第2配線層と、前記第2配線層に電気的に接続された回路素子とを具備し、
前記第2絶縁層は、前記第1配線層の間に充填された第1樹脂膜と、前記第1樹脂膜に積層されて前記第1樹脂膜よりも多量のフィラーが混入された第2樹脂膜から成り、
前記第1樹脂膜と前記第2樹脂膜との境界面は、前記第1配線層同士の間で、前記第1樹脂膜側に突出するように湾曲することを特徴とする回路装置。 - 前記第1樹脂膜には、フィラーが混入されないことを特徴とする請求項6に記載の回路装置。
- 前記第1配線層と前記第2配線層とは、前記第2絶縁層を貫通する接続部を介して接続されることを特徴とする請求項6または請求項7に記載の回路装置。
- 前記接続部は、前記第1配線層を部分的に厚み方向に突出させた第1接続部と、
前記第2配線層を部分的に厚み方向に突出させた第2接続部からなり、
前記第1接続部と前記第2接続部とは、前記第2絶縁層の厚み方向の中間部にて接触することを特徴とする請求項8に記載の回路装置。 - 前記第1絶縁層は、フィラーが混入された樹脂から成ることを特徴とする請求項6から請求項9の何れかに記載の回路装置。
- 第1配線層を形成する工程と、
前記第1配線層同士の間に第1樹脂膜を充填させる工程と、
前記第1樹脂膜および前記第1配線層が覆われるように、前記第1樹脂膜よりも多量のフィラーが混入された第2樹脂膜を形成する工程と、
前記第2樹脂膜の表面に、接続部を介して前記第1配線層と接続された第2配線層を形成する工程と、を具備し、
前記第1樹脂膜と前記第2樹脂膜との境界面を、前記第1配線層同士の間で、前記第1樹脂膜側に突出するように湾曲させることを特徴とする回路装置の製造方法。 - フィラーが含まれない樹脂を前記第1樹脂膜として採用することを特徴とする請求項11に記載の回路装置の製造方法。
- 前記第1樹脂膜を充填させる工程では、
前記第1配線層が覆われるように形成された前記第1樹脂膜を、スキージにより掻き取ることを特徴とする請求項11または請求項12に記載の回路装置の製造方法。 - 前記第1配線層は、表面が絶縁処理された回路基板の主面に形成されることを特徴とする請求項11から請求項13の何れかに記載の回路装置の製造方法。
- 前記接続部は、前記第1配線層を部分的に厚み方向に突出させた第1接続部と、前記第2配線層を部分的に厚み方向に突出して前記第1接続部と接触する第2接続部からなり、
前記境界面の両端は前記第1接続部の上面と同一平面上に位置し、
前記境界面の中間部分が前記第1樹脂膜側に突出することを特徴とする請求項11から請求項14の何れかに記載の回路装置の製造方法。
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JP2005252189A JP4969072B2 (ja) | 2005-08-31 | 2005-08-31 | 回路装置およびその製造方法 |
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JP2005252189A JP4969072B2 (ja) | 2005-08-31 | 2005-08-31 | 回路装置およびその製造方法 |
Publications (2)
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JP2007067217A JP2007067217A (ja) | 2007-03-15 |
JP4969072B2 true JP4969072B2 (ja) | 2012-07-04 |
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JP5609064B2 (ja) * | 2009-11-02 | 2014-10-22 | 住友電気工業株式会社 | シールドフラットケーブルおよびその製造方法 |
JP5617244B2 (ja) * | 2010-01-06 | 2014-11-05 | ダイキン工業株式会社 | パワーモジュール、電力変換装置、及び冷凍装置 |
JP6989292B2 (ja) * | 2017-05-29 | 2022-01-05 | 京セラ株式会社 | 電子素子実装用基板、電子装置および電子モジュール |
JP7449210B2 (ja) | 2020-09-28 | 2024-03-13 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
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JPH01129495A (ja) * | 1987-11-16 | 1989-05-22 | Nec Corp | 高密度多層配線基板の絶縁形成方法 |
JPH08108519A (ja) * | 1994-10-08 | 1996-04-30 | Sony Corp | 印刷用スキージ |
JPH08236663A (ja) * | 1995-02-28 | 1996-09-13 | Sanyo Electric Co Ltd | 混成集積回路装置 |
JP3003921B2 (ja) * | 1995-11-02 | 2000-01-31 | 住友ベークライト株式会社 | 多層プリント配線板の製造方法 |
JPH09232756A (ja) * | 1996-02-20 | 1997-09-05 | Matsushita Electric Works Ltd | 多層プリント配線板の製造方法 |
JPH1056268A (ja) * | 1996-08-12 | 1998-02-24 | Pfu Ltd | ドリルレスivhプリント配線板およびその製造方法 |
JP3861338B2 (ja) * | 1996-08-22 | 2006-12-20 | イビデン株式会社 | プリント配線板の製造方法 |
JP3296992B2 (ja) * | 1996-09-27 | 2002-07-02 | イビデン株式会社 | 多層プリント配線板の製造方法 |
JP3174026B2 (ja) * | 1998-03-23 | 2001-06-11 | 電気化学工業株式会社 | 金属ベース多層回路基板 |
JP3941989B2 (ja) * | 1998-11-20 | 2007-07-11 | 株式会社住友金属エレクトロデバイス | 厚膜パターン形成方法 |
JP2002185097A (ja) * | 2000-12-12 | 2002-06-28 | Hitachi Chem Co Ltd | 接続方法とその方法を用いた回路板とその製造方法並びに半導体パッケージとその製造方法 |
JP2003069224A (ja) * | 2001-08-30 | 2003-03-07 | Kyocera Corp | 多層配線基板 |
JP4266288B2 (ja) * | 2001-12-25 | 2009-05-20 | 大日本印刷株式会社 | 電磁波遮蔽シートの製造方法および電磁波遮蔽シート |
JP2004047587A (ja) * | 2002-07-09 | 2004-02-12 | Eastern Co Ltd | 配線回路基板の製造方法および配線回路基板 |
JP4273837B2 (ja) * | 2003-05-27 | 2009-06-03 | パナソニック電工株式会社 | 金属箔付き絶縁シート、多層配線板、及び多層配線板の製造方法 |
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