JP4922979B2 - Semiconductor substrate - Google Patents

Description

  The present invention relates to a semiconductor substrate, and more particularly to a semiconductor substrate in which a semiconductor layer having a lattice constant different from that of a substrate is formed on the substrate.

  III-V compound semiconductors such as GaAs have been widely used in optical devices and high-speed transistors because they have high electron mobility and are direct transition semiconductors suitable for light-emitting devices. .

  In the field of optical devices, the band gap of a semiconductor determines the wavelength of light emitted or received, so various materials are used depending on the wavelength. As a substrate for forming these, a large-diameter substrate is industrially stable. Since it is obtained, GaAs has been mainly used. Further, although it is harder to increase the diameter than GaAs and is expensive, an InP or GaP substrate may be used depending on the required semiconductor layer material.

  On the other hand, in the field of high-speed transistors, a GaAs field effect transistor having an electron mobility of 10 times or more compared with Si in order to meet the demand for higher communication frequency and wider bandwidth due to an increase in communication data volume. (MESFET) and high electron mobility transistors (HEMT or HFET) using a heterostructure of GaAs and AlGaAs have been put into practical use. Furthermore, a HEMT in which GaAs, which is an electron transit layer, is replaced with InGaAs having higher electron mobility has been proposed.

  These transistors are of the same III-V group, and an electrically insulating substrate can be obtained, and a large-diameter substrate can be obtained industrially stably and at a low price. It has been manufactured using a substrate.

JP-A-5-90301 (Patent No. 3200142) R. E. Leoni, et al, "GaAs-based Metamorphic Technology", GaAs MANTECH conference 2002

  However, the relationship between the electron constant layer (hereinafter referred to as channel layer) in such a transistor or the active layer in an optical device and the lattice constant of the substrate is limited. Taking a high-speed transistor as an example, when a channel layer having high electron mobility is formed on a substrate, a molecular beam epitaxy method (hereinafter referred to as MBE method), a metal organic chemical vapor deposition method (hereinafter referred to as MOCVD method), or the like. However, if there is a lattice mismatch between the substrate and the channel layer or the active layer, a thin film in a polycrystalline or amorphous state is formed by stress during the thin film growth, and the film quality is extremely deteriorated.

  In order to avoid such problems, what has been mainly commercialized so far is a lattice matching system that substantially matches the lattice constant of the substrate. Specifically, in the case of a high-speed transistor, a system in which AlGaAs and GaAs lattice-matched with GaAs are formed on a GaAs substrate, or a film thickness capable of growing a single-crystal thin film even if there is a slight difference in lattice constant, a so-called critical film AlGaAs and InGaAs are used as pseudo-lattice matching transistors that form a thin film within a thickness range.

  In a pseudo-lattice matching transistor, the higher the In composition ratio of InGaAs, the higher the electron mobility, which is suitable for high-frequency operation. However, the difference in lattice constant from the substrate increases, and the minimum film thickness required for transistor operation. Therefore, the maximum composition of In is 20%. Therefore, in a high-speed transistor, in order to realize a higher-speed operation, the gate length must be reduced, and there is a limit to the wavelength that can be used in an optical device.

  In order to solve these problems, a lattice mismatch relaxation layer (hereinafter referred to as a buffer layer) for relaxing lattice mismatch between two layers in the thin film portion from the substrate to the electron transit layer or the active layer is originally provided on the substrate. Various methods for forming a channel layer or an active layer having an arbitrary lattice constant regardless of the lattice constant of the substrate have been studied by providing it between the thin film to be formed and the substrate.

  First, as disclosed in Non-Patent Document 1, there is a technique called a graded buffer layer that alleviates lattice mismatch by changing the composition of a thin film continuously or stepwise from the lattice constant of a substrate. . This method has various structures as the actual film structure, but the common thing is that the lattice constant is changed by changing the composition of the semiconductor continuously or step by step, and it is originally used as an active layer. When the lattice constant of the desired layer (in this case, the InAlAs / InGaAs layer) is aligned, the graded structure is stopped and a uniform layer (in this case, the InAlAs layer) is formed.

Therefore, the method and characteristics of the graded buffer layer will be described below.
1A and 1B are conceptual diagrams of a graded buffer layer. FIG. 1A shows the case of a continuous graded buffer layer, and FIG. The case of the dead buffer layer is shown.

  That is, in FIG. 1A, by continuously changing the semiconductor composition from the substrate side, the lattice constant of the substrate is continuously changed from the lattice constant of the semiconductor layer to be used as an electron transit layer in the case of a transistor. Is. When this structure is actually formed by the MBE method, since the film formation is performed while changing the cell temperature and the substrate temperature of the material to be changed, it may be difficult to control during manufacturing. Therefore, as shown in FIG. 1B, a step-graded buffer method has been proposed in which the lattice constant is changed step by step.

  A characteristic of these graded buffer structures is that transitions or defects that occur in order to relieve the lattice constant difference occur in parallel or in layers with respect to the surface of the substrate.

  FIG. 2 is a schematic diagram showing the occurrence of crystal defects in the graded buffer layer. In the figure, reference numeral 21 denotes a substrate, 22 denotes a graded buffer layer, and 23 denotes a channel layer (active layer). In this structure, since the defects are difficult to extend to a layer in which the lattice defect a directly affects the device characteristics, such as a transistor formed on the graded buffer layer 22, a channel layer of the optical device, or the active layer 23, The structure is preferable in terms of characteristics. On the other hand, when the lattice constant difference with the substrate 21 increases, the thickness of the graded buffer layer 22 must be increased accordingly.

  This is because in order to change the lattice constant, it is necessary to change the composition of the thin film. However, if the composition is changed rapidly, the relaxation mechanism of the lattice mismatch, which is a characteristic feature of the graded buffer layer, does not work well. Moreover, in order to change the composition abruptly, the intensity of the flux can only be controlled by changing the cell temperature in the case of the MBE method, so it cannot be changed beyond the time constant determined by the heat capacity of the cell. For this reason, the time required for the thin film growth becomes longer, and there is a disadvantage that the manufacturing cost is increased.

  In contrast, for example, as shown in Patent Document 1, there is a method in which a thin film layer having a different lattice constant is formed directly on a substrate, and lattice relaxation is performed using this thin film layer. The one described in Patent Document 1 is intended to provide an FET having excellent high-frequency characteristics as an amplifying element for transmitting / receiving satellite broadcasts or an element for high-speed data transfer, and has a lattice constant different from that of InAs. The semiconductor device has a structure in which a first compound semiconductor layer functioning as a buffer layer and an InAs layer functioning as an electron transit layer are sequentially stacked on a semiconductor substrate.

  In this case, since the composition is not changed in the thin film layer, the structure is simple and the film formation conditions can be easily managed. However, the generation of defects due to the difference in lattice constant extends upward with respect to the substrate. There is a drawback that the defect density is not easily lowered even if the buffer layer is made thick.

  FIG. 3 is a schematic diagram showing the occurrence of crystal defects in a single-layer buffer, in which reference numeral 31 denotes a substrate, 32 denotes a buffer layer, and 33 denotes a channel layer (active layer). In particular, a device sensitive to the lattice defect a, such as a transistor or an optical device, has a problem because even if the buffer layer 32 is made thick, characteristics are deteriorated due to crystal defects.

  The present invention has been made in view of such problems. The object of the present invention is to use an extremely thin buffer layer as compared with the prior art, which is industrially stable and low in cost, and has a substrate and a lattice constant. The object is to provide a semiconductor substrate on which different quality thin films are formed.

  The present inventor utilizes the feature that the compound semiconductor layer containing Sb, such as AlGaAsSb and InAlSb, relaxes the lattice constant with a very thin layer, and the graded buffer layer is formed on the upper layer from the side having the larger lattice constant to the side having the smaller lattice constant. As a result, it was found that a high-quality thin film with fewer lattice defects can be formed with a thinner buffer layer than in the prior art, and the present invention has been made.

  The present invention has been made to achieve such an object. The invention according to claim 1 is a substrate having a lattice constant x, a substrate formed on the substrate, having a lattice constant y, and at least A first semiconductor layer containing Sb; a second semiconductor layer formed on the first semiconductor layer, the lattice constant of which is changed stepwise or continuously from the lattice constant y to z; and the second semiconductor layer A third semiconductor layer having a lattice constant z is formed on the semiconductor layer, and the relationship between the lattice constants is x <z <y.

  The invention according to claim 2 is the invention according to claim 1, wherein the first semiconductor layer is AlGaAsSb.

  The invention according to claim 3 is the invention according to claim 1, wherein the first semiconductor layer is InAlGaAsSb.

  According to a fourth aspect of the present invention, in the first aspect of the present invention, the substrate is GaAs.

  According to a fifth aspect of the present invention, in the first aspect of the present invention, the substrate is InP.

  According to a sixth aspect of the invention, in the first aspect of the invention, the third semiconductor layer is InAlAs.

The invention according to claim 7 is the invention according to claim 6, wherein the third semiconductor layer is In _x Al _1-x As, and 0.2 <x <0.8. It is characterized by that.

  The invention according to claim 8 is the invention according to claim 1, wherein the third semiconductor layer is InAlGaAsSb.

  When the thin film structure of the present invention is used, a high-quality thin film can be formed from a semiconductor thin film having a large lattice constant relative to the lattice constant of the substrate by using a buffer layer that is significantly thinner than the conventional method. For this reason, not only the time required for thin film growth can be shortened, but also an effect that a high quality thin film can be produced stably is produced.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 4 is a cross-sectional view showing the basic structure of the semiconductor substrate of the present invention. In the figure, reference numeral 1 denotes a substrate, 2 denotes a first semiconductor layer, 3 denotes a second semiconductor layer, and 4 denotes a third semiconductor layer. Show.

  The semiconductor substrate of the present invention includes a substrate 1, a first semiconductor layer 2, a second semiconductor layer 3, and a third semiconductor layer 4, and the substrate 1 has a lattice constant x. The first semiconductor layer 2 is formed on the substrate 1, has a lattice constant y, and includes at least Sb. The second semiconductor layer 3 is formed on the first semiconductor layer 2 and changes the lattice constant stepwise or continuously from the lattice constant y to z. The third semiconductor layer 4 is formed on the second semiconductor layer 3 and has a lattice constant z. These lattice constants have a relationship of x <z <y.

The substrate 1 is preferably GaAs or InP, but may be anything that is suitable for the growth of compound semiconductors. A GaAs substrate is most preferable in that a large-diameter substrate can be obtained at low cost. In addition, an InP substrate, a GaP substrate, or the like is also used depending on the semiconductor layer formed on the substrate. In the case of transistors, a semi-insulating substrate of about 10 ⁷ Ω · cm or more is most often used since the substrate is required to have high insulating properties in order to reduce high-frequency signal loss, parasitic capacitance, and the like. On the other hand, in the case of a light emitting device or the like that requires conductivity of the substrate, an n-type or p-type doped substrate may be used, and can be properly used as necessary.

  Next, the first semiconductor layer 2 is preferably AlGaAsSb or InAlGaAsSb. However, the first semiconductor layer 2 is a layer having a function as a buffer layer for relaxing lattice mismatch, and is composed of a compound semiconductor layer containing at least Sb. The semiconductor layer containing Sb has a faster lattice relaxation than other material systems, and after starting growth, the epitaxial growth starts in several atomic layers, and a thin film having a lattice constant corresponding to the composition of the material is a thin film of about 50 nm. Will be formed. Therefore, the thickness of the first semiconductor layer must be at least one atomic layer and there is no upper limit, but it takes a long time to form a film, and even if it is formed more than a certain thickness, it serves as a buffer layer. Since the function does not change, a thickness of up to 1 um is sufficient. Depending on the type of device required, the material used here may be insulating or conductive, but the insulating buffer layer used is AlGaAsSb or InAlGaAsSb. preferable.

  In addition, when the first semiconductor layer is more conductive, such as an HBT (heterojunction bipolar transistor) or an optical device system, InSb is extremely excellent in lattice relaxation and can be reduced in resistance. Yes. This is because the thin film layer to be finally formed is generally InGaAs-based or InAsSb-based, and preferably contains a common element as much as possible.

  When an InGaAs layer is used as the channel layer or the active layer, AlGaAsSb is most preferable from the viewpoints of controllability during film formation and insulation. Similarly, when the InAsSb system is used, the InAlAsSb system which can take a larger lattice constant than the AlGaAsSb system is preferable.

  In particular, when it is desired to make the first semiconductor layer 2 thinner, it is preferable to reduce the composition of As and increase Sb because the lattice mismatch is reduced with a thinner film. Therefore, when the lattice constant x of the substrate 1 and the lattice constant y of the first semiconductor layer 2 are large enough to satisfy the relationship (y−x) / x> 0.01, the effect of the present invention is achieved. Becomes particularly prominent.

  The second semiconductor layer 3 also functions as a buffer layer like the first semiconductor layer 2, but the first semiconductor layer 2 having the lattice constant y and the channel layer being the third semiconductor layer 4 having the lattice constant z, Alternatively, it is a graded buffer layer in which the lattice constant y to the z vicinity is changed continuously or stepwise with respect to the active layer.

  FIGS. 5A and 5B are diagrams showing how the lattice constant of the substrate changes in the present invention. FIG. 5A shows the case of a continuous second buffer layer, and FIG. b) shows the case of a stepwise second buffer layer.

  Here, “near” means that the lattice constant of the second semiconductor layer 3 does not necessarily start from the lattice constant y of the first semiconductor layer 2. This is because it is determined according to the required film quality and structure as indicated by the dotted line. Similarly, there may be a difference in lattice constant at the interface between the second semiconductor layer 3 and the third semiconductor layer 4. In any case, in the present invention, since the lattice constant x of the substrate 1 and the lattice constant z of the third semiconductor layer 4 are in the relationship of x <z, the state of the change of the lattice constant is approximately shown in FIG. ) And (b).

  In the conventional graded buffer layer, the lattice constant is gradually increased from the substrate side. However, in the present invention, the lattice constant decreases from the first semiconductor layer 2 toward the third semiconductor layer 4. There is a difference in changing. In addition, the second semiconductor layer 3 can be made thin by adjusting the composition ratio so that the lattice constant of the first semiconductor layer 2 is substantially close to the lattice constant of the third semiconductor layer 4. It is.

The third semiconductor layer 4 formed on the second semiconductor layer 3 is preferably InAlAs, and In _x Al _1-x As is 0.2 <x <0.8 or InAlGaAsSb. Is a layer substantially lattice-matched with the channel layer of the transistor or the active layer of the optical device. Accordingly, the layers above the third semiconductor layer 4 of the present invention are designed according to the required device, and all of the above configurations are within the technical scope of the present invention.

  Next, specific Example 1 will be described below. As an example of the present invention, a semiconductor substrate for a transistor manufactured by the MBE method will be described.

  FIG. 6 is a cross-sectional structural view showing the semiconductor substrate of Example 1. In the figure, reference numeral 11 denotes a GaAs substrate, 12 denotes an AlGaSb layer, 13 denotes a graded layer, 14 denotes an InAlAs layer, 15 denotes an InGaAs channel layer, and 16 denotes InAlAs. The layer, 17 is an InGaAs contact layer, and a is a lattice defect.

First, the semi-insulating GaAs (100) substrate 11 is heated at 630 ° C. while irradiating As to desorb surface oxygen. The substrate temperature is lowered to 580 ° C. as it is, and then a GaAs buffer layer having a thickness of 100 nm is grown. Next, the substrate temperature is lowered to 460 ° C. while irradiating As, and then an undoped Al _0.8 Ga _0.2 Sb layer 12 having a thickness of 100 nm is grown. Further, a graded Al _0.8 Ga _0.2 As _x Sb _1-x (x = 0.1 → 0.4) layer 13 having a film thickness of 600 nm is grown thereon while maintaining the substrate temperature at 460 ° C. The graded layer 13 grows while continuously reducing the dose of Sb while keeping the dose of As constant, so that the As composition x of the Al _0.8 Ga _0.2 As _x Sb _1-x layer is reduced to 0. . Continuously changed from 1 to 0.4. Finally, while maintaining the substrate temperature at 460 ° C., an In _0.7 Al _0.3 As layer 14 having a film thickness of 250 nm was grown to produce a transistor substrate.

In this example, a thin film stack for a transistor was further grown on this substrate by the MBE method. This thin film stack includes an undoped In _0.7 Al _0.3 As layer having a thickness of 95 nm, a delta doped layer formed by irradiating only Si and As, an undoped In _0.7 Al _0.3 As layer 14 having a thickness of 5 nm, and an undoped having a thickness of 20 nm. In _0.8 Ga _0.2 As channel layer 15, undoped In _0.7 Al _0.3 As layer with a thickness of 4 nm, delta doped layer formed by irradiating only Si and As, undoped In _0.7 Al _0.3 As layer 16 with a thickness of 12 nm, and finally In _0.8 Ga _0.2 As cap layer (contact layer) 17 doped with Si is sequentially laminated.

As a result of evaluating the electrical characteristics of the thin film laminate for the transistor by the van der Pauw method, the electron mobility was 13500 cm ² / Vs, the sheet resistance was 217 Ω, and the sheet electron concentration was 2.14 × 10 ¹² cm ⁻² . In the conventional method, a buffer layer of 1 μm or 1.5 μm or more is required to obtain the same characteristics, but in this embodiment, graded graded Al _0.8 Ga _0.2 As _x Sb _1-x The thickness of the buffer layer up to (x = 0.1 → 0.4) layer is as very thin as 700 nm. That is, if this invention is used, a favorable film characteristic can be acquired with a very thin buffer layer, and it is very preferable industrially.

  The present invention can be widely applied as a semiconductor substrate for a device using a heterostructure using a compound semiconductor such as a high-speed transistor or a light emitting / receiving device, or a device using a metamorphic structure.

In the conceptual diagram of the graded buffer layer, (a) shows the case of a continuous graded buffer layer, and (b) shows the case of a graded graded buffer layer. It is a schematic diagram which shows generation | occurrence | production of the crystal defect in a graded buffer layer. It is a schematic diagram which shows generation | occurrence | production of the crystal defect in a single layer buffer. It is a section lineblock diagram showing the basic structure of the semiconductor substrate of the present invention. FIGS. 4A and 4B are diagrams showing a change in the lattice constant of a substrate in the present invention, where FIG. 5A shows the case of a continuous second buffer layer, and FIG. 5B shows the case of a stepwise second buffer layer. Show. 1 is a cross-sectional structure diagram illustrating a semiconductor substrate of Example 1. FIG.

Explanation of symbols

1 substrate 2 first semiconductor layer 3 second semiconductor layer 4 third semiconductor layer 11 GaAs substrate 12 AlGaSb layer 13 graded layer 14 InAlAs layer 15 InGaAs channel layer 16 InAlAs layer 17 InGaAs contact layers 21 and 31 substrate 22 gray Dead buffer layer 23, 33 Channel layer (active layer)
32 Buffer layer

Claims (8)

A substrate having a lattice constant x;
A first semiconductor layer formed on the substrate and having a lattice constant y and containing at least Sb;
A second semiconductor layer formed on the first semiconductor layer, the lattice constant of which is changed stepwise or continuously from the lattice constant y to z;
A third semiconductor layer formed on the second semiconductor layer and having a lattice constant z;
A semiconductor substrate characterized in that the relationship of the lattice constants is a relationship of x <z <y.   The semiconductor substrate according to claim 1, wherein the first semiconductor layer is AlGaAsSb.   The semiconductor substrate according to claim 1, wherein the first semiconductor layer is InAlGaAsSb.   The semiconductor substrate according to claim 1, wherein the substrate is GaAs.   The semiconductor substrate according to claim 1, wherein the substrate is InP.   The semiconductor substrate according to claim 1, wherein the third semiconductor layer is InAlAs. The semiconductor substrate according to claim 6, wherein the third semiconductor layer is In _x Al _1-x As, and 0.2 <x <0.8.   The semiconductor substrate according to claim 1, wherein the third semiconductor layer is InAlGaAsSb.

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