JP4841082B2 - Method for manufacturing nonvolatile semiconductor memory device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a nonvolatile semiconductor memory device using a self-aligned source line forming method and a method for manufacturing the same.
[0002]
[Prior art]
FIG. 4 is a plan view showing a conventional nonvolatile semiconductor memory device, and FIGS. 5 and 6 are process cross-sectional views showing a method for manufacturing the AA ′ and BB ′ portions of FIG. The description will be made sequentially according to FIGS.
[0003]
First, as shown in FIG. 5A, the element isolation insulating film 2 is selectively formed on the semiconductor substrate 1 (in this case, the AA ′ cross section). Thereafter, a gate oxide film 3 is formed on the semiconductor substrate 1 and the element isolation insulating film 2 by a thermal oxidation method. Further, a Poly-Si film or a Doped Poly-Si film as the floating gate conductive film 4 is deposited by CVD.
[0004]
Further, a first interlayer insulating film 5, a Poly-Si film or Doped Poly-Si film as a control gate conductive film 6, and a refractory metal film 7 are sequentially deposited on the floating gate conductive film 4. Thereafter, a silicon oxide film is formed, and photolithography and anisotropic etching are performed to form a silicon oxide film mask 8a for forming a control gate.
[0005]
Next, as shown in FIG. 5B, using the silicon oxide film mask 8a, the refractory metal film 7, the control gate conductive film 6, the first interlayer insulating film 5, and the floating gate conductive film 4 are formed. Anisotropic dry etching is performed. As a result, a gate electrode including the refractory metal film 7, the control gates 6a and 7a made of the control gate conductive film 6, and the floating gate 4a made of the floating gate conductive film 4 is formed.
Thereafter, source / drain regions 9 are formed by ion implantation (BB ′ cross section).
[0006]
Next, as shown in FIG. 5C, a photoresist pattern 10 is formed as a mask for forming source lines in a self-aligning manner.
Next, as shown in FIG. 6A, anisotropic dry etching is performed using the photoresist pattern 10 as a mask to remove the element isolation insulating film 2 formed on a portion that later becomes a source line. Thereafter, the source line 11 is formed in a self-aligned manner by ion implantation.
[0007]
At this time, as shown in FIG. 6A, since the element isolation insulating film 2 is subjected to anisotropic dry etching using the photoresist pattern 10 as a mask, the floating gate 4a, the first interlayer insulating film 5a, Resist polymer 12 adheres to the gate electrode side wall composed of control gates 6 a and 7 a and source line 11.
Further, when the element isolation insulating film 2 is removed, a part of the silicon oxide film mask 8a is also removed at the same time, and the refractory metal film on the upper surface 7a of the control gate is exposed.
[0008]
Next, as shown in FIG. 6B, after the photoresist pattern 10 is removed, heat treatment is performed to form a sidewall oxide film 13 for improving diffusion of the source / drain 9 and 11 and memory retention performance. To do.
Thereafter, a second interlayer insulating film 14 is deposited on the entire surface by the CVD method, and then a photolithography process and anisotropic dry etching are performed to form the drain contact 15. As a result, a nonvolatile semiconductor memory device that takes electrical continuity and uses a self-aligned source line is completed.
[0009]
[Problems to be solved by the invention]
The conventional nonvolatile semiconductor memory device and the manufacturing method are as described above. As shown in FIG. 6A, the photoresist pattern 10 is used as a mask for forming the source line 11 in a self-aligned manner. Therefore, the resist polymer 12 adheres to the side wall of the gate electrode including the floating gate 4 a, the first interlayer insulating film 5 a, and the control gates 6 a and 7 a and the source line 11.
[0010]
As a result, in the step of FIG. 6B, there is a problem that when the sidewall oxide film 13 is formed, a sidewall oxide film contaminated with impurities is formed, and the memory retention performance is deteriorated.
[0011]
Further, since the mask for forming the control gate electrode is formed of a silicon oxide film, as shown in FIG. 6A, when the element isolation insulating film 2 formed on the source line is removed. The silicon oxide film mask 8a is also etched at the same time, and the upper surface 7a of the control gate is exposed.
[0012]
As a result, in the process of FIG. 6B, the refractory metal film used for the upper surface 7a of the control gate is directly exposed to the oxygen atmosphere and oxidized by the heat treatment when forming the sidewall oxide film 13. As a result, there are problems that the refractory metal film is blackened, increased in resistance, peeled off, and the like.
[0013]
The present invention has been made to solve the above-described problems. In the self-aligned source line forming method, the photoresist is not used as a mask when forming the source line, and the upper surface of the control gate is prevented from being exposed. An object of the present invention is to provide a nonvolatile semiconductor memory device that can be used and a method for manufacturing the same.
[0014]
[Means for Solving the Problems]
According to a first aspect of the present invention, there is provided a method for manufacturing a nonvolatile semiconductor memory device, wherein an element isolation insulating film is selectively formed on a semiconductor substrate, a floating gate conductive film, an interlayer insulating film, a control gate conductive film, A step of forming a melting point metal film, a step of forming a control gate formation mask made of a first silicon nitride film on the control gate conductive film, and a refractory metal film using the control gate formation mask And sequentially etching the control gate conductive film, the interlayer insulating film, and the floating gate conductive film to form a gate electrode including the control gate, the interlayer insulating film, and the floating gate, and on the entire surface of the semiconductor substrate including the gate electrode. Forming a second silicon nitride film which is a film of the same material as the control gate forming mask and is thinner than the thickness of the control gate forming mask; and a photoresist pattern on the second silicon nitride film. And etching the second silicon nitride film using the photoresist pattern as a mask, and after removing the photoresist pattern, using the first silicon nitride film and the second silicon nitride film as a mask, Removing the element isolation insulating film and performing ion implantation to form a source line in a self-aligned manner; and removing the second silicon nitride film and then performing a heat treatment to form a sidewall oxide film on the entire surface of the gate electrode And.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
FIG. 1 is a plan view showing a nonvolatile semiconductor memory device according to the present invention, and FIGS. 2 and 3 are process sectional views showing a method of manufacturing the AA ′ and BB ′ portions of FIG. The description will be made sequentially according to FIGS.
[0019]
First, as shown in FIG. 2A, the element isolation insulating film 2 is selectively formed on the semiconductor substrate 1 (in this case, the AA ′ cross section). Thereafter, a gate oxide film 3 is formed on the semiconductor substrate 1 and the element isolation insulating film 2 by a thermal oxidation method. Further, a Poly-Si film or Doped Poly-Si film 4 as the floating gate conductive film 4, a first interlayer insulating film 5, and a Poly-Si film or Doped Poly-Si film as the control gate conductive film 6 by the CVD method. In order to further reduce the resistance value of the gate electrode, a refractory metal film 7 such as WSi2 or TiSi is deposited by sputtering or CVD.
Thereafter, a film of about 200 to 250 nm is deposited on the refractory metal film 7 by the CVD method. A first silicon nitride film 16 is formed, and photolithography and anisotropic etching are performed to form a first silicon nitride film mask 16a for forming a control gate.
[0020]
Next, as shown in FIG. 2B, by using the first silicon nitride film mask 16a, the refractory metal film 7, the control gate conductive film 6, the first interlayer insulating film 5, and the floating gate conductive. The film 4 is subjected to anisotropic dry etching. As a result, a gate electrode including the refractory metal film 7, the control gates 6a and 7a made of the control gate conductive film 6, and the floating gate 4a made of the floating gate conductive film 4 is formed.
Thereafter, source / drain regions 9 are formed by ion implantation (BB ′ cross section).
[0021]
Next, as shown in FIG. 2C, a second silicon nitride film 17 is deposited on the entire surface by a CVD method so as to be thinner than the first silicon nitride film 16 by about 50 to 100 nm. The second silicon nitride film 17 becomes a mask for forming a source line in a self-aligning manner later.
Next, as shown in FIG. 3A, a photoresist pattern 10 is formed on the second silicon nitride film 17, and anisotropic dry etching is performed on the second silicon nitride film 17 using the photoresist pattern 10 as a mask. To form a second silicon nitride film mask 17a.
[0022]
Next, as shown in FIG. 3B, the photoresist pattern 10 is removed, and anisotropic dry etching is performed using the first and second silicon nitride film masks 16a and 17a as masks. The element isolation insulating film 2 formed on the part to be formed is removed. Thereafter, the source line 11 is formed in a self-aligned manner by ion implantation.
[0023]
At this time, since anisotropic dry etching is performed using the first and second silicon nitride masks 16a and 17a as masks instead of the photoresist pattern, the floating gate 4a, the first interlayer insulating film 5a, and the control gate The resist polymer does not adhere to the side walls of the gate electrodes 6a and 7a and the source line 11.
[0024]
Next, as shown in FIG. 3C, the entire surface is subjected to anisotropic dry etching to remove the second silicon nitride film 17a.
At this time, since the second silicon nitride film mask 17a is formed thinner than the first silicon nitride film mask 16a, even if the second silicon nitride film mask 17a is removed, the entire surface on the control gate is removed. The first silicon nitride film mask 16a remains, and the refractory metal film on the upper surface 7a of the control gate is not exposed.
[0025]
Next, as shown in FIG. 3D, heat treatment is performed to form a sidewall oxide film 13 for improving diffusion of the source / drain 9 and 11 and memory retention performance.
At this time, the refractory metal is not oxidized without exposing the control gate upper surface 7a. Further, since there is no adhesion of resist polymer, impurity contamination of the sidewall oxide film 13 can be prevented.
[0026]
Thereafter, a second interlayer insulating film 14 is deposited on the entire surface by the CVD method, and then a photolithography process and anisotropic dry etching are performed to form the drain contact 15. As a result, a nonvolatile semiconductor memory device that takes electrical continuity and uses a self-aligned source line is completed.
[0027]
Thus, since the self-aligned source line formation was performed using the silicon nitride film as a mask, the sidewall oxide film can be prevented from being contaminated by the resist polymer,
When the element isolation oxide film 2 is removed, the disappearance of the silicon nitride film mask on the control gate can be prevented, and oxidation of the refractory metal film on the upper surface of the control gate can be prevented.
[0028]
【The invention's effect】
As described above, according to the present invention, since the control gate formation mask is provided on the entire upper surface of the control gate, it is possible to prevent the upper surface of the control gate from being exposed when the source line is formed in a self-aligned manner. .
[0029]
In addition, since the upper part of the control gate is a refractory metal film and the control gate formation mask is a silicon nitride film, the element isolation insulating film when the source line is formed in a self-aligned manner is removed. Some are not removed at the same time. Therefore, exposure of the refractory metal film above the control gate can be prevented.
[0030]
Also, the step of forming a mask for forming a source line in a self-aligning manner according to the present invention forms a film of the same material as the control gate forming mask thinner than the mask for forming the thickness control gate on the entire surface. Since the process is performed by photolithography and anisotropic etching, the mask for forming the control gate remains on the entire upper surface of the control gate even if the mask for forming the source line is removed in a self-aligning manner. Thus, a method of manufacturing a nonvolatile semiconductor memory device that can form a good control gate can be obtained.
[0031]
In addition, since the mask for forming the control gate and the mask for forming the source line in a self-aligned manner are formed of the silicon nitride film, the resist polymer is removed when the element isolation oxide film is removed during the formation of the self-aligned source line. Adhesion can be prevented and contamination of the sidewall oxide film can be prevented. Further, there is obtained a method for manufacturing a nonvolatile semiconductor memory device in which the control gate forming mask is not etched when the element isolation oxide film is removed, but remains on the entire upper surface of the control gate and a good control gate can be formed.
[Brief description of the drawings]
FIG. 1 is a plan view showing a nonvolatile semiconductor memory device of the present invention.
FIG. 2 is a process cross-sectional view illustrating a method for manufacturing the AA ′ and BB ′ portions of FIG. 1;
3 is a process cross-sectional view illustrating a method for manufacturing the AA ′ and BB ′ portions of FIG. 1. FIG.
FIG. 4 is a plan view showing a conventional nonvolatile semiconductor memory device.
FIG. 5 is a process cross-sectional view illustrating a method for manufacturing the AA ′ and BB ′ portions of FIG. 4;
6 is a process cross-sectional view illustrating a method for manufacturing the AA ′ and BB ′ portions of FIG. 4;
[Explanation of symbols]
1 semiconductor substrate, 2 element isolation insulating film, 4 conductive film for floating gate,
5 first interlayer insulating film, 6 conductive film for control gate, 7 refractory metal film,
4a floating gate, 6a, 7a control gate, 11 source line,
13 sidewall oxide film, 16 first silicon nitride film,
16a first silicon nitride film mask, 17 second silicon nitride film,
17a Second silicon nitride film mask.

Claims (1)

A step of selectively forming an element isolation insulating film on a semiconductor substrate and sequentially forming a floating gate conductive film, an interlayer insulating film, a control gate conductive film, and a refractory metal film;
On the control gate Yoshirubedenmaku, forming a control gate forming mask made of the first silicon nitride film,
Using said control gate forming mask, the refractory metal film, the control gate conductive layer, the interlayer insulating film, the floating gate conductive film are sequentially etched, the control gate, an interlayer insulating film, the floating gate Forming a gate electrode,
Forming a second silicon nitride film on the entire surface of the semiconductor substrate including the gate electrode, the film being made of the same material as the control gate forming mask and being thinner than the thickness of the control gate forming mask;
Forming a photoresist pattern on the second silicon nitride film, and etching the second silicon nitride film using the photoresist pattern as a mask;
After the photoresist pattern is removed, the element isolation insulating film is removed and ion implantation is performed using the first silicon nitride film and the second silicon nitride film as a mask, and the source line is formed in a self-aligning manner. Forming, and
And a step of forming a sidewall oxide film on the entire surface of the gate electrode after removing the second silicon nitride film and performing a heat treatment .

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